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Move "select CACHE_AS_RAM" lines from boards into CPU socket.
[coreboot.git] / src / mainboard / amd / serengeti_cheetah_fam10 / mb_sysconf.h
2010-11-22 Patrick GeorgiFinal set of smp_write_bus -> mptable_write_buses changes. blob | commitdiff | raw
2008-01-18 Stefan ReinauerPlease bear with me - another rename checkin. This... blob | commitdiff | raw | diff to current
2007-12-19 Marc JonesInitial AMD Serengeti_Cheetah_FAM10 platform for Barcel... blob | commitdiff | raw | diff to current
my coreboot WIP stuff (asus m5a99x-evo board)