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Fix timer frequency detection on Sandybridge
[coreboot.git] / src / cpu / x86 / 16bit / entry16.lds
2011-10-13 Stefan ReinauerLoad an IDT with NULL limit blob | commitdiff | raw
2010-04-09 Stefan Reinauerdrop unused files blob | commitdiff | raw | diff to current
2004-10-14 Eric Biederman- Add new cvs code to cvs blob | commitdiff | raw | diff to current
my coreboot WIP stuff (asus m5a99x-evo board)