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Fix MTRR TOM2 WB cache setup for AMD CPUs > revF.
[coreboot.git] / documentation / POSTCODES
2010-09-23 Uwe HermannWhitespace/typo/cosmetic fixes (trivial). blob | commitdiff | raw
2009-04-18 Uwe Hermanns/LinuxBIOS/coreboot/. blob | commitdiff | raw | diff to current
2007-03-03 Uwe HermannDocument POST codes emitted by LinuxBIOSv2. blob | commitdiff | raw | diff to current
my coreboot WIP stuff (asus m5a99x-evo board)