From: Patrick Georgi Date: Sat, 6 Jun 2009 07:19:53 +0000 (+0000) Subject: Change the CBFS build process to use coreboot.rom X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=commitdiff_plain;h=240ef7c7691a29e96f7710b2f6d6d95b5bb53d13;hp=aa58f5427ff5188bc867b1016ca2a41e0a516519;p=coreboot.git Change the CBFS build process to use coreboot.rom instead of coreboot.strip. That fixes the normal image because the calculations for its offset in the ROM match reality again. This requires changes in CBFS configurations to minimize the bootblock size. These are also done for CBFS boards. Other than this a couple of minor fixes are in this patch: - make asus/m2v-mx_se build with abuild with a crosscompiler - move CONFIG_CBFS for hp/dl145_g3 to Options.lb as it's done everywhere else - change the default config of abuild to not provide ROM_IMAGE_SIZE values for the images in a CBFS configuration - change abuild's crosscompile autodetection to not try to use "i386-elf-i386-elf-gcc" (which is bogus) Except for the latter two abuild changes (both in util/abuild/abuild), they're available as patch set on the mailing list in a mail from 2009-06-05 titled [PATCH]es to get normal image to work again with CBFS The changes in util/abuild/abuild are trivial and abuild tested. As discussed on the list, targets/hp/dl145_g3/Config-abuild.lb is deleted, now that Config.lb works again. Signed-off-by: Patrick Georgi Acked-by: Ronald G. Minnich Acked-by: Uwe Hermann git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4344 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- diff --git a/src/config/failovercalculation.lb b/src/config/failovercalculation.lb index 9206e99cd..909812b7e 100644 --- a/src/config/failovercalculation.lb +++ b/src/config/failovercalculation.lb @@ -10,8 +10,13 @@ else default ROM_SECTION_SIZE = FALLBACK_SIZE default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - default ROM_SECTION_OFFSET = 0 + if CONFIG_CBFS + default ROM_SECTION_SIZE = FALLBACK_SIZE + default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) + else + default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) + default ROM_SECTION_OFFSET = 0 + end end end diff --git a/src/config/nofailovercalculation.lb b/src/config/nofailovercalculation.lb index 270532649..96bce17a7 100644 --- a/src/config/nofailovercalculation.lb +++ b/src/config/nofailovercalculation.lb @@ -6,8 +6,13 @@ if USE_FALLBACK_IMAGE default ROM_SECTION_SIZE = FALLBACK_SIZE default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 + if CONFIG_CBFS + default ROM_SECTION_SIZE = FALLBACK_SIZE + default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FALLBACK_SIZE ) + else + default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) + default ROM_SECTION_OFFSET = 0 + end end ## diff --git a/src/config/nofailovercalculation128.lb b/src/config/nofailovercalculation128.lb index b000e7886..9b0d7de54 100644 --- a/src/config/nofailovercalculation128.lb +++ b/src/config/nofailovercalculation128.lb @@ -6,8 +6,13 @@ if USE_FALLBACK_IMAGE default ROM_SECTION_SIZE = FALLBACK_SIZE default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 + if CONFIG_CBFS + default ROM_SECTION_SIZE = FALLBACK_SIZE + default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FALLBACK_SIZE ) + else + default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) + default ROM_SECTION_OFFSET = 0 + end end ## diff --git a/src/mainboard/emulation/qemu-x86/Config.lb b/src/mainboard/emulation/qemu-x86/Config.lb index 160bfa6ac..9af9df3c5 100644 --- a/src/mainboard/emulation/qemu-x86/Config.lb +++ b/src/mainboard/emulation/qemu-x86/Config.lb @@ -3,14 +3,14 @@ ## (coreboot plus bootloader) will live in the boot rom chip. ## default ROM_SIZE = 256 * 1024 -default ROM_SECTION_SIZE = ROM_SIZE +default ROM_SECTION_SIZE = ROM_IMAGE_SIZE default ROM_SECTION_OFFSET = 0 ## ## Compute the start location and size size of ## The coreboot bootloader. ## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) +default PAYLOAD_SIZE = ( ROM_SIZE - ROM_IMAGE_SIZE ) default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) ## diff --git a/src/mainboard/emulation/qemu-x86/Options.lb b/src/mainboard/emulation/qemu-x86/Options.lb index 0b8ce4b59..be18eb0b4 100644 --- a/src/mainboard/emulation/qemu-x86/Options.lb +++ b/src/mainboard/emulation/qemu-x86/Options.lb @@ -100,7 +100,7 @@ default CONFIG_PCI_OPTION_ROM_RUN_REALMODE=1 ## ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. default ROM_IMAGE_SIZE = 65536 -default FALLBACK_SIZE = 131072 +default FALLBACK_SIZE = ROM_IMAGE_SIZE ## ## Use a small 8K stack diff --git a/src/mainboard/hp/dl145_g3/Options.lb b/src/mainboard/hp/dl145_g3/Options.lb index 5fda0e5f8..a66c59990 100644 --- a/src/mainboard/hp/dl145_g3/Options.lb +++ b/src/mainboard/hp/dl145_g3/Options.lb @@ -121,9 +121,7 @@ default ROM_SIZE=524288 ## ## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## -#default FALLBACK_SIZE=131072 -#256K -default FALLBACK_SIZE=0x40000 +default FALLBACK_SIZE=ROM_IMAGE_SIZE #more 1M for pgtbl default CONFIG_LB_MEM_TOPK=2048 @@ -329,5 +327,9 @@ default MAXIMUM_CONSOLE_LOGLEVEL=8 ## Select power on after power fail setting default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" +## +## CBFS +default CONFIG_CBFS=1 + ### End Options.lb end diff --git a/src/mainboard/kontron/986lcd-m/Options.lb b/src/mainboard/kontron/986lcd-m/Options.lb index 30c66862c..f4ab0dfd7 100644 --- a/src/mainboard/kontron/986lcd-m/Options.lb +++ b/src/mainboard/kontron/986lcd-m/Options.lb @@ -249,7 +249,7 @@ default HEAP_SIZE=0x8000 ### Compute the location and size of where this firmware image ### (coreboot plus bootloader) will live in the boot rom chip. ### -default FALLBACK_SIZE=131072 +default FALLBACK_SIZE=ROM_IMAGE_SIZE ## ## coreboot C code runs at this location in RAM diff --git a/src/mainboard/via/vt8454c/Options.lb b/src/mainboard/via/vt8454c/Options.lb index d9cf995cd..3f1bdb768 100644 --- a/src/mainboard/via/vt8454c/Options.lb +++ b/src/mainboard/via/vt8454c/Options.lb @@ -158,7 +158,7 @@ default CONFIG_IOAPIC=1 ## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy. default ROM_IMAGE_SIZE = 65536 -default FALLBACK_SIZE = 131072 +default FALLBACK_SIZE = ROM_IMAGE_SIZE ## ## Use a small 8K stack diff --git a/targets/asus/m2v-mx_se/Config-abuild.lb b/targets/asus/m2v-mx_se/Config-abuild.lb index a396ae984..eaa917d10 100644 --- a/targets/asus/m2v-mx_se/Config-abuild.lb +++ b/targets/asus/m2v-mx_se/Config-abuild.lb @@ -20,6 +20,10 @@ target asus_m2v-mx_se mainboard asus/m2v-mx_se +option CC="CROSSCC" +option CROSS_COMPILE="CROSS_PREFIX" +option HOSTCC="CROSS_HOSTCC" + ## ROM_SIZE is the total number of bytes allocated for coreboot use ## (normal AND fallback images and payloads). diff --git a/targets/emulation/qemu-x86/Config-abuild.lb b/targets/emulation/qemu-x86/Config-abuild.lb index ce16c7ccc..bcfc9c5aa 100644 --- a/targets/emulation/qemu-x86/Config-abuild.lb +++ b/targets/emulation/qemu-x86/Config-abuild.lb @@ -8,11 +8,8 @@ option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ -option ROM_SIZE=256*1024 - romimage "fallback" option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0" payload __PAYLOAD__ end diff --git a/targets/emulation/qemu-x86/Config-lab.lb b/targets/emulation/qemu-x86/Config-lab.lb index 7dff303c1..970b95295 100644 --- a/targets/emulation/qemu-x86/Config-lab.lb +++ b/targets/emulation/qemu-x86/Config-lab.lb @@ -13,7 +13,6 @@ option HAVE_PIRQ_TABLE=1 option IRQ_SLOT_COUNT=6 romimage "image" - option ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION="-LAB" payload ../payload.elf.lzma end diff --git a/targets/emulation/qemu-x86/Config.OLPC.lb b/targets/emulation/qemu-x86/Config.OLPC.lb index de7f0ee58..93c4fb355 100644 --- a/targets/emulation/qemu-x86/Config.OLPC.lb +++ b/targets/emulation/qemu-x86/Config.OLPC.lb @@ -13,7 +13,6 @@ option HAVE_PIRQ_TABLE=1 option IRQ_SLOT_COUNT=6 romimage "image" - option ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION="-OpenBIOS" payload /tmp/olpcpayload.elf end diff --git a/targets/emulation/qemu-x86/Config.lb b/targets/emulation/qemu-x86/Config.lb index 308371305..03527483d 100644 --- a/targets/emulation/qemu-x86/Config.lb +++ b/targets/emulation/qemu-x86/Config.lb @@ -11,7 +11,6 @@ option HAVE_PIRQ_TABLE=1 option IRQ_SLOT_COUNT=6 romimage "normal" - option ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION="-GRUB2" # payload /home/stepan/core.img payload ../payload.elf diff --git a/targets/hp/dl145_g3/Config-abuild.lb b/targets/hp/dl145_g3/Config-abuild.lb deleted file mode 100644 index 95639ecb6..000000000 --- a/targets/hp/dl145_g3/Config-abuild.lb +++ /dev/null @@ -1,27 +0,0 @@ -# This will make a target directory of ./VENDOR_MAINBOARD - -target VENDOR_MAINBOARD -mainboard VENDOR/MAINBOARD - -option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" - -__COMPRESSION__ -__LOGLEVEL__ - -option ROM_SIZE=1024*(1024-32) -option FALLBACK_SIZE=1024*512 - -option CONFIG_CBFS = 1 - -romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 - option COREBOOT_EXTRA_VERSION=".0-fallback" - payload __PAYLOAD__ -end - -buildrom ./coreboot.rom ROM_SIZE "fallback" - diff --git a/targets/hp/dl145_g3/Config.lb b/targets/hp/dl145_g3/Config.lb index 1ca40cb66..47aae1b22 100644 --- a/targets/hp/dl145_g3/Config.lb +++ b/targets/hp/dl145_g3/Config.lb @@ -25,11 +25,9 @@ target dl145_g3 mainboard hp/dl145_g3 option ROM_SIZE= 1024*1024 -option CONFIG_CBFS = 1 romimage "fallback" option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 option XIP_ROM_SIZE=0x20000 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" payload ./bios.bin.elf diff --git a/targets/kontron/986lcd-m/Config-abuild.lb b/targets/kontron/986lcd-m/Config-abuild.lb index 6924d877c..c5bb2c0d2 100644 --- a/targets/kontron/986lcd-m/Config-abuild.lb +++ b/targets/kontron/986lcd-m/Config-abuild.lb @@ -11,18 +11,15 @@ __COMPRESSION__ __LOGLEVEL__ option ROM_SIZE=1024*1024 -option FALLBACK_SIZE=1024*64 romimage "normal" option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0-normal" payload __PAYLOAD__ end romimage "fallback" option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end diff --git a/targets/kontron/986lcd-m/Config.lb b/targets/kontron/986lcd-m/Config.lb index 56c8656e3..2974fd821 100644 --- a/targets/kontron/986lcd-m/Config.lb +++ b/targets/kontron/986lcd-m/Config.lb @@ -5,20 +5,8 @@ mainboard kontron/986lcd-m ## (normal AND fallback images and payloads). option ROM_SIZE = 1024 * 1024 -# Use this line instead if you want to use onboard VGA: -# option ROM_SIZE = (1024 * 1024) - (64 * 1024) - -## ROM_IMAGE_SIZE is the maximum number of bytes allowed for a coreboot image, -## not including any payload. -option ROM_IMAGE_SIZE = 128 * 1024 - -## FALLBACK_SIZE is the amount of the ROM the complete fallback image -## (including payload) will use. -option FALLBACK_SIZE = ROM_SIZE - romimage "fallback" option USE_FALLBACK_IMAGE = 1 - option ROM_IMAGE_SIZE = 144 * 1024 payload ../payload.elf end diff --git a/targets/via/vt8454c/Config-abuild.lb b/targets/via/vt8454c/Config-abuild.lb index d208e7479..a6c5ef155 100644 --- a/targets/via/vt8454c/Config-abuild.lb +++ b/targets/via/vt8454c/Config-abuild.lb @@ -29,14 +29,12 @@ option CROSS_COMPILE="CROSS_PREFIX" option HOSTCC="CROSS_HOSTCC" option ROM_SIZE=512*1024 -option FALLBACK_SIZE=512*1024 __COMPRESSION__ __LOGLEVEL__ romimage "fallback" option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x15000 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end diff --git a/targets/via/vt8454c/Config.lb b/targets/via/vt8454c/Config.lb index a75c1e3b0..b98352b8d 100644 --- a/targets/via/vt8454c/Config.lb +++ b/targets/via/vt8454c/Config.lb @@ -30,14 +30,12 @@ option ROM_SIZE=(512-64)*1024 romimage "normal" option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x14000 option COREBOOT_EXTRA_VERSION=".0-normal" payload $(HOME)/payload.elf end romimage "fallback" option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x14000 option COREBOOT_EXTRA_VERSION=".0-fallback" payload $(HOME)/payload.elf end diff --git a/util/abuild/abuild b/util/abuild/abuild index 5f6120faa..47decf61e 100755 --- a/util/abuild/abuild +++ b/util/abuild/abuild @@ -176,14 +176,20 @@ EOF cat < %s.bootblock\n\n" %i.name) file.write("\t./cbfstool %s create %s %s %s.bootblock\n" %(i.name, romsize, bootblocksize, i.name))