From: Rudolf Marek <r.marek@assembler.cz>
Date: Wed, 29 Jun 2011 21:47:20 +0000 (+0200)
Subject: Improve VIA K8M890 HT settings. Use recommended settings for ROMSIP and
X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=commitdiff_plain;h=23b215272d4d136efcac5f3b5712d2a1d76a91d9;hp=0d21cd36b781076409d370935faf6081d970f644;p=coreboot.git

Improve VIA K8M890 HT settings. Use recommended settings for ROMSIP and
for the transmit clock driving control. Unfortunately this is not enough
to make the HT1000 work reliably, therefore blacklist this for now in CPU
HT code. If ever anyone figure out what is wrong, it could be removed. The
downgrading now makes the board work on HT800, which is certainly better than
not at all with a HT1000 CPU.

Change-Id: I949bfd9b0b48ee12bd0234c2fb1deaaa773bd235
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Reviewed-on: http://review.coreboot.org/68
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
---

diff --git a/src/northbridge/amd/amdk8/incoherent_ht.c b/src/northbridge/amd/amdk8/incoherent_ht.c
index 4b5209267..4d0d0259f 100644
--- a/src/northbridge/amd/amdk8/incoherent_ht.c
+++ b/src/northbridge/amd/amdk8/incoherent_ht.c
@@ -148,8 +148,11 @@ static uint16_t ht_read_freq_cap(device_t dev, uint8_t pos)
 	}
 
 	printk(BIOS_SPEW, "pos=0x%x, filtered freq_cap=0x%x\n", pos, freq_cap);
-	//printk(BIOS_SPEW, "capping to 800/600/400/200 MHz\n");
-	//freq_cap &= 0x3f;
+
+	#if CONFIG_SOUTHBRIDGE_VIA_K8M890 == 1
+	freq_cap &= 0x3f;
+	printk(BIOS_INFO, "Limiting HT to 800/600/400/200 MHz until K8M890 HT1000 is fixed.\n");
+	#endif
 	return freq_cap;
 }
 
diff --git a/src/southbridge/via/k8t890/early_car.c b/src/southbridge/via/k8t890/early_car.c
index 3fb70033d..c554c4993 100644
--- a/src/southbridge/via/k8t890/early_car.c
+++ b/src/southbridge/via/k8t890/early_car.c
@@ -77,6 +77,8 @@ u8 k8t890_early_setup_ht(void)
 	print_debug("K8T800 Pro found at LDT ");
 #elif CONFIG_SOUTHBRIDGE_VIA_K8M890
 	print_debug("K8M890 found at LDT ");
+	/* K8M890 fix HT delay */
+	pci_write_config8(PCI_DEV(0, 0x0, 2), 0xab, 0x22);
 #elif CONFIG_SOUTHBRIDGE_VIA_K8T890
 	print_debug("K8T890 found at LDT ");
 #endif
diff --git a/src/southbridge/via/k8t890/romstrap.inc b/src/southbridge/via/k8t890/romstrap.inc
index 4add0087e..5b24948df 100644
--- a/src/southbridge/via/k8t890/romstrap.inc
+++ b/src/southbridge/via/k8t890/romstrap.inc
@@ -52,7 +52,27 @@ tblpointer:
 .long 0x0
 .long 0x0
 
-#elif CONFIG_SOUTHBRIDGE_VIA_K8M890 || CONFIG_SOUTHBRIDGE_VIA_K8T890
+#elif CONFIG_SOUTHBRIDGE_VIA_K8M890
+
+tblpointer:
+.long 0x504400FF, 0x61970FC2	//;200M
+.long 0x504400FF, 0x61970FC2	//;400M
+.long 0x504400FF, 0x61970FC2	//;600M
+.long 0x504400FF, 0x61970FC2	//;800M
+.long 0x504400FF, 0x61970FC2	//;1000M
+.long 0x0
+.long 0x0
+.long 0x0
+.long 0x0
+.long 0x0
+.long 0x0
+.long 0x0
+.long 0x0
+.long 0x0
+.long 0x0
+
+
+#elif CONFIG_SOUTHBRIDGE_VIA_K8T890
 
 tblpointer:
 .long 0x504400AA, 0x61970FC2	//;200M