- sc520 updates. move PAR setup to mainboard auto.c

- some ts5300 code. Let's push this upstream for now.
- fix a typo in device.c

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2211 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/src/cpu/amd/sc520/raminit.c b/src/cpu/amd/sc520/raminit.c
index 21a786de00c62a8698b714add1b10e10ed9abf7c..9a914956dc450187eec8083cb591363734cfef01 100644 (file)
--- a/src/cpu/amd/sc520/raminit.c
+++ b/src/cpu/amd/sc520/raminit.c
@@ -83,11 +83,15 @@ setupsc520(void){
   sp = (unsigned short *)0xfffef040;
   *sp = 0;
 
+  // moved to auto.c by stepan
+  setup_pars();
+#if 0
   /* as per the book: */
   /* PAR register setup */
        /* set up the PAR registers as they are on the MSM586SEG */
        par = (unsigned long *) 0xfffef088;
 
+       
        /* NOTE: move this to mainboard.c ASAP */
 #if 1
 
@@ -111,7 +115,7 @@ setupsc520(void){
        par += 15;
 #endif
        *par++ = 0x8a020200; /*PAR15: BOOTCS:code:nocache:write:Base 0x2000000, size 0x80000:*/
-
+#endif
 
        /* CPCSF register */
 

diff --git a/src/devices/device.c b/src/devices/device.c
index 4ca469b19132f6ac9c36f6b5e5235934992bd9c3..f64e51d1f66fecf6e3af4a605d00742afcbeb675 100644 (file)
--- a/src/devices/device.c
+++ b/src/devices/device.c
@@ -684,7 +684,7 @@ void dev_configure(void)
  */
 void dev_enable(void)
 {
-       printk_info("Enabling resourcess...\n");
+       printk_info("Enabling resources...\n");
 
        /* now enable everything. */
        enable_resources(&dev_root);

diff --git a/src/mainboard/digitallogic/msm586seg/auto.c b/src/mainboard/digitallogic/msm586seg/auto.c
index 33c1cb9c41e63fe35d834e499f69e92c3bf8c8f6..1917fd097e8eb772941a7ee4fe615ea96eb3a7ac 100644 (file)
--- a/src/mainboard/digitallogic/msm586seg/auto.c
+++ b/src/mainboard/digitallogic/msm586seg/auto.c
@@ -12,6 +12,34 @@
 #include "ram/ramtest.c"
 #include "cpu/x86/bist.h"
 //#include "lib/delay.c"
+
+void setup_pars(void)
+{
+       volatile unsigned long *par;
+       /* as per the book: */
+       /* PAR register setup */
+        /* set up the PAR registers as they are on the MSM586SEG */
+        par = (unsigned long *) 0xfffef088;
+
+        /* NOTE: move this to mainboard.c ASAP */
+        *par++ = 0x607c00a0; /*PAR0: PCI:Base 0xa0000; size 0x1f000:*/
+        *par++ = 0x480400d8; /*PAR1: GP BUS MEM:CS2:Base 0xd8, size 0x4:*/
+        *par++ = 0x340100ea; /*PAR2: GP BUS IO:CS5:Base 0xea, size 0x1:*/
+        *par++ = 0x380701f0; /*PAR3: GP BUS IO:CS6:Base 0x1f0, size 0x7:*/
+        *par++ = 0x3c0003f6; /*PAR4: GP BUS IO:CS7:Base 0x3f6, size 0x0:*/
+        *par++ = 0x35ff0400; /*PAR5: GP BUS IO:CS5:Base 0x400, size 0xff:*/
+        *par++ = 0x35ff0600; /*PAR6: GP BUS IO:CS5:Base 0x600, size 0xff:*/
+        *par++ = 0x35ff0800; /*PAR7: GP BUS IO:CS5:Base 0x800, size 0xff:*/
+        *par++ = 0x35ff0a00; /*PAR8: GP BUS IO:CS5:Base 0xa00, size 0xff:*/
+        *par++ = 0x35ff0e00; /*PAR9: GP BUS IO:CS5:Base 0xe00, size 0xff:*/
+        *par++ = 0x34fb0104; /*PAR10: GP BUS IO:CS5:Base 0x104, size 0xfb:*/
+        *par++ = 0x35af0200; /*PAR11: GP BUS IO:CS5:Base 0x200, size 0xaf:*/
+        *par++ = 0x341f03e0; /*PAR12: GP BUS IO:CS5:Base 0x3e0, size 0x1f:*/
+        *par++ = 0xe41c00c0; /*PAR13: SDRAM:code:cache:nowrite:Base 0xc0000, size 0x7000:*/
+        *par++ = 0x545c00c8; /*PAR14: GP BUS MEM:CS5:Base 0xc8, size 0x5c:*/
+        *par++ = 0x8a020200; /*PAR15: BOOTCS:code:nocache:write:Base 0x2000000, size 0x80000:*/
+}
+
 #include "cpu/amd/sc520/raminit.c"
 
 typedef void (*lj)(void);
@@ -161,6 +189,8 @@ static inline void irqinit(void){
 #endif
 }
 
+
+
 static void main(unsigned long bist)
 {
     volatile int i;

diff --git a/src/mainboard/technologic/ts5300/Config.lb b/src/mainboard/technologic/ts5300/Config.lb
index 8f27fe694cd7a24dd0a321105c0d32c7c98d73cd..87041cd317ee433f262be90e9f7fc67ed932c215 100644 (file)
--- a/src/mainboard/technologic/ts5300/Config.lb
+++ b/src/mainboard/technologic/ts5300/Config.lb
@@ -2,7 +2,7 @@
 ## Compute the location and size of where this firmware image
 ## (linuxBIOS plus bootloader) will live in the boot rom chip.
 ##
-default ROM_SIZE = 512 * 1024 
+default ROM_SIZE = 128 * 1024 
 default FALLBACK_SIZE = 0x10000
 if USE_FALLBACK_IMAGE
        default ROM_SECTION_SIZE   = FALLBACK_SIZE
@@ -134,13 +134,13 @@ chip cpu/amd/sc520
        device pci_domain 0 on 
                device pci 0.0 on end
        
-               chip drivers/pci/onboard
-                       device pci 12.0 on end # enet
-               end
-               chip drivers/pci/onboard
-                       device pci 14.0 on end # 69000
-                       register "rom_address" = "0x2000000"
-               end
+#              chip drivers/pci/onboard
+#                      device pci 12.0 on end # enet
+#              end
+#              chip drivers/pci/onboard
+#                      device pci 14.0 on end # 69000
+#                      register "rom_address" = "0x2000000"
+#              end
 #              register "com1" = "{1}"
 #              register "com1" = "{1, 0, 0x3f8, 4}"
        end

diff --git a/src/mainboard/technologic/ts5300/Options.lb b/src/mainboard/technologic/ts5300/Options.lb
index 1ff28b2eabc8e257cbcfa3332a0ed013ba367f51..62f601f4c57d8d3a6eeed39b64a590a746400c52 100644 (file)
--- a/src/mainboard/technologic/ts5300/Options.lb
+++ b/src/mainboard/technologic/ts5300/Options.lb
@@ -33,6 +33,10 @@ uses CROSS_COMPILE
 uses CC
 uses HOSTCC
 uses OBJCOPY
+uses TTYS0_BAUD
+uses TTYS0_BASE
+uses TTYS0_LCS
+
 
 uses CONFIG_CONSOLE_SERIAL8250
 
@@ -48,6 +52,24 @@ uses CONFIG_PCI_ROM_RUN
 
 
 default CONFIG_CONSOLE_SERIAL8250=1
+## Select the serial console baud rate
+#default TTYS0_BAUD=115200
+#default TTYS0_BAUD=57600
+#default TTYS0_BAUD=38400
+#default TTYS0_BAUD=19200
+default TTYS0_BAUD=9600
+#default TTYS0_BAUD=4800
+#default TTYS0_BAUD=2400
+#default TTYS0_BAUD=1200
+
+# Select the serial console base port
+default TTYS0_BASE=0x2f8
+
+# Select the serial protocol
+# This defaults to 8 data bits, 1 stop bit, and no parity
+default TTYS0_LCS=0x3
+
+
 default DEFAULT_CONSOLE_LOGLEVEL=9
 default MAXIMUM_CONSOLE_LOGLEVEL=9
 ## ROM_SIZE is the size of boot ROM that this board will use.

diff --git a/src/mainboard/technologic/ts5300/auto.c b/src/mainboard/technologic/ts5300/auto.c
index 294c80271355a03dba837a0a5a9c170b9bcf5d26..42cddb25de12dd0023b6c40f2bab8d3f7d2d381a 100644 (file)
--- a/src/mainboard/technologic/ts5300/auto.c
+++ b/src/mainboard/technologic/ts5300/auto.c
@@ -12,39 +12,46 @@
 #include "ram/ramtest.c"
 #include "cpu/x86/bist.h"
 //#include "lib/delay.c"
-#include "cpu/amd/sc520/raminit.c"
-
-struct mem_controller {
-       int i;
-};
-
-static void hard_reset(void)
-{
-}
 
-static void memreset_setup(void)
+void setup_pars(void)
 {
-}
+        volatile unsigned long *par;
+        /* as per the book: */
+        /* PAR register setup */
+        /* set up the PAR registers as they are on the MSM586SEG */
+        par = (unsigned long *) 0xfffef088;
 
-static void memreset(int controllers, const struct mem_controller *ctrl)
-{
+        /* NOTE: move this to mainboard.c ASAP */
+       *par++ = 0x00000000;
+       *par++ = 0x340f0070;
+       *par++ = 0x380701f0;
+       *par++ = 0x3c0103f6;
+       *par++ = 0x2c0f0300;
+       *par++ = 0x447c00a0;
+       *par++ = 0xe600000c;
+       *par++ = 0x300046e8;
+       *par++ = 0x500400d0;
+       *par++ = 0x281f0140;
+       *par++ = 0x00000000;
+       *par++ = 0x00000000;
+       *par++ = 0x00000000;
+       *par++ = 0x8a07c940;
+       *par++ = 0x00000000;
+       *par++ = 0xee00400e;
 }
 
+#include "cpu/amd/sc520/raminit.c"
 
+#include "debug.c"
 
-static inline void activate_spd_rom(const struct mem_controller *ctrl)
-{
-        /* nothing to do */
-}
- 
-static inline int spd_read_byte(unsigned device, unsigned address)
+static void hard_reset(void)
 {
-//     return smbus_read_byte(device, address);
+       print_err("Hard reset called.\n");
+       while (1) ;
 }
 
-//#include "sdram/generic_sdram.c"
-
-static inline void dumpmem(void){
+static inline void dumpmem(void)
+{
   int i, j;
   unsigned char *l;
   unsigned char c;
@@ -159,31 +166,30 @@ static inline void irqinit(void){
 
 static void main(unsigned long bist)
 {
-    volatile int i;
-    for(i = 0; i < 100; i++)
-      ;
-
+       volatile int i;
+       for(i = 0; i < 100; i++)
+               ;
 
         setupsc520();
        irqinit();
         uart_init();
         console_init();
-               for(i = 0; i < 100; i++)
-         print_err("fill usart\r\n");
-               //              while(1)
-               print_err("HI THERE!\r\n");
-               //                      sizemem();
+       
+       //for(i = 0; i < 100; i++)
+       //      print_err("fill usart\r\n");
+       
+       print_err("Technologic Systems TS5300 - http://www.embeddedx86.com/\r\n");
+       
        staticmem();
-       print_err("c60 is "); print_err_hex16(*(unsigned short *)0xfffefc60); 
-       print_err("\n");
+
+       // sw ctimer millisecond count
+       //print_err("\r\nc60 is "); print_err_hex16(*(unsigned short *)0xfffefc60); 
+       //print_err("\r\n");
                        
-       //                      while(1)
-       print_err("STATIC MEM DONE\r\n");
-       outb(0xee, 0x80);
-       print_err("loop forever ...\n");
+       print_err("Memory initialized: 32MB\r\n");
 
 
-#if 0
+#if 1
 
        /* clear memory 1meg */
         __asm__ volatile(
@@ -216,7 +222,12 @@ static void main(unsigned long bist)
        // Check 32MB of memory @ 0
        ram_check(0x00000000, 0x02000000);
 #endif
-#if 1
+
+       /* Don't think this is needed for the ts5300. 
+        * The MMCRs are at fffef000 and the image is only 64k (without
+        * payload) so it fits exactly between MMCR and 4G
+        */
+#if 0
        {
          volatile unsigned char *src = (unsigned char *) 0x2000000 + 0x60000;
          volatile unsigned char *dst = (unsigned char *) 0x4000; 

diff --git a/src/mainboard/technologic/ts5300/mainboard.c b/src/mainboard/technologic/ts5300/mainboard.c
index 0b3e4cef4bc173c32746922b8c824ff092f927af..d2a07e28c2b4fc6ff5cb49d6b1e48fbacd86e7c4 100644 (file)
--- a/src/mainboard/technologic/ts5300/mainboard.c
+++ b/src/mainboard/technologic/ts5300/mainboard.c
@@ -39,108 +39,115 @@ static void enable_dev(struct device *dev) {
        volatile struct mmcrpic *pic = MMCRPIC;
        volatile struct mmcr *mmcr = MMCRDEFAULT;
 
-       /* ts5300 has this register set to a weird value. 
-        * follow the board, not the manual!
-        */
-
        /* currently, nothing in the device to use, so ignore it. */
        printk_err("Technologic Systems 5300 ENTER %s\n", __FUNCTION__);
 
-
        /* from fuctory bios */
        /* NOTE: the following interrupt settings made interrupts work
         * for hard drive, and serial, but not for ethernet 
         */
+
+       printk_err("Setting up PIC\n");
        /* just do what they say and nobody gets hurt. */
-       mmcr->pic.pcicr = 0 ; // M_GINT_MODE | M_S1_MODE | M_S2_MODE;
+       mmcr->pic.pcicr = 0 ;
        /* all ints to level */
        mmcr->pic.mpicmode = 0;
        mmcr->pic.sl1picmode = 0;
-       mmcr->pic.sl2picmode = 0x80;
+       mmcr->pic.sl2picmode = 0;
 
-       mmcr->pic.intpinpol = 0;
+       mmcr->pic.intpinpol = 0x100;
 
        mmcr->pic.pit0map = 1;
-       mmcr->pic.uart1map = 0xc;
-       mmcr->pic.uart2map = 0xb;
-       mmcr->pic.rtcmap = 3;
-       mmcr->pic.ferrmap = 8;
-       mmcr->pic.gp0imap = 6;
-       mmcr->pic.gp1imap = 2;
-       mmcr->pic.gp2imap = 7;
+       mmcr->pic.uart1map = 0x0c;
+       mmcr->pic.uart2map = 0x0b;
+       mmcr->pic.rtcmap  = 0x03;
+       mmcr->pic.ferrmap = 0x00;
+       mmcr->pic.intpinpol = 0x100;
+       
+       mmcr->pic.gp0imap = 0x00;
+       mmcr->pic.gp1imap = 0x02;
+       mmcr->pic.gp2imap = 0x07;
+       mmcr->pic.gp3imap = 0x05;
+       mmcr->pic.gp4imap = 0x06;
+       mmcr->pic.gp5imap = 0x0d;
        mmcr->pic.gp6imap = 0x15;
        mmcr->pic.gp7imap = 0x16;
-       mmcr->pic.gp10imap = 0x9;
+       mmcr->pic.gp8imap = 0x3;
        mmcr->pic.gp9imap = 0x4;
+       mmcr->pic.gp10imap = 0x9;
 
+       // irqdump();
 
-
-
-
-       irqdump();
-       printk_err("uart 1 ctl is 0x%x\n", *(unsigned char *) 0xfffefcc0);
-
-       printk_err("0xc20 ctl is 0x%x\n", *(unsigned short *) 0xfffefc20);
-       printk_err("0xc22 0x%x\n", *(unsigned short *) 0xfffefc22b);
-
-       /* The following block has NOT proven sufficient to get
-        * the VGA hardware to talk to us 
-        */
-       /* let's set some mmcr stuff per the BIOS settings */
-       mmcr->dbctl.dbctl = 0x10;
-       mmcr->sysarb.ctl = 6;
-       mmcr->sysarb.menb = 0xf;
-       mmcr->sysarb.prictl = 0xc0000f0f;
+       printk_err("Setting up sysarb\n");
+       mmcr->dbctl.dbctl = 0x01;
+       mmcr->sysarb.ctl = 0x00;
+       mmcr->sysarb.menb = 0x1f;
+       mmcr->sysarb.prictl = 0x40000f0f;
+       
        /* this is bios setting, depends on sysarb above */
-       mmcr->hostbridge.ctl = 0x108;
-       printk_err("TS5300 EXIT %s\n", __FUNCTION__);
+       mmcr->hostbridge.ctl = 0x0;
+       mmcr->hostbridge.tgtirqctl = 0x0;
+       mmcr->hostbridge.tgtirqsta = 0xf00;
+       mmcr->hostbridge.mstirqctl = 0x0;
+       mmcr->hostbridge.mstirqsta = 0x708;
 
+       printk_err("Setting up pio\n");
        /* pio */
-       mmcr->pio.data31_16 = 0xffbf;
-
-       /* pci stuff */
-       mmcr->pic.pciintamap = 0xa;
-
-       /* END block where vga hardware still will not talk to us */
-       /* all we get from VGA I/O addresses are ffff etc.
-        */
-       mmcr->sysmap.adddecctl = 0x10;
-
-       /* VGA now talks to us, so this adddecctl was the trick. 
-        * still no interrupts from enet. 
-        * Let's try fixing the piodata stuff, as there may be 
-        * some wire there not documented.
-        */
-       mmcr->pio.data31_16 = 0xffbf;
-       /* also, our sl?picmode needs to match fuctory bios */
-       mmcr->pic.sl1picmode = 0x80;
-       mmcr->pic.sl2picmode = 0x0;
-       /* and, finally, they do set gp5imap and we don't. 
-        */
-       mmcr->pic.gp5imap = 0xd;
-       /* remaining problem: almost certainly, the irq table is bogus
-        * NO SHOCK as it came from fuctory bios. 
-        * but let's try these 4 changes for now and see what shakes.
-        */
-       /* still not interrupts. */
+       mmcr->pio.pfs15_0 = 0xffff;
+       mmcr->pio.pfs31_16 = 0xffff;
+       mmcr->pio.cspfs = 0xfe;
+       mmcr->pio.clksel = 0x13;
+       mmcr->pio.dsctl = 0x200;
+       mmcr->pio.data15_0 = 0xde04;
+       mmcr->pio.data31_16 = 0xef9f;
+
+       printk_err("Setting up sysmap\n");
+       /* system memory map */
+       mmcr->sysmap.adddecctl = 0x04;
+       mmcr->sysmap.wpvsta = 0x8006;
+       mmcr->sysmap.par[1] = 0x340f0070;
+       mmcr->sysmap.par[2] = 0x380701f0;
+       mmcr->sysmap.par[3] = 0x3c0103f6;
+       mmcr->sysmap.par[4] = 0x2c0f0300;
+       mmcr->sysmap.par[5] = 0x447c00a0;
+       mmcr->sysmap.par[6] = 0xe600000c;
+       mmcr->sysmap.par[7] = 0x300046e8;
+       mmcr->sysmap.par[8] = 0x500400d0;
+       mmcr->sysmap.par[9] = 0x281f0140;
+       mmcr->sysmap.par[13] = 0x8a07c940;
+       mmcr->sysmap.par[15] = 0xee00400e;
+
+       printk_err("Setting up gpctl\n");
+       mmcr->gpctl.gpcsrt = 0x01;
+       mmcr->gpctl.gpcspw = 0x09;
+       mmcr->gpctl.gpcsoff = 0x01;
+       mmcr->gpctl.gprdw = 0x07;
+       mmcr->gpctl.gprdoff = 0x02;
+       mmcr->gpctl.gpwrw = 0x07;
+       mmcr->gpctl.gpwroff = 0x02;
+       
+       //mmcr->reset.sysinfo = 0xdf;
+       //mmcr->reset.rescfg = 0x5;
        /* their IRQ table is wrong. Just hardwire it */
-       {
-         char pciints[4] = {15, 15, 15, 15};
-         pci_assign_irqs(0, 12, pciints);
-       }
+       //{
+       //  char pciints[4] = {15, 15, 15, 15};
+       //  pci_assign_irqs(0, 12, pciints);
+       //}
        /* the assigned failed but we just noticed -- there is no
         * dma mapping, and selftest on e100 requires that dma work
         */
-       /* follow fuctory here */
-       mmcr->dmacontrol.extchanmapa = 0x3210;
+       mmcr->dmacontrol.extchanmapa = 0xf210;
+       mmcr->dmacontrol.extchanmapb = 0xffff;
 
        /* hack for IDIOTIC need to fix rom_start */
        printk_err("Patching rom_start due to sc520 limits\n");
-       rom_start = 0x2000000 + 0x40000;
+       rom_start = 0x09400000 + 0xe0000;
        rom_end = rom_start + PAYLOAD_SIZE - 1;
 
+       printk_err("TS5300 EXIT %s\n", __FUNCTION__);
        
 }
+
 struct chip_operations mainboard_technologic_ts5300_ops = {
        CHIP_NAME("Technologic Systems TS5300 mainboard ")
        .enable_dev = enable_dev