zero warnings days: unify mp tables. fix warnings.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5448 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/src/mainboard/amd/dbm690t/mptable.c b/src/mainboard/amd/dbm690t/mptable.c
index 0bc73d7440681f243c0b23e84a168583ec474e66..43adaeaec64097f6ccaa61f0245ed58e91934348 100644 (file)
--- a/src/mainboard/amd/dbm690t/mptable.c
+++ b/src/mainboard/amd/dbm690t/mptable.c
@@ -41,7 +41,7 @@ extern u32 sbdn_sb600;
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "ATI     ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "DBM690T     ";
        struct mp_config_table *mc;
        int j;

diff --git a/src/mainboard/amd/mahogany/mptable.c b/src/mainboard/amd/mahogany/mptable.c
index 89f7a8308ba88718214a9527173c92f3b3370162..e2ab5abd8cefa12db8699a7034a83871f8948099 100644 (file)
--- a/src/mainboard/amd/mahogany/mptable.c
+++ b/src/mainboard/amd/mahogany/mptable.c
@@ -42,7 +42,7 @@ extern u32 sbdn_sb700;
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "AMD     ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "MAHOGANY    ";
        struct mp_config_table *mc;
        int j;

diff --git a/src/mainboard/amd/mahogany_fam10/mptable.c b/src/mainboard/amd/mahogany_fam10/mptable.c
index fdf8ada6fbf65a490cb7fa3d8310760cc2d708e4..1e3b629d084fabc1145af2d109628185cfdae64e 100644 (file)
--- a/src/mainboard/amd/mahogany_fam10/mptable.c
+++ b/src/mainboard/amd/mahogany_fam10/mptable.c
@@ -42,7 +42,7 @@ extern u32 sbdn_sb700;
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "AMD     ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "MAHOGANY    ";
        struct mp_config_table *mc;
        int j;

diff --git a/src/mainboard/amd/pistachio/mptable.c b/src/mainboard/amd/pistachio/mptable.c
index ebf4c58cf1b578cf8289aff61d90be040566670d..64ce66eff6bcf1e7365cb767a8eb90be9d22be7b 100644 (file)
--- a/src/mainboard/amd/pistachio/mptable.c
+++ b/src/mainboard/amd/pistachio/mptable.c
@@ -41,7 +41,7 @@ extern u32 sbdn_sb600;
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "ATI     ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "PISTACHIO   ";
        struct mp_config_table *mc;
        int j;

diff --git a/src/mainboard/amd/serengeti_cheetah/mptable.c b/src/mainboard/amd/serengeti_cheetah/mptable.c
index 713dabe34ed6df1d2d472181014874cd87f32427..2b2f65c39b4a9f11f17ceff16620461f06cb0d20 100644 (file)
--- a/src/mainboard/amd/serengeti_cheetah/mptable.c
+++ b/src/mainboard/amd/serengeti_cheetah/mptable.c
@@ -15,7 +15,7 @@
 static void *smp_write_config_table(void *v)
 {
         static const char sig[4] = "PCMP";
-        static const char oem[8] = "AMD     ";
+        static const char oem[8] = "COREBOOT";
         static const char productid[12] = "SERENGETI   ";
         struct mp_config_table *mc;
 

diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c b/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c
index 381d322d9d27889581dce1e65c66f98c785b77a8..b10ffe2cf5da9e08a93758ad79bbb4fff51938ef 100644 (file)
--- a/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c
@@ -34,7 +34,7 @@
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "AMD     ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "SERENGETI    ";
        struct mp_config_table *mc;
 

diff --git a/src/mainboard/arima/hdama/mptable.c b/src/mainboard/arima/hdama/mptable.c
index 5bad3922dc6facdd69c25a29b8b38350003970cf..d3219232d73d6d14cbd342314964ce0d0bd3d798 100644 (file)
--- a/src/mainboard/arima/hdama/mptable.c
+++ b/src/mainboard/arima/hdama/mptable.c
@@ -110,7 +110,7 @@ static unsigned max_apicid(void)
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "LNXI    ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "HDAMA       ";
        struct mp_config_table *mc;
        unsigned char bus_num;

diff --git a/src/mainboard/asrock/939a785gmh/mptable.c b/src/mainboard/asrock/939a785gmh/mptable.c
index 89f7a8308ba88718214a9527173c92f3b3370162..e2ab5abd8cefa12db8699a7034a83871f8948099 100644 (file)
--- a/src/mainboard/asrock/939a785gmh/mptable.c
+++ b/src/mainboard/asrock/939a785gmh/mptable.c
@@ -42,7 +42,7 @@ extern u32 sbdn_sb700;
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "AMD     ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "MAHOGANY    ";
        struct mp_config_table *mc;
        int j;

diff --git a/src/mainboard/asus/a8n_e/mptable.c b/src/mainboard/asus/a8n_e/mptable.c
index 3a0806b8743dda02ee62f614e50c2933d6af1e00..99ddcc8b3308de6a1a9771a6d98950db561e59fe 100644 (file)
--- a/src/mainboard/asus/a8n_e/mptable.c
+++ b/src/mainboard/asus/a8n_e/mptable.c
@@ -37,7 +37,7 @@ extern unsigned bus_type[256];
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "ASUS    ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "A8N-E      ";
        struct mp_config_table *mc;
        unsigned sbdn;

diff --git a/src/mainboard/asus/a8v-e_se/mptable.c b/src/mainboard/asus/a8v-e_se/mptable.c
index 40e665dbc9e226bd74e9d77744d30f9b61c9143a..059ff9e31e35aa671a80825c034fe9b878560984 100644 (file)
--- a/src/mainboard/asus/a8v-e_se/mptable.c
+++ b/src/mainboard/asus/a8v-e_se/mptable.c
@@ -26,7 +26,7 @@
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "LNXB    ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "A8V-E SE    ";
        struct mp_config_table *mc;
        int bus_isa = 42;

diff --git a/src/mainboard/broadcom/blast/mptable.c b/src/mainboard/broadcom/blast/mptable.c
index 0c39b7a9e445c289e72e96ea7044ccda52e50bc6..8a1b133bfb8635c928248dd2268cfa33ce5694c8 100644 (file)
--- a/src/mainboard/broadcom/blast/mptable.c
+++ b/src/mainboard/broadcom/blast/mptable.c
@@ -24,7 +24,7 @@ extern  unsigned sbdn2;
 static void *smp_write_config_table(void *v)
 {
         static const char sig[4] = "PCMP";
-        static const char oem[8] = "BROADCOM";
+        static const char oem[8] = "COREBOOT";
         static const char productid[12] = "BLAST       ";
         struct mp_config_table *mc;
 

diff --git a/src/mainboard/dell/s1850/mptable.c b/src/mainboard/dell/s1850/mptable.c
index 835d32f81efe2d9ab20de6f7749166304cac5299..c7fd52af3e96eee8297f8a2a4e1853793b6b554a 100644 (file)
--- a/src/mainboard/dell/s1850/mptable.c
+++ b/src/mainboard/dell/s1850/mptable.c
@@ -7,7 +7,7 @@
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "DELL    ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "S2850       ";
        struct mp_config_table *mc;
        unsigned char bus_num;

diff --git a/src/mainboard/gigabyte/ga_2761gxdk/mptable.c b/src/mainboard/gigabyte/ga_2761gxdk/mptable.c
index 2e93453297773fbd664644b35022ccbb0517bf67..aaa0a94ee1ff85cf4e8854bfef377bbe5e7456ad 100644 (file)
--- a/src/mainboard/gigabyte/ga_2761gxdk/mptable.c
+++ b/src/mainboard/gigabyte/ga_2761gxdk/mptable.c
@@ -38,7 +38,7 @@ extern unsigned bus_type[256];
 static void *smp_write_config_table(void *v)
 {
         static const char sig[4] = "PCMP";
-        static const char oem[8] = "GIGABYTE";
+        static const char oem[8] = "COREBOOT";
         static const char productid[12] = "GA-2761GXDK ";
         struct mp_config_table *mc;
        unsigned sbdn;

diff --git a/src/mainboard/gigabyte/m57sli/mptable.c b/src/mainboard/gigabyte/m57sli/mptable.c
index 3c5f5a2a864215e93c22c3565503a655d892ea8b..93e6c274c9729cec4d3018b96b57c91dcf06dc4c 100644 (file)
--- a/src/mainboard/gigabyte/m57sli/mptable.c
+++ b/src/mainboard/gigabyte/m57sli/mptable.c
@@ -39,7 +39,7 @@ extern unsigned bus_type[256];
 static void *smp_write_config_table(void *v)
 {
         static const char sig[4] = "PCMP";
-        static const char oem[8] = "GIGABYTE";
+        static const char oem[8] = "COREBOOT";
         static const char productid[12] = "M57SLI      ";
         struct mp_config_table *mc;
        unsigned sbdn;

diff --git a/src/mainboard/hp/dl145_g3/mptable.c b/src/mainboard/hp/dl145_g3/mptable.c
index 6aa3f0e404952874de5e7d2343e02a69c8e6bc17..e9ce35f8882bd414adddbd6618738bb9686a45d1 100644 (file)
--- a/src/mainboard/hp/dl145_g3/mptable.c
+++ b/src/mainboard/hp/dl145_g3/mptable.c
@@ -46,7 +46,7 @@
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "HP      ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "TREX        ";
        struct mp_config_table *mc;
 

diff --git a/src/mainboard/hp/dl145_g3/romstage.c b/src/mainboard/hp/dl145_g3/romstage.c
index 218304e2f5ce9b7ca9378bf842f3f4f2fa3c1a1d..2e4d4109dfe1ea4f2186834bac0fbcc30f07bff9 100644 (file)
--- a/src/mainboard/hp/dl145_g3/romstage.c
+++ b/src/mainboard/hp/dl145_g3/romstage.c
@@ -185,7 +185,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
                DIMM5, DIMM7, 0, 0,
        };
 
-       struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
+       struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE 
+               + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
 
        int needs_reset;
        unsigned bsp_apicid = 0;
@@ -216,8 +217,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 //     setup_early_ipmi_serial();
        pilot_early_init(SERIAL_DEV); //config port is being taken from SERIAL_DEV
        printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
-
-       print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n");
+       printk(BIOS_DEBUG, "bsp_apicid=%02x\n", bsp_apicid);
 
 #if CONFIG_MEM_TRAIN_SEQ == 1
        set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram
@@ -243,7 +243,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        {
                msr_t msr;
                msr=rdmsr(0xc0010042);
-               print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n");
+               printk(BIOS_DEBUG, "begin msr fid, vid %08x %08x\n", msr.hi, msr.lo);
        }
        enable_fid_change();
        enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn);
@@ -252,7 +252,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        {
                msr_t msr;
                msr=rdmsr(0xc0010042);
-               print_debug("end   msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n");
+               printk(BIOS_DEBUG, "end msr fid, vid %08x %08x\n", msr.hi, msr.lo);
        }
 #endif
 
@@ -261,7 +261,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
        // fidvid change will issue one LDTSTOP and the HT change will be effective too
        if (needs_reset) {
-               print_info("ht reset -\n");
+               printk(BIOS_INFO, "ht reset -\n");
                soft_reset();
        }
 
@@ -278,6 +278,5 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
 
        post_cache_as_ram();
-
 }
 

diff --git a/src/mainboard/ibm/e325/mptable.c b/src/mainboard/ibm/e325/mptable.c
index dc95e95b02f93af8af7c21919ff51cc7e6a38374..61e123d4d0bb00a421f23d708bd8807f171cd206 100644 (file)
--- a/src/mainboard/ibm/e325/mptable.c
+++ b/src/mainboard/ibm/e325/mptable.c
@@ -7,7 +7,7 @@
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "IBM     ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "E325        ";
        struct mp_config_table *mc;
 
@@ -49,6 +49,7 @@ static void *smp_write_config_table(void *v)
                        bus_isa++;
                } else {
                        printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
+                       bus_8111_0 = 1;
                        bus_8111_1 = 4;
                        bus_isa = 5;
                }

diff --git a/src/mainboard/ibm/e326/mptable.c b/src/mainboard/ibm/e326/mptable.c
index dc95e95b02f93af8af7c21919ff51cc7e6a38374..aa5a87f07597734d4ad1b66f3b858098ba1cd5ee 100644 (file)
--- a/src/mainboard/ibm/e326/mptable.c
+++ b/src/mainboard/ibm/e326/mptable.c
@@ -7,7 +7,7 @@
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "IBM     ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "E325        ";
        struct mp_config_table *mc;
 
@@ -49,6 +49,7 @@ static void *smp_write_config_table(void *v)
                        bus_isa++;
                } else {
                        printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
+                       bus_8111_0 = 1;
                        bus_8111_1 = 4;
                        bus_isa = 5;
                }
@@ -57,7 +58,6 @@ static void *smp_write_config_table(void *v)
                dev = dev_find_slot(1, PCI_DEVFN(0x01,0));
                if (dev) {
                        bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-
                } else {
                        printk(BIOS_DEBUG, "ERROR - could not find PCI 1:01.0, using defaults\n");
                        bus_8131_1 = 2;

diff --git a/src/mainboard/intel/eagleheights/debug.c b/src/mainboard/intel/eagleheights/debug.c
index f9d218d6aa5d8f0871a81f7fcba1dbb6b89d2dd4..f98ca8e9b8e6269f0d3863c8ebb7dc9491c92cf4 100644 (file)
--- a/src/mainboard/intel/eagleheights/debug.c
+++ b/src/mainboard/intel/eagleheights/debug.c
@@ -210,7 +210,7 @@ static inline void dump_bar14(unsigned dev)
        print_debug("\n");
 }
 
-static void dump_pci_devices(void)
+static inline void dump_pci_devices(void)
 {
        device_t dev;
        for(dev = PCI_DEV(0, 0, 0);

diff --git a/src/mainboard/intel/eagleheights/mptable.c b/src/mainboard/intel/eagleheights/mptable.c
index d2ff79870bf564a565bf9f13960be6347726ba77..74147cf888a7c9ff9c07689024381ed7d3809f7e 100644 (file)
--- a/src/mainboard/intel/eagleheights/mptable.c
+++ b/src/mainboard/intel/eagleheights/mptable.c
@@ -61,7 +61,7 @@
 static void *smp_write_config_table(void *v)
 {
         static const char sig[4] = "PCMP";
-        static const char oem[8] = "Intel   ";
+        static const char oem[8] = "COREBOOT";
         static const char productid[12] = "EagleHeights";
         struct mp_config_table *mc;
        unsigned char bus_num, bus_chipset, bus_isa, bus_pci;

diff --git a/src/mainboard/intel/jarrell/mptable.c b/src/mainboard/intel/jarrell/mptable.c
index c75657982ae0623af35adac8afaa7151f1535970..73aa57554082afd5d2b49f597a446e57f2d56fda 100644 (file)
--- a/src/mainboard/intel/jarrell/mptable.c
+++ b/src/mainboard/intel/jarrell/mptable.c
@@ -7,7 +7,7 @@
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "LNXI    ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "SE7520JR20  ";
        struct mp_config_table *mc;
        unsigned char bus_num;
@@ -16,7 +16,7 @@ static void *smp_write_config_table(void *v)
        unsigned char bus_pxhd_2;
        unsigned char bus_pxhd_3 = 0;
        unsigned char bus_pxhd_4 = 0;
-       unsigned char bus_pxhd_x;
+       unsigned char bus_pxhd_x = 0;
        unsigned char bus_ich5r_1;
        unsigned int bus_pxhd_id;
 
@@ -137,6 +137,7 @@ static void *smp_write_config_table(void *v)
                else {
                        printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.3\n");
                }
+
                /* pxhd apic 5 */
                if(bus_pxhd_3) { /* Active riser pxhd */
                        dev = dev_find_slot(bus_pxhd_x, PCI_DEVFN(0x00,1));
@@ -164,7 +165,6 @@ static void *smp_write_config_table(void *v)
                        }
                }
        }
-
        
        /* ISA backward compatibility interrupts  */
        smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
@@ -218,8 +218,8 @@ static void *smp_write_config_table(void *v)
        smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
                bus_isa, 0x00, MP_APIC_ALL, 0x01);
 
+       /* FIXME verify I have the irqs handled for all of the risers */
 
-#warning "FIXME verify I have the irqs handled for all of the risers"
        /* 2:3.0 PCI Slot 1 */
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
                bus_pxhd_1, (3<<2)|0, 0x9, 0x0);

diff --git a/src/mainboard/intel/mtarvon/mptable.c b/src/mainboard/intel/mtarvon/mptable.c
index 749745df436c72e7545292159b700a87b5fa4d37..da94a99faa38feb03c19c85a9c4d3a1cc115e3b8 100644 (file)
--- a/src/mainboard/intel/mtarvon/mptable.c
+++ b/src/mainboard/intel/mtarvon/mptable.c
@@ -29,7 +29,7 @@
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "Intel   ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "Mt. Arvon   ";
        struct mp_config_table *mc;
        u8 bus_isa = 7;

diff --git a/src/mainboard/intel/truxton/mptable.c b/src/mainboard/intel/truxton/mptable.c
index 64ebc2019934d7a92b4cb4c59621328bbf6d88f1..2b63d2abd80afa493a93ddcd38c60ae9723e3657 100644 (file)
--- a/src/mainboard/intel/truxton/mptable.c
+++ b/src/mainboard/intel/truxton/mptable.c
@@ -27,7 +27,7 @@
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "Intel   ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "Truxton     ";
        struct mp_config_table *mc;
        u8 bus_num;

diff --git a/src/mainboard/intel/xe7501devkit/mptable.c b/src/mainboard/intel/xe7501devkit/mptable.c
index 6bc85929b5ccd29f3b90cdd604e6e5495270ed0a..ee8299389d3eed1354f631ee3b2005f5abe61651 100644 (file)
--- a/src/mainboard/intel/xe7501devkit/mptable.c
+++ b/src/mainboard/intel/xe7501devkit/mptable.c
@@ -145,7 +145,7 @@ static void xe7501devkit_register_interrupts(struct mp_config_table *mc)
 static void *smp_write_config_table(void* v)
 {
        static const char sig[4] = MPC_SIGNATURE;
-       static const char oem[8] = "INTEL   ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "XE7501DEVKIT";
        struct mp_config_table *mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
        memset(mc, 0, sizeof(*mc));

diff --git a/src/mainboard/iwill/dk8_htx/mptable.c b/src/mainboard/iwill/dk8_htx/mptable.c
index c9f7092862be69e1ac32a973e9bc33932133256f..1b0cea02ab0f5391d2da2bc995cf7a0fd6525439 100644 (file)
--- a/src/mainboard/iwill/dk8_htx/mptable.c
+++ b/src/mainboard/iwill/dk8_htx/mptable.c
@@ -15,7 +15,7 @@
 static void *smp_write_config_table(void *v)
 {
         static const char sig[4] = "PCMP";
-        static const char oem[8] = "IWILL   ";
+        static const char oem[8] = "COREBOOT";
         static const char productid[12] = "DK8-HTX     ";
         struct mp_config_table *mc;
 

diff --git a/src/mainboard/iwill/dk8s2/mptable.c b/src/mainboard/iwill/dk8s2/mptable.c
index 24d31ab9e2d4532ef2b568da36cc08c67aeb540b..9923c3b448975aa607d739784548e64e8bf10d32 100644 (file)
--- a/src/mainboard/iwill/dk8s2/mptable.c
+++ b/src/mainboard/iwill/dk8s2/mptable.c
@@ -7,7 +7,7 @@
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "IWILL   ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "DK8X        ";
        struct mp_config_table *mc;
        unsigned char bus_num;

diff --git a/src/mainboard/iwill/dk8x/mptable.c b/src/mainboard/iwill/dk8x/mptable.c
index 24d31ab9e2d4532ef2b568da36cc08c67aeb540b..9923c3b448975aa607d739784548e64e8bf10d32 100644 (file)
--- a/src/mainboard/iwill/dk8x/mptable.c
+++ b/src/mainboard/iwill/dk8x/mptable.c
@@ -7,7 +7,7 @@
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "IWILL   ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "DK8X        ";
        struct mp_config_table *mc;
        unsigned char bus_num;

diff --git a/src/mainboard/kontron/kt690/mptable.c b/src/mainboard/kontron/kt690/mptable.c
index b886c1ebd3479f8bd1c87db04fdf8d1e4ad875e7..1758c7a6f66710855a2492467cc03519a07cc73f 100644 (file)
--- a/src/mainboard/kontron/kt690/mptable.c
+++ b/src/mainboard/kontron/kt690/mptable.c
@@ -41,7 +41,7 @@ extern u32 sbdn_sb600;
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "KONTRON ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "KT690       ";
        struct mp_config_table *mc;
        int j;

diff --git a/src/mainboard/msi/ms7135/mptable.c b/src/mainboard/msi/ms7135/mptable.c
index ec318c606682b6fdf22a2d187e2a124e7e024044..aea7262def83b7c3fe8c0b16bbe9e8ca3e004c38 100644 (file)
--- a/src/mainboard/msi/ms7135/mptable.c
+++ b/src/mainboard/msi/ms7135/mptable.c
@@ -41,7 +41,7 @@ extern unsigned bus_type[256];
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "MSI     ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "MS7135      ";
        struct mp_config_table *mc;
        unsigned sbdn;

diff --git a/src/mainboard/msi/ms7260/mptable.c b/src/mainboard/msi/ms7260/mptable.c
index b6491385f6dbb9a0805b8e876fd74ed7216215a6..9038fc58718b1eaf549859fb79c8f70f37f1437e 100644 (file)
--- a/src/mainboard/msi/ms7260/mptable.c
+++ b/src/mainboard/msi/ms7260/mptable.c
@@ -36,7 +36,7 @@ extern unsigned bus_type[256];
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "MSI     ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "MS-7260     ";
        struct mp_config_table *mc;
        unsigned int sbdn;

diff --git a/src/mainboard/msi/ms9185/mptable.c b/src/mainboard/msi/ms9185/mptable.c
index 838cfc3eed71519354459bab2efca0690a9f3503..7eed84ccc9fe028600a5acf3d2376902bcf3bc31 100644 (file)
--- a/src/mainboard/msi/ms9185/mptable.c
+++ b/src/mainboard/msi/ms9185/mptable.c
@@ -43,7 +43,7 @@
 static void *smp_write_config_table(void *v)
 {
         static const char sig[4] = "PCMP";
-        static const char oem[8] = "MSI     ";
+        static const char oem[8] = "COREBOOT";
         static const char productid[12] = "MS9185      ";
         struct mp_config_table *mc;
 

diff --git a/src/mainboard/msi/ms9282/mptable.c b/src/mainboard/msi/ms9282/mptable.c
index baa71c130212f226f702d0fb3afbb0e58a44d02f..c5b9381d4ecf28a22b99431ba457e6728a2b9dac 100644 (file)
--- a/src/mainboard/msi/ms9282/mptable.c
+++ b/src/mainboard/msi/ms9282/mptable.c
@@ -37,7 +37,7 @@
 static void *smp_write_config_table(void *v)
 {
         static const char sig[4] = "PCMP";
-        static const char oem[8] = "MSI    ";
+        static const char oem[8] = "COREBOOT";
         static const char productid[12] = "MS9282      ";
         struct mp_config_table *mc;
        struct mb_sysconf_t *m;

diff --git a/src/mainboard/msi/ms9652_fam10/mptable.c b/src/mainboard/msi/ms9652_fam10/mptable.c
index c0a7e6e2ce2dcab14934aeee2047ed0d2875f32a..78c1c81ce33c0fa09082400cc34f43e7a5f9d49e 100644 (file)
--- a/src/mainboard/msi/ms9652_fam10/mptable.c
+++ b/src/mainboard/msi/ms9652_fam10/mptable.c
@@ -34,7 +34,7 @@
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "MSI     ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "K9ND MS-9652";
        struct mp_config_table *mc;
        struct mb_sysconf_t *m;

diff --git a/src/mainboard/newisys/khepri/mptable.c b/src/mainboard/newisys/khepri/mptable.c
index e0b84a0e3eff31c99010eb5de5c7dfb31bbd7be9..4dd106c6ea2dc33ea66f7e5d3e94bd8886d416df 100644 (file)
--- a/src/mainboard/newisys/khepri/mptable.c
+++ b/src/mainboard/newisys/khepri/mptable.c
@@ -7,7 +7,7 @@
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "NEWISYS ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "KHEPRI      ";
        struct mp_config_table *mc;
        unsigned char bus_num;

diff --git a/src/mainboard/nvidia/l1_2pvv/mptable.c b/src/mainboard/nvidia/l1_2pvv/mptable.c
index 0e37ebfb1c216ccc9b5f0afcfd16d792beb534e7..a3f11fd24c17653a90d5af28e59418955e69574c 100644 (file)
--- a/src/mainboard/nvidia/l1_2pvv/mptable.c
+++ b/src/mainboard/nvidia/l1_2pvv/mptable.c
@@ -34,7 +34,7 @@
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "NVIDIA  ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "L1_2PVV     ";
        struct mp_config_table *mc;
        struct mb_sysconf_t *m;

diff --git a/src/mainboard/sunw/ultra40/mptable.c b/src/mainboard/sunw/ultra40/mptable.c
index e3b22e7523ce324cadb3a0551c0a113b56662594..b019ffea1380bd5e8cdb68a759c11bd94b577c32 100644 (file)
--- a/src/mainboard/sunw/ultra40/mptable.c
+++ b/src/mainboard/sunw/ultra40/mptable.c
@@ -36,7 +36,7 @@ extern  unsigned sbdnb;
 static void *smp_write_config_table(void *v)
 {
         static const char sig[4] = "PCMP";
-        static const char oem[8] = "SUNW    ";
+        static const char oem[8] = "COREBOOT";
         static const char productid[12] = "ultra40     ";
         struct mp_config_table *mc;
 

diff --git a/src/mainboard/sunw/ultra40/romstage.c b/src/mainboard/sunw/ultra40/romstage.c
index 5580d9a189a0ef01223ad65d9c5bf4b34fcf35e8..de16a4481f14d9d667b47af09dc65f7aa764cb61 100644 (file)
--- a/src/mainboard/sunw/ultra40/romstage.c
+++ b/src/mainboard/sunw/ultra40/romstage.c
@@ -41,10 +41,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x2e, LPC47B397_SP1)
 
-static void memreset_setup(void)
-{
-}
-
 static void memreset(int controllers, const struct mem_controller *ctrl)
 {
 }
@@ -53,16 +49,17 @@ static void memreset(int controllers, const struct mem_controller *ctrl)
 
 #define SUPERIO_GPIO_IO_BASE 0x400
 
-static void sio_gpio_setup(void){
-
+#ifdef ENABLE_ONBOARD_SCSI
+static void sio_gpio_setup(void)
+{
         unsigned value;
 
         /*Enable onboard scsi*/
         lpc47b397_gpio_offset_out(SUPERIO_GPIO_IO_BASE, 0x2c, (1<<7)|(0<<2)|(0<<1)|(0<<0)); // GP21, offset 0x2c, DISABLE_SCSI_L 
         value = lpc47b397_gpio_offset_in(SUPERIO_GPIO_IO_BASE, 0x4c);
         lpc47b397_gpio_offset_out(SUPERIO_GPIO_IO_BASE, 0x4c, (value|(1<<1)));
-
 }
+#endif
 
 static inline void activate_spd_rom(const struct mem_controller *ctrl)
 {
@@ -111,11 +108,9 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 static void sio_setup(void)
 {
-
         unsigned value;
         uint32_t dword;
         uint8_t byte;
-
         
         pci_write_config32(PCI_DEV(0, CK804_DEVN_BASE+1, 0), 0xac, 0x047f0400);
         
@@ -127,25 +122,22 @@ static void sio_setup(void)
         dword |= (1<<29)|(1<<0);
         pci_write_config32(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0xa0, dword);
         
-#if  1  
         lpc47b397_enable_serial(SUPERIO_GPIO_DEV, SUPERIO_GPIO_IO_BASE);
                 
         value =  lpc47b397_gpio_offset_in(SUPERIO_GPIO_IO_BASE, 0x77);
         value &= 0xbf; 
         lpc47b397_gpio_offset_out(SUPERIO_GPIO_IO_BASE, 0x77, value);
-#endif
-
 }
 
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
        static const uint16_t spd_addr [] = {
+                       // Node 0
                        (0xa<<3)|0, (0xa<<3)|2, 0, 0,
                        (0xa<<3)|1, (0xa<<3)|3, 0, 0,
-#if CONFIG_MAX_PHYSICAL_CPUS > 1
+                       // Node 1
                        (0xa<<3)|4, (0xa<<3)|6, 0, 0,
                        (0xa<<3)|5, (0xa<<3)|7, 0, 0,
-#endif
        };
 
         int needs_reset;
@@ -205,7 +197,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
        enable_smbus();
 
-       memreset_setup();
        sdram_initialize(nodes, ctrl);
 
        post_cache_as_ram();

diff --git a/src/mainboard/supermicro/h8dme/mptable.c b/src/mainboard/supermicro/h8dme/mptable.c
index fb19f25dae09926fc304cc514bcd672b2cf3fe3f..c7e46f2bda5988580e3b1d9f5928e466c6e7d120 100644 (file)
--- a/src/mainboard/supermicro/h8dme/mptable.c
+++ b/src/mainboard/supermicro/h8dme/mptable.c
@@ -38,7 +38,7 @@ extern unsigned char bus_pcix[3]; // under bus_mcp55_2
 static void *smp_write_config_table(void *v)
 {
         static const char sig[4] = "PCMP";
-        static const char oem[8] = "SUPERMIC";
+        static const char oem[8] = "COREBOOT";
         static const char productid[12] = "H8DMR       ";
         struct mp_config_table *mc;
        unsigned sbdn;

diff --git a/src/mainboard/supermicro/h8dmr/mptable.c b/src/mainboard/supermicro/h8dmr/mptable.c
index fb19f25dae09926fc304cc514bcd672b2cf3fe3f..c7e46f2bda5988580e3b1d9f5928e466c6e7d120 100644 (file)
--- a/src/mainboard/supermicro/h8dmr/mptable.c
+++ b/src/mainboard/supermicro/h8dmr/mptable.c
@@ -38,7 +38,7 @@ extern unsigned char bus_pcix[3]; // under bus_mcp55_2
 static void *smp_write_config_table(void *v)
 {
         static const char sig[4] = "PCMP";
-        static const char oem[8] = "SUPERMIC";
+        static const char oem[8] = "COREBOOT";
         static const char productid[12] = "H8DMR       ";
         struct mp_config_table *mc;
        unsigned sbdn;

diff --git a/src/mainboard/supermicro/h8dmr_fam10/mptable.c b/src/mainboard/supermicro/h8dmr_fam10/mptable.c
index 5f1918661ed43739f5a45ca882b3bab5c43e2008..067f5b7a0ba6756589852731d85b953f1e6f1b8b 100644 (file)
--- a/src/mainboard/supermicro/h8dmr_fam10/mptable.c
+++ b/src/mainboard/supermicro/h8dmr_fam10/mptable.c
@@ -34,7 +34,7 @@
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "SUPERMIC";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "H8DMR       ";
        struct mp_config_table *mc;
        struct mb_sysconf_t *m;

diff --git a/src/mainboard/supermicro/h8qme_fam10/mptable.c b/src/mainboard/supermicro/h8qme_fam10/mptable.c
index ca9512390d1f8f6d865bf856632ca39d0330a1cd..551ee977faf16acda34df1e5cfac7aefe5d636bb 100644 (file)
--- a/src/mainboard/supermicro/h8qme_fam10/mptable.c
+++ b/src/mainboard/supermicro/h8qme_fam10/mptable.c
@@ -35,7 +35,7 @@ extern unsigned sbdn3;
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "SUPERMIC";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "H8QME       ";
        struct mp_config_table *mc;
        struct mb_sysconf_t *m;

diff --git a/src/mainboard/supermicro/x6dai_g/mptable.c b/src/mainboard/supermicro/x6dai_g/mptable.c
index 14f0f59227948a3b43ac221f95b0a3bbc49d239d..a3bb398fa2dccc49232010810fc5b52e4c335075 100644 (file)
--- a/src/mainboard/supermicro/x6dai_g/mptable.c
+++ b/src/mainboard/supermicro/x6dai_g/mptable.c
@@ -7,7 +7,7 @@
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "LNXI    ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "X6DAI-G     ";
        struct mp_config_table *mc;
        unsigned char bus_num;

diff --git a/src/mainboard/supermicro/x6dhe_g/mptable.c b/src/mainboard/supermicro/x6dhe_g/mptable.c
index e3cdad31a13a8398a7afa44ce632839a95a42623..c50fabb0f3c1ad4d244e43fd4365abbdc07b4bf6 100644 (file)
--- a/src/mainboard/supermicro/x6dhe_g/mptable.c
+++ b/src/mainboard/supermicro/x6dhe_g/mptable.c
@@ -7,7 +7,7 @@
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "LNXI    ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "X6DHE       ";
        struct mp_config_table *mc;
        unsigned char bus_num;
@@ -43,11 +43,9 @@ static void *smp_write_config_table(void *v)
                dev = dev_find_slot(0, PCI_DEVFN(0x1c,0));
                if (dev) {
                        bus_esb6300_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-               }
-               else {
+               } else {
                        printk(BIOS_DEBUG, "ERROR - could not find PCI 0:1c.0, using defaults\n");
-
-                       bus_esb6300_2 = 6;
+                       bus_esb6300_1 = 6;
                }
                /* esb6300_1 */
                dev = dev_find_slot(0, PCI_DEVFN(0x1e,0));
@@ -55,33 +53,25 @@ static void *smp_write_config_table(void *v)
                        bus_esb6300_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
                        bus_isa    = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
                        bus_isa++;
-               }
-               else {
+               } else {
                        printk(BIOS_DEBUG, "ERROR - could not find PCI 0:1e.0, using defaults\n");
-
-                       bus_esb6300_1 = 7;
+                       bus_esb6300_2 = 7;
                        bus_isa = 8;
                }
                /* pxhd-1 */
                dev = dev_find_slot(1, PCI_DEVFN(0x0,0));
                if (dev) {
                        bus_pxhd_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-
-               }
-               else {
+               } else {
                        printk(BIOS_DEBUG, "ERROR - could not find PCI 1:00.1, using defaults\n");
-
                        bus_pxhd_1 = 2;
                }
                /* pxhd-2 */
                dev = dev_find_slot(1, PCI_DEVFN(0x00,2));
                if (dev) {
                        bus_pxhd_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-
-               }
-               else {
+               } else {
                        printk(BIOS_DEBUG, "ERROR - could not find PCI 1:02.0, using defaults\n");
-
                        bus_pxhd_2 = 3;
                }
        }
@@ -106,8 +96,7 @@ static void *smp_write_config_table(void *v)
                        if (res) {
                                smp_write_ioapic(mc, 0x04, 0x20, res->base);
                        }
-               }
-               else {
+               } else {
                        printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.1\n");
                        printk(BIOS_DEBUG, "CONFIG_DEBUG: Dev= %p\n", dev);
                }
@@ -118,14 +107,12 @@ static void *smp_write_config_table(void *v)
                        if (res) {
                                smp_write_ioapic(mc, 0x05, 0x20, res->base);
                        }
-               }
-               else {
+               } else {
                        printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.3\n");
                        printk(BIOS_DEBUG, "CONFIG_DEBUG: Dev= %p\n", dev);
                }
        }
 
-       
        /* ISA backward compatibility interrupts  */
        smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
                bus_isa, 0x00, 0x02, 0x00);
@@ -182,7 +169,7 @@ static void *smp_write_config_table(void *v)
        smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
                bus_isa, 0x00, MP_APIC_ALL, 0x01);
 
-#warning "FIXME verify I have the irqs handled for all of the risers"
+       /* FIXME verify I have the irqs handled for all of the risers */
 
        /* Compute the checksums */
        mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);

diff --git a/src/mainboard/supermicro/x6dhe_g2/mptable.c b/src/mainboard/supermicro/x6dhe_g2/mptable.c
index e3cdad31a13a8398a7afa44ce632839a95a42623..c50fabb0f3c1ad4d244e43fd4365abbdc07b4bf6 100644 (file)
--- a/src/mainboard/supermicro/x6dhe_g2/mptable.c
+++ b/src/mainboard/supermicro/x6dhe_g2/mptable.c
@@ -7,7 +7,7 @@
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "LNXI    ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "X6DHE       ";
        struct mp_config_table *mc;
        unsigned char bus_num;
@@ -43,11 +43,9 @@ static void *smp_write_config_table(void *v)
                dev = dev_find_slot(0, PCI_DEVFN(0x1c,0));
                if (dev) {
                        bus_esb6300_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-               }
-               else {
+               } else {
                        printk(BIOS_DEBUG, "ERROR - could not find PCI 0:1c.0, using defaults\n");
-
-                       bus_esb6300_2 = 6;
+                       bus_esb6300_1 = 6;
                }
                /* esb6300_1 */
                dev = dev_find_slot(0, PCI_DEVFN(0x1e,0));
@@ -55,33 +53,25 @@ static void *smp_write_config_table(void *v)
                        bus_esb6300_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
                        bus_isa    = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
                        bus_isa++;
-               }
-               else {
+               } else {
                        printk(BIOS_DEBUG, "ERROR - could not find PCI 0:1e.0, using defaults\n");
-
-                       bus_esb6300_1 = 7;
+                       bus_esb6300_2 = 7;
                        bus_isa = 8;
                }
                /* pxhd-1 */
                dev = dev_find_slot(1, PCI_DEVFN(0x0,0));
                if (dev) {
                        bus_pxhd_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-
-               }
-               else {
+               } else {
                        printk(BIOS_DEBUG, "ERROR - could not find PCI 1:00.1, using defaults\n");
-
                        bus_pxhd_1 = 2;
                }
                /* pxhd-2 */
                dev = dev_find_slot(1, PCI_DEVFN(0x00,2));
                if (dev) {
                        bus_pxhd_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-
-               }
-               else {
+               } else {
                        printk(BIOS_DEBUG, "ERROR - could not find PCI 1:02.0, using defaults\n");
-
                        bus_pxhd_2 = 3;
                }
        }
@@ -106,8 +96,7 @@ static void *smp_write_config_table(void *v)
                        if (res) {
                                smp_write_ioapic(mc, 0x04, 0x20, res->base);
                        }
-               }
-               else {
+               } else {
                        printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.1\n");
                        printk(BIOS_DEBUG, "CONFIG_DEBUG: Dev= %p\n", dev);
                }
@@ -118,14 +107,12 @@ static void *smp_write_config_table(void *v)
                        if (res) {
                                smp_write_ioapic(mc, 0x05, 0x20, res->base);
                        }
-               }
-               else {
+               } else {
                        printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.3\n");
                        printk(BIOS_DEBUG, "CONFIG_DEBUG: Dev= %p\n", dev);
                }
        }
 
-       
        /* ISA backward compatibility interrupts  */
        smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
                bus_isa, 0x00, 0x02, 0x00);
@@ -182,7 +169,7 @@ static void *smp_write_config_table(void *v)
        smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
                bus_isa, 0x00, MP_APIC_ALL, 0x01);
 
-#warning "FIXME verify I have the irqs handled for all of the risers"
+       /* FIXME verify I have the irqs handled for all of the risers */
 
        /* Compute the checksums */
        mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);

diff --git a/src/mainboard/supermicro/x6dhr_ig/mptable.c b/src/mainboard/supermicro/x6dhr_ig/mptable.c
index a51eef8870b822bb0303fd7c092e3dd488858472..b98ec52479098b3ac03dd91ee430ed90f41a3d66 100644 (file)
--- a/src/mainboard/supermicro/x6dhr_ig/mptable.c
+++ b/src/mainboard/supermicro/x6dhr_ig/mptable.c
@@ -7,7 +7,7 @@
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "LNXI    ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "X6DHR-iG    ";
        struct mp_config_table *mc;
        unsigned char bus_num;

diff --git a/src/mainboard/supermicro/x6dhr_ig2/mptable.c b/src/mainboard/supermicro/x6dhr_ig2/mptable.c
index 7e8c6d5c44eda917c68664ddfb0c3dc47cd64e8f..78a863c7a1ff2123ba91bf525cb449940f4a6a8c 100644 (file)
--- a/src/mainboard/supermicro/x6dhr_ig2/mptable.c
+++ b/src/mainboard/supermicro/x6dhr_ig2/mptable.c
@@ -7,7 +7,7 @@
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "LNXI    ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "X6DHR-iG    ";
        struct mp_config_table *mc;
        unsigned char bus_num;

diff --git a/src/mainboard/technexion/tim5690/mptable.c b/src/mainboard/technexion/tim5690/mptable.c
index c3929791474f2fab4ee032fb142e4016f6435146..e13edab2e12edd41f80a368cece81b2e6e4c904d 100644 (file)
--- a/src/mainboard/technexion/tim5690/mptable.c
+++ b/src/mainboard/technexion/tim5690/mptable.c
@@ -41,7 +41,7 @@ extern u32 sbdn_sb600;
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "ATI     ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "TIM5690     ";
        struct mp_config_table *mc;
        int j;

diff --git a/src/mainboard/technexion/tim8690/mptable.c b/src/mainboard/technexion/tim8690/mptable.c
index 1f9e7d343ed6821cb95cff0141ec14e567f56f92..307a6ef2619ff2fd271e311c2863db77c0ea621a 100644 (file)
--- a/src/mainboard/technexion/tim8690/mptable.c
+++ b/src/mainboard/technexion/tim8690/mptable.c
@@ -41,7 +41,7 @@ extern u32 sbdn_sb600;
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "ATI     ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "TIM8690     ";
        struct mp_config_table *mc;
        int j;

diff --git a/src/mainboard/tyan/s2735/mptable.c b/src/mainboard/tyan/s2735/mptable.c
index 22130dd1be019689f1e0303948fa0a02932bd9cd..6a73c6dc88fb9acd654820708003dd4aa15a4731 100644 (file)
--- a/src/mainboard/tyan/s2735/mptable.c
+++ b/src/mainboard/tyan/s2735/mptable.c
@@ -7,7 +7,7 @@
 static void *smp_write_config_table(void *v)
 {
         static const char sig[4] = "PCMP";
-        static const char oem[8] = "TYAN    ";
+        static const char oem[8] = "COREBOOT";
         static const char productid[12] = "S2735       ";
         struct mp_config_table *mc;
 

diff --git a/src/mainboard/tyan/s2850/mptable.c b/src/mainboard/tyan/s2850/mptable.c
index 051e9fd4870f69ecc5fc854f5963698632ee4ed8..0d4d6f9bc1a65faf955d3e566c42b9c1367057be 100644 (file)
--- a/src/mainboard/tyan/s2850/mptable.c
+++ b/src/mainboard/tyan/s2850/mptable.c
@@ -46,7 +46,7 @@ static unsigned node_link_to_bus(unsigned node, unsigned link)
 static void *smp_write_config_table(void *v)
 {
         static const char sig[4] = "PCMP";
-        static const char oem[8] = "TYAN    ";
+        static const char oem[8] = "COREBOOT";
         static const char productid[12] = "S2850       ";
         struct mp_config_table *mc;
 

diff --git a/src/mainboard/tyan/s2875/mptable.c b/src/mainboard/tyan/s2875/mptable.c
index f29a728759e4c1eb56f1a0fe2a6c95539795c1a6..77afde6abf4955b88f6edc4d05a8a23310f37bca 100644 (file)
--- a/src/mainboard/tyan/s2875/mptable.c
+++ b/src/mainboard/tyan/s2875/mptable.c
@@ -44,7 +44,7 @@ static unsigned node_link_to_bus(unsigned node, unsigned link)
 static void *smp_write_config_table(void *v)
 {
         static const char sig[4] = "PCMP";
-        static const char oem[8] = "TYAN    ";
+        static const char oem[8] = "COREBOOT";
         static const char productid[12] = "S2875       ";
         struct mp_config_table *mc;
 

diff --git a/src/mainboard/tyan/s2880/mptable.c b/src/mainboard/tyan/s2880/mptable.c
index b8e17ecf029ae6206b54b5ae00234766b1e2988b..a8f3859d7beedb46d14913c5dec782276858b505 100644 (file)
--- a/src/mainboard/tyan/s2880/mptable.c
+++ b/src/mainboard/tyan/s2880/mptable.c
@@ -46,7 +46,7 @@ static unsigned node_link_to_bus(unsigned node, unsigned link)
 static void *smp_write_config_table(void *v)
 {
         static const char sig[4] = "PCMP";
-        static const char oem[8] = "TYAN    ";
+        static const char oem[8] = "COREBOOT";
         static const char productid[12] = "S2880       ";
         struct mp_config_table *mc;
 

diff --git a/src/mainboard/tyan/s2881/mptable.c b/src/mainboard/tyan/s2881/mptable.c
index 4dffcfe8eb7f21649cf5acc6c51a0df34b8b4aa6..ca75c51a93ba65e8202b2d3e6682b8148a497003 100644 (file)
--- a/src/mainboard/tyan/s2881/mptable.c
+++ b/src/mainboard/tyan/s2881/mptable.c
@@ -23,7 +23,7 @@ extern  unsigned sbdn3;
 static void *smp_write_config_table(void *v)
 {
         static const char sig[4] = "PCMP";
-        static const char oem[8] = "TYAN    ";
+        static const char oem[8] = "COREBOOT";
         static const char productid[12] = "S2881       ";
         struct mp_config_table *mc;
 

diff --git a/src/mainboard/tyan/s2882/mptable.c b/src/mainboard/tyan/s2882/mptable.c
index b2858fcc84655c12a5ee6181c5e3065ef6f8b676..f1d7a27179b9701b10c06653520a9eda863f07ff 100644 (file)
--- a/src/mainboard/tyan/s2882/mptable.c
+++ b/src/mainboard/tyan/s2882/mptable.c
@@ -46,7 +46,7 @@ static unsigned node_link_to_bus(unsigned node, unsigned link)
 static void *smp_write_config_table(void *v)
 {
         static const char sig[4] = "PCMP";
-        static const char oem[8] = "TYAN    ";
+        static const char oem[8] = "COREBOOT";
         static const char productid[12] = "S2882       ";
         struct mp_config_table *mc;
 

diff --git a/src/mainboard/tyan/s2885/mptable.c b/src/mainboard/tyan/s2885/mptable.c
index 4f5bab5cf449ba5a0de37a0482bc391554a916b7..d096b07905bf0c5080bf9188b97368f9ea799a09 100644 (file)
--- a/src/mainboard/tyan/s2885/mptable.c
+++ b/src/mainboard/tyan/s2885/mptable.c
@@ -27,7 +27,7 @@ extern  unsigned sbdn5;
 static void *smp_write_config_table(void *v)
 {
         static const char sig[4] = "PCMP";
-        static const char oem[8] = "TYAN    ";
+        static const char oem[8] = "COREBOOT";
         static const char productid[12] = "S2885       ";
         struct mp_config_table *mc;
 

diff --git a/src/mainboard/tyan/s2891/mptable.c b/src/mainboard/tyan/s2891/mptable.c
index 5ebbda039f4c33a4c34c6dd353a5cddbc035ebc8..b8325e5692cfddaee599ebf7713f11076f8374d0 100644 (file)
--- a/src/mainboard/tyan/s2891/mptable.c
+++ b/src/mainboard/tyan/s2891/mptable.c
@@ -27,7 +27,7 @@ extern  unsigned sbdn3;
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "TYAN    ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "S2891       ";
        struct mp_config_table *mc;
        unsigned sbdn;

diff --git a/src/mainboard/tyan/s2892/mptable.c b/src/mainboard/tyan/s2892/mptable.c
index 38ffaabfbdacd24c6aead133823856389dc73ca1..4846c997fa482966d597d5e3754ef5a9d1503de7 100644 (file)
--- a/src/mainboard/tyan/s2892/mptable.c
+++ b/src/mainboard/tyan/s2892/mptable.c
@@ -27,7 +27,7 @@ extern  unsigned sbdn3;
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "TYAN    ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "S2892       ";
        struct mp_config_table *mc;
        unsigned sbdn;

diff --git a/src/mainboard/tyan/s2895/mptable.c b/src/mainboard/tyan/s2895/mptable.c
index 600b0f4533f1acd8ed206515802fc0ec422aec0b..82968cc0bd6efec045bcb7606074fda99d2b63d0 100644 (file)
--- a/src/mainboard/tyan/s2895/mptable.c
+++ b/src/mainboard/tyan/s2895/mptable.c
@@ -35,7 +35,7 @@ extern  unsigned sbdnb;
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "TYAN    ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "S2895       ";
        struct mp_config_table *mc;
        unsigned sbdn;

diff --git a/src/mainboard/tyan/s2912/get_bus_conf.c b/src/mainboard/tyan/s2912/get_bus_conf.c
index cd993a7a8548e40dcca0bb0aae2d9cacd0326ba2..b21b1af4a7fc850651b243265742357dfc4a192f 100644 (file)
--- a/src/mainboard/tyan/s2912/get_bus_conf.c
+++ b/src/mainboard/tyan/s2912/get_bus_conf.c
@@ -27,9 +27,7 @@
 #if CONFIG_LOGICAL_CPUS==1
 #include <cpu/amd/multicore.h>
 #endif
-
 #include <cpu/amd/amdk8_sysconf.h>
-
 #include <stdlib.h>
 #include "mb_sysconf.h"
 
@@ -37,8 +35,11 @@
 struct mb_sysconf_t mb_sysconf;
 
 unsigned pci1234x[] =
-{      //Here you only need to set value in pci1234 for HT-IO that could be installed or not
-        //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
+{      
+       // Here you only need to set value in pci1234 for HT-IO that could be
+       // installed or not.
+       // You may need to preset pci1234 for HTIO board, please refer to
+       // src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
        0x0000ff0,
        0x0000ff0,
        0x0000ff0,
@@ -49,7 +50,9 @@ unsigned pci1234x[] =
 //     0x0000ff0
 };
 unsigned hcdnx[] =
-{ //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
+{ 
+       // HT Chain device num, actually it is unit id base of every ht device
+       // in chain, assume every chain only have 4 ht device at most
        0x20202020,
        0x20202020,
        0x20202020,
@@ -60,39 +63,10 @@ unsigned hcdnx[] =
 //     0x20202020,
 };
 
-
-
-
 static unsigned get_bus_conf_done = 0;
 
-static unsigned get_hcid(unsigned i)
-{
-       unsigned id = 0;
-
-       unsigned busn = (sysconf.pci1234[i] >> 16) & 0xff;
-
-       unsigned devn = sysconf.hcdn[i] & 0xff;
-
-       device_t dev;
-
-       dev = dev_find_slot(busn, PCI_DEVFN(devn,0));
-
-       switch (dev->device) {
-       case 0x0369: //IO55
-               id = 4;
-               break;
-       }
-
-       // we may need more way to find out hcid: subsystem id? GPIO read ?
-
-       // we need use id for 1. bus num, 2. mptable, 3. acpi table
-
-       return id;
-}
-
 void get_bus_conf(void)
 {
-
        unsigned apicid_base;
        struct mb_sysconf_t *m;
 
@@ -122,24 +96,22 @@ void get_bus_conf(void)
 
        m->bus_mcp55[0] = (sysconf.pci1234[0] >> 16) & 0xff;
 
-               /* MCP55 */
-               dev = dev_find_slot(m->bus_mcp55[0], PCI_DEVFN(sysconf.sbdn + 0x06,0));
-               if (dev) {
-                       m->bus_mcp55[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
-               }
-               else {
-                       printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sysconf.sbdn + 0x06);
-               }
+       /* MCP55 */
+       dev = dev_find_slot(m->bus_mcp55[0], PCI_DEVFN(sysconf.sbdn + 0x06,0));
+       if (dev) {
+               m->bus_mcp55[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
+       } else {
+               printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sysconf.sbdn + 0x06);
+       }
 
-               for(i=2; i<8;i++) {
-                       dev = dev_find_slot(m->bus_mcp55[0], PCI_DEVFN(sysconf.sbdn + 0x0a + i - 2 , 0));
-                       if (dev) {
-                               m->bus_mcp55[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
-                       }
-                       else {
-                               printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_mcp55[0], sysconf.sbdn + 0x0a + i - 2 );
-                       }
+       for(i=2; i<8;i++) {
+               dev = dev_find_slot(m->bus_mcp55[0], PCI_DEVFN(sysconf.sbdn + 0x0a + i - 2 , 0));
+               if (dev) {
+                       m->bus_mcp55[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
+               } else {
+                       printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_mcp55[0], sysconf.sbdn + 0x0a + i - 2 );
                }
+       }
 
        for(i=0; i< sysconf.hc_possible_num; i++) {
                if(!(sysconf.pci1234[i] & 0x1) ) continue;
@@ -160,5 +132,5 @@ void get_bus_conf(void)
        apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
 #endif
        m->apicid_mcp55 = apicid_base+0;
-
 }
+

diff --git a/src/mainboard/tyan/s2912/mptable.c b/src/mainboard/tyan/s2912/mptable.c
index 027873dfbced2f7db071343b575e051b5da4cdeb..b688da11eef477632fab8f3f82fa979bfbb07e5b 100644 (file)
--- a/src/mainboard/tyan/s2912/mptable.c
+++ b/src/mainboard/tyan/s2912/mptable.c
@@ -34,7 +34,7 @@
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "TYAN    ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "S2895       ";
        struct mp_config_table *mc;
        struct mb_sysconf_t *m;

diff --git a/src/mainboard/tyan/s2912_fam10/mptable.c b/src/mainboard/tyan/s2912_fam10/mptable.c
index c2c5f66d7a4cb6e54973159c54f587960491157c..79d076682410371f1e5177464e85ff7a0fc0456f 100644 (file)
--- a/src/mainboard/tyan/s2912_fam10/mptable.c
+++ b/src/mainboard/tyan/s2912_fam10/mptable.c
@@ -34,7 +34,7 @@
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "TYAN    ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "S2895       ";
        struct mp_config_table *mc;
        struct mb_sysconf_t *m;

diff --git a/src/mainboard/tyan/s4880/mptable.c b/src/mainboard/tyan/s4880/mptable.c
index d90f7835882d9981eb5de648d41202ba1b3f4088..746d2a5d5e96d3ed4da4e61fdc84df49d0fe4720 100644 (file)
--- a/src/mainboard/tyan/s4880/mptable.c
+++ b/src/mainboard/tyan/s4880/mptable.c
@@ -44,7 +44,7 @@ static unsigned node_link_to_bus(unsigned node, unsigned link)
 static void *smp_write_config_table(void *v)
 {
         static const char sig[4] = "PCMP";
-        static const char oem[8] = "TYAN    ";
+        static const char oem[8] = "COREBOOT";
         static const char productid[12] = "S4880       ";
         struct mp_config_table *mc;
 

diff --git a/src/mainboard/tyan/s4882/mptable.c b/src/mainboard/tyan/s4882/mptable.c
index 965e6ae306ccaaff6c9af1fc9e86985288656610..4022dbdde1c142244e1cd69d0f130bb7641da0eb 100644 (file)
--- a/src/mainboard/tyan/s4882/mptable.c
+++ b/src/mainboard/tyan/s4882/mptable.c
@@ -45,7 +45,7 @@ static unsigned node_link_to_bus(unsigned node, unsigned link)
 static void *smp_write_config_table(void *v)
 {
         static const char sig[4] = "PCMP";
-        static const char oem[8] = "TYAN    ";
+        static const char oem[8] = "COREBOOT";
         static const char productid[12] = "S4882       ";
         struct mp_config_table *mc;
 

diff --git a/src/mainboard/via/epia-n/mptable.c b/src/mainboard/via/epia-n/mptable.c
index e8040dc6980d1e52534fb2d75d15df1f76cd928c..32840f5d546bd65f53eaf35723e09fba28e91445 100644 (file)
--- a/src/mainboard/via/epia-n/mptable.c
+++ b/src/mainboard/via/epia-n/mptable.c
@@ -9,7 +9,7 @@
 static void *smp_write_config_table(void *v)
 {
         static const char sig[4] = "PCMP";
-        static const char oem[8] = "LNXI    ";
+        static const char oem[8] = "COREBOOT";
         static const char productid[12] = "P4DPE       ";
         struct mp_config_table *mc;
 

diff --git a/src/mainboard/via/pc2500e/mptable.c b/src/mainboard/via/pc2500e/mptable.c
index 7a0237f2025f27468245a0772219878e7faf8f69..40654584b9209f23e82b742dbff6678f1bb5fc80 100644 (file)
--- a/src/mainboard/via/pc2500e/mptable.c
+++ b/src/mainboard/via/pc2500e/mptable.c
@@ -35,7 +35,7 @@
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "VIA     ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "PC2500      ";
        struct mp_config_table *mc;
 

diff --git a/src/northbridge/amd/amdmct/mct/mct_d.c b/src/northbridge/amd/amdmct/mct/mct_d.c
index ef7e2af92a1ff1a7402f5dbf8927b95020d54061..fe4ae8c30cfea0bcb6b5fd354ecc3de803d649e9 100644 (file)
--- a/src/northbridge/amd/amdmct/mct/mct_d.c
+++ b/src/northbridge/amd/amdmct/mct/mct_d.c
@@ -476,7 +476,7 @@ static void LoadDQSSigTmgRegs_D(struct MCTStatStruc *pMCTstat,
        }
 }
 
-
+#ifdef UNUSED_CODE
 static void ResetNBECCstat_D(struct MCTStatStruc *pMCTstat,
                                struct DCTStatStruc *pDCTstatA)
 {
@@ -503,7 +503,7 @@ static void ResetNBECCstat_D(struct MCTStatStruc *pMCTstat,
                }
        }
 }
-
+#endif
 
 static void HTMemMapInit_D(struct MCTStatStruc *pMCTstat,
                                struct DCTStatStruc *pDCTstatA)
@@ -3337,7 +3337,7 @@ static void SetCSTriState(struct MCTStatStruc *pMCTstat,
 }
 
 
-
+#ifdef UNUSED_CODE
 static void SetCKETriState(struct MCTStatStruc *pMCTstat,
                                struct DCTStatStruc *pDCTstat, u8 dct)
 {
@@ -3377,7 +3377,7 @@ static void SetCKETriState(struct MCTStatStruc *pMCTstat,
 
        Set_NB32_index_wait(dev, index_reg, index, val);
 }
-
+#endif
 
 static void SetODTTriState(struct MCTStatStruc *pMCTstat,
                                struct DCTStatStruc *pDCTstat, u8 dct)
@@ -3856,7 +3856,7 @@ static void mct_EnableDatIntlv_D(struct MCTStatStruc *pMCTstat,
        }
 }
 
-
+#ifdef UNUSED_CODE
 static void mct_SetupSync_D(struct MCTStatStruc *pMCTstat,
                                        struct DCTStatStruc *pDCTstat)
 {
@@ -3878,6 +3878,7 @@ static void mct_SetupSync_D(struct MCTStatStruc *pMCTstat,
                Set_NB32(dev, 0x78, val);
        }
 }
+#endif
 
 static void AfterDramInit_D(struct DCTStatStruc *pDCTstat, u8 dct) {
 

diff --git a/src/northbridge/amd/amdmct/mct/mct_d_gcc.h b/src/northbridge/amd/amdmct/mct/mct_d_gcc.h
index 3e36dfe4cc1c8c85fe3a350e7b887a4178b05291..24f354d4c62feb88f75226a3395a504bef058813 100644 (file)
--- a/src/northbridge/amd/amdmct/mct/mct_d_gcc.h
+++ b/src/northbridge/amd/amdmct/mct/mct_d_gcc.h
@@ -161,7 +161,7 @@ static u32 read32_fs(u32 addr_lo)
        return value;
 }
 
-
+#ifdef UNUSED_CODE
 static u8 read8_fs(u32 addr_lo)
 {
        u8 byte;
@@ -173,7 +173,7 @@ static u8 read8_fs(u32 addr_lo)
        );
        return byte;
 }
-
+#endif
 
 static void FlushDQSTestPattern_L9(u32 addr_lo)
 {
@@ -369,6 +369,7 @@ static u32 stream_to_int(u8 const *p)
 }
 
 
+#ifdef UNUSED_CODE
 static void oemSet_NB32(u32 addr, u32 val, u8 *valid)
 {
 }
@@ -379,6 +380,7 @@ static u32 oemGet_NB32(u32 addr,  u8 *valid)
        *valid = 0;
        return 0xffffffff;
 }
+#endif
 
 
 static u8 oemNodePresent_D(u8 Node, u8 *ret)

diff --git a/src/northbridge/amd/amdmct/wrappers/mcti_d.c b/src/northbridge/amd/amdmct/wrappers/mcti_d.c
index 6dfeb214d0f2957208f150719c6a38002458ec76..632b581289c7bed1c80202eee9e065a16772f565 100644 (file)
--- a/src/northbridge/amd/amdmct/wrappers/mcti_d.c
+++ b/src/northbridge/amd/amdmct/wrappers/mcti_d.c
@@ -233,10 +233,12 @@ static void mctGet_MaxLoadFreq(struct DCTStatStruc *pDCTstat)
        pDCTstat->PresetmaxFreq = 400;
 }
 
-
+#ifdef UNUSED_CODE
 static void mctAdjustAutoCycTmg(void)
 {
 }
+#endif
+
 
 static void mctAdjustAutoCycTmg_D(void)
 {
@@ -292,10 +294,11 @@ static void mctHookAfterECC(void)
 {
 }
 
-
+#ifdef UNUSED_CODE
 static void mctInitMemGPIOs_A(void)
 {
 }
+#endif
 
 
 static void mctInitMemGPIOs_A_D(void)
@@ -308,9 +311,12 @@ static void mctNodeIDDebugPort_D(void)
 }
 
 
+#ifdef UNUSED_CODE
 static void mctWarmReset(void)
 {
 }
+#endif
+
 
 static void mctWarmReset_D(void)
 {

diff --git a/src/northbridge/intel/i3100/raminit.h b/src/northbridge/intel/i3100/raminit.h
index 90609c4e9d1d93add00a13794a85deb852631c52..828a233883cd5b4bb03cfd0f7b073565b64e1f10 100644 (file)
--- a/src/northbridge/intel/i3100/raminit.h
+++ b/src/northbridge/intel/i3100/raminit.h
@@ -30,4 +30,6 @@ struct mem_controller {
        u16 channel1[DIMM_SOCKETS];
 };
 
+void sdram_initialize(int controllers, const struct mem_controller *ctrl);
+
 #endif

diff --git a/src/superio/ite/it8712f/it8712f.h b/src/superio/ite/it8712f/it8712f.h
index 260b12d79858953b921b3c815148bb212030006b..884d77e58286eca4f42e099a4b3143a1f8f75569 100644 (file)
--- a/src/superio/ite/it8712f/it8712f.h
+++ b/src/superio/ite/it8712f/it8712f.h
@@ -32,3 +32,10 @@
 #define IT8712F_MIDI 0x08 /* MIDI port */
 #define IT8712F_GAME 0x09 /* GAME port */
 #define IT8712F_IR   0x0a /* Consumer IR */
+
+#ifndef __ROMCC__
+void it8712f_kill_watchdog(void);
+void it8712f_enable_serial(device_t dev, unsigned iobase);
+void it8712f_24mhz_clkin(void)
+void it8712f_enable_3vsbsw(void)
+#endif

diff --git a/src/superio/ite/it8712f/it8712f_early_serial.c b/src/superio/ite/it8712f/it8712f_early_serial.c
index e0bfafd4aca4bd1b425451dd290277e45c1513ca..a243202982f2aeea917e21a7647bf0a30e20f1c4 100644 (file)
--- a/src/superio/ite/it8712f/it8712f_early_serial.c
+++ b/src/superio/ite/it8712f/it8712f_early_serial.c
@@ -66,7 +66,7 @@ static void it8712f_exit_conf(void)
        it8712f_sio_write(0x00, IT8712F_CONFIG_REG_CC, 0x02);
 }
 
-static void it8712f_24mhz_clkin(void)
+void it8712f_24mhz_clkin(void)
 {
        it8712f_enter_conf();
 
@@ -76,7 +76,7 @@ static void it8712f_24mhz_clkin(void)
        it8712f_exit_conf();
 }
 
-static void it8712f_enable_3vsbsw(void)
+void it8712f_enable_3vsbsw(void)
 {
 
        /* We need to set enable 3VSBSW#, this was documented only in IT8712F_V0.9.2!
@@ -102,7 +102,7 @@ static void it8712f_kill_watchdog(void)
 }
 
 /* Enable the peripheral devices on the IT8712F Super I/O chip. */
-static void it8712f_enable_serial(device_t dev, unsigned iobase)
+void it8712f_enable_serial(device_t dev, unsigned iobase)
 {
 
        /* (1) Enter the configuration state (MB PnP mode). */