Changes: Christian Thalinger
- $Id: asmpart.S 2980 2005-07-11 10:13:08Z twisti $
+ $Id: asmpart.S 2997 2005-07-12 08:39:17Z twisti $
*/
L_asm_call_jit_compiler_exception:
mflr r0
stw r0,LA_LR_OFFSET(r1)
- stwu r1,-(LA_SIZE+3*4)(r1)
+ stwu r1,-(LA_SIZE+4*4)(r1)
li a0,0 /* fill in correct stacktrace */
- addi a1,r1,LA_SIZE+3*4
- mr a2,r0
- bl stacktrace_fillInStackTrace
+ addi a1,r1,LA_SIZE+4*4 /* pass sp of parent Java function */
+ mr a2,r0 /* pass ra of parent Java function */
+ mr a3,a2 /* xpc is equal to ra */
+ bl stacktrace_extern_fillInStackTrace
mr xptr,v0
- lwz r0,LA_SIZE+3*4+LA_LR_OFFSET(r1)
+ lwz r0,LA_SIZE+4*4+LA_LR_OFFSET(r1)
mtlr r0
- addi r1,r1,LA_SIZE+3*4
+ addi r1,r1,LA_SIZE+4*4
- addi xpc,r0,-4
+ mr xpc,r0 /* we can not use r0 in addi (it's 0) */
+ addi xpc,xpc,-4
b asm_handle_nat_exception
mflr r0
stw r0,8*4+LA_LR_OFFSET(r1) /* skip stack frame of patcher stub */
/* keep stack 16-bytes aligned: 6+1+37 = 44 */
- stwu r1,-(LA_SIZE+(4+38)*4+sizestackframeinfo)(r1)
+ stwu r1,-(LA_SIZE+(5+38)*4+sizestackframeinfo)(r1)
#if 1
- stw a0,LA_SIZE+(4+0)*4(r1) /* save argument registers */
- stw a1,LA_SIZE+(4+1)*4(r1) /* preserve linkage area (24 bytes) */
- stw a2,LA_SIZE+(4+2)*4(r1) /* and 4 bytes for 4 argument */
- stw a3,LA_SIZE+(4+3)*4(r1)
- stw a4,LA_SIZE+(4+4)*4(r1)
- stw a5,LA_SIZE+(4+5)*4(r1)
- stw a6,LA_SIZE+(4+6)*4(r1)
- stw a7,LA_SIZE+(4+7)*4(r1)
-
- stfd fa0,LA_SIZE+(4+8)*4(sp)
- stfd fa1,LA_SIZE+(4+10)*4(sp)
- stfd fa2,LA_SIZE+(4+12)*4(sp)
- stfd fa3,LA_SIZE+(4+14)*4(sp)
- stfd fa4,LA_SIZE+(4+16)*4(sp)
- stfd fa5,LA_SIZE+(4+18)*4(sp)
- stfd fa6,LA_SIZE+(4+20)*4(sp)
- stfd fa7,LA_SIZE+(4+22)*4(sp)
- stfd fa8,LA_SIZE+(4+24)*4(sp)
- stfd fa9,LA_SIZE+(4+26)*4(sp)
- stfd fa10,LA_SIZE+(4+28)*4(sp)
- stfd fa11,LA_SIZE+(4+30)*4(sp)
- stfd fa12,LA_SIZE+(4+32)*4(sp)
+ stw a0,LA_SIZE+(5+0)*4(r1) /* save argument registers */
+ stw a1,LA_SIZE+(5+1)*4(r1) /* preserve linkage area (24 bytes) */
+ stw a2,LA_SIZE+(5+2)*4(r1) /* and 4 bytes for 4 argument */
+ stw a3,LA_SIZE+(5+3)*4(r1)
+ stw a4,LA_SIZE+(5+4)*4(r1)
+ stw a5,LA_SIZE+(5+5)*4(r1)
+ stw a6,LA_SIZE+(5+6)*4(r1)
+ stw a7,LA_SIZE+(5+7)*4(r1)
+
+ stfd fa0,LA_SIZE+(5+8)*4(sp)
+ stfd fa1,LA_SIZE+(5+10)*4(sp)
+ stfd fa2,LA_SIZE+(5+12)*4(sp)
+ stfd fa3,LA_SIZE+(5+14)*4(sp)
+ stfd fa4,LA_SIZE+(5+16)*4(sp)
+ stfd fa5,LA_SIZE+(5+18)*4(sp)
+ stfd fa6,LA_SIZE+(5+20)*4(sp)
+ stfd fa7,LA_SIZE+(5+22)*4(sp)
+ stfd fa8,LA_SIZE+(5+24)*4(sp)
+ stfd fa9,LA_SIZE+(5+26)*4(sp)
+ stfd fa10,LA_SIZE+(5+28)*4(sp)
+ stfd fa11,LA_SIZE+(5+30)*4(sp)
+ stfd fa12,LA_SIZE+(5+32)*4(sp)
#else
SAVE_ARGUMENT_REGISTERS(LA_WORD_SIZE+1) /* save 8 int/13 float arguments */
#endif
stw r23,33*8(r1)
#endif
- stw itmp1,LA_SIZE+(4+34)*4(sp)
- stw itmp2,LA_SIZE+(4+35)*4(sp)
- stw pv,LA_SIZE+(4+36)*4(sp)
+ stw itmp1,LA_SIZE+(5+34)*4(sp)
+ stw itmp2,LA_SIZE+(5+35)*4(sp)
+ stw pv,LA_SIZE+(5+36)*4(sp)
- addi a0,sp,LA_SIZE+(4+38)*4 /* create stackframe info */
+ addi a0,sp,LA_SIZE+(5+38)*4 /* create stackframe info */
mr a1,pv
- /* add stack frame + patcher stub stack */
- addi a2,sp,(8+LA_WORD_SIZE+4+38)*4+sizestackframeinfo
- mr a3,r0
- bl stacktrace_create_inline_stackframeinfo
-
- addi a0,sp,(0+LA_WORD_SIZE+4+38)*4+sizestackframeinfo /* pass sp */
- lwz pv,(0+LA_WORD_SIZE+4+38)*4+sizestackframeinfo(sp) /* get function */
- lwz itmp1,LA_SIZE+(4+36)*4(sp) /* move pv to position of fp */
- stw itmp1,(0+LA_WORD_SIZE+4+38)*4+sizestackframeinfo(sp)
- mtctr pv /* call the patcher function */
+ addi a2,sp,(8+LA_WORD_SIZE+5+38)*4+sizestackframeinfo
+ mr a3,r0 /* this is correct for leafs */
+ mr a4,a3 /* pass xpc */
+ bl stacktrace_create_extern_stackframeinfo
+
+ addi a0,sp,(0+LA_WORD_SIZE+5+38)*4+sizestackframeinfo /* pass sp */
+ lwz pv,(0+LA_WORD_SIZE+5+38)*4+sizestackframeinfo(sp) /* get function */
+ lwz itmp1,LA_SIZE+(5+36)*4(sp) /* move pv to position of fp */
+ stw itmp1,(0+LA_WORD_SIZE+5+38)*4+sizestackframeinfo(sp)
+ mtctr pv /* call the patcher function */
bctrl
- stw r3,LA_SIZE+(4+37)*4(sp) /* save return value */
+ stw r3,LA_SIZE+(5+37)*4(sp) /* save return value */
- addi a0,sp,LA_SIZE+(4+38)*4
+ addi a0,sp,LA_SIZE+(5+38)*4
bl stacktrace_remove_stackframeinfo /* remove stackframe info */
- lwz itmp3,LA_SIZE+(4+37)*4(sp) /* restore return value into temp reg. */
+ lwz itmp3,LA_SIZE+(5+37)*4(sp) /* restore return value into temp reg.*/
#if 1
- lwz a0,LA_SIZE+(4+0)*4(r1)
- lwz a1,LA_SIZE+(4+1)*4(r1)
- lwz a2,LA_SIZE+(4+2)*4(r1)
- lwz a3,LA_SIZE+(4+3)*4(r1)
- lwz a4,LA_SIZE+(4+4)*4(r1)
- lwz a5,LA_SIZE+(4+5)*4(r1)
- lwz a6,LA_SIZE+(4+6)*4(r1)
- lwz a7,LA_SIZE+(4+7)*4(r1)
-
- lfd fa0,LA_SIZE+(4+8)*4(sp)
- lfd fa1,LA_SIZE+(4+10)*4(sp)
- lfd fa2,LA_SIZE+(4+12)*4(sp)
- lfd fa3,LA_SIZE+(4+14)*4(sp)
- lfd fa4,LA_SIZE+(4+16)*4(sp)
- lfd fa5,LA_SIZE+(4+18)*4(sp)
- lfd fa6,LA_SIZE+(4+20)*4(sp)
- lfd fa7,LA_SIZE+(4+22)*4(sp)
- lfd fa8,LA_SIZE+(4+24)*4(sp)
- lfd fa9,LA_SIZE+(4+26)*4(sp)
- lfd fa10,LA_SIZE+(4+28)*4(sp)
- lfd fa11,LA_SIZE+(4+30)*4(sp)
- lfd fa12,LA_SIZE+(4+32)*4(sp)
+ lwz a0,LA_SIZE+(5+0)*4(r1)
+ lwz a1,LA_SIZE+(5+1)*4(r1)
+ lwz a2,LA_SIZE+(5+2)*4(r1)
+ lwz a3,LA_SIZE+(5+3)*4(r1)
+ lwz a4,LA_SIZE+(5+4)*4(r1)
+ lwz a5,LA_SIZE+(5+5)*4(r1)
+ lwz a6,LA_SIZE+(5+6)*4(r1)
+ lwz a7,LA_SIZE+(5+7)*4(r1)
+
+ lfd fa0,LA_SIZE+(5+8)*4(sp)
+ lfd fa1,LA_SIZE+(5+10)*4(sp)
+ lfd fa2,LA_SIZE+(5+12)*4(sp)
+ lfd fa3,LA_SIZE+(5+14)*4(sp)
+ lfd fa4,LA_SIZE+(5+16)*4(sp)
+ lfd fa5,LA_SIZE+(5+18)*4(sp)
+ lfd fa6,LA_SIZE+(5+20)*4(sp)
+ lfd fa7,LA_SIZE+(5+22)*4(sp)
+ lfd fa8,LA_SIZE+(5+24)*4(sp)
+ lfd fa9,LA_SIZE+(5+26)*4(sp)
+ lfd fa10,LA_SIZE+(5+28)*4(sp)
+ lfd fa11,LA_SIZE+(5+30)*4(sp)
+ lfd fa12,LA_SIZE+(5+32)*4(sp)
#else
RESTORE_ARGUMENT_REGISTERS(LA_WORD_SIZE+4)/* restore 8 int/13 float args */
#endif
#endif
/* get return address (into JIT code) */
- lwz itmp1,(4+LA_WORD_SIZE+4+38)*4+sizestackframeinfo(sp)
+ lwz itmp1,(4+LA_WORD_SIZE+5+38)*4+sizestackframeinfo(sp)
mtlr itmp1
- lwz itmp1,LA_SIZE+(4+34)*4(sp)
- lwz itmp2,LA_SIZE+(4+35)*4(sp)
- lwz pv,LA_SIZE+(4+36)*4(sp)
+ lwz itmp1,LA_SIZE+(5+34)*4(sp)
+ lwz itmp2,LA_SIZE+(5+35)*4(sp)
+ lwz pv,LA_SIZE+(5+36)*4(sp)
/* remove stack frame + patcher stub stack */
- addi r1,r1,(8+LA_WORD_SIZE+4+38)*4+sizestackframeinfo
+ addi r1,r1,(8+LA_WORD_SIZE+5+38)*4+sizestackframeinfo
mr. itmp3,itmp3 /* check for an exception */
beq L_asm_wrapper_patcher_exception
Changes: Christian Thalinger
Christian Ullrich
- $Id: codegen.c 2980 2005-07-11 10:13:08Z twisti $
+ $Id: codegen.c 2997 2005-07-12 08:39:17Z twisti $
*/
/* d contains return type */
-M_NOP;
if (d != TYPE_VOID) {
if (IS_INT_LNG_TYPE(iptr->dst->type)) {
if (IS_2_WORD_TYPE(iptr->dst->type)) {
store_reg_to_var_flt(iptr->dst, s1);
}
}
-M_NOP;
break;
bref->branchpos,
(u1 *) mcodeptr - cd->mcodebase);
- MCODECHECK(19);
+ MCODECHECK(20);
M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
M_MOV(REG_PV, rd->argintregs[0]);
M_MOV(REG_SP, rd->argintregs[1]);
- M_MOV(REG_ITMP2_XPC, rd->argintregs[2]);
- M_STWU(REG_SP, REG_SP, -(LA_SIZE + 4 * 4));
- M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 3 * 4);
+ if (m->isleafmethod)
+ M_MOV(REG_ITMP3, rd->argintregs[2]);
+ else
+ M_ALD(rd->argintregs[2],
+ REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
+
+ M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
+
+ M_STWU(REG_SP, REG_SP, -(LA_SIZE + 5 * 4));
+ M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
- disp = dseg_addaddress(cd, stacktrace_new_arithmeticexception);
+ disp = dseg_addaddress(cd, stacktrace_inline_arithmeticexception);
M_ALD(REG_ITMP1, REG_PV, disp);
M_MTCTR(REG_ITMP1);
M_JSR;
M_MOV(REG_RESULT, REG_ITMP1_XPTR);
- M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 3 * 4);
- M_IADD_IMM(REG_SP, LA_SIZE + 4 * 4, REG_SP);
+ M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
+ M_IADD_IMM(REG_SP, LA_SIZE + 5 * 4, REG_SP);
if (m->isleafmethod) {
M_ALD(REG_ITMP3, REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
bref->branchpos,
(u1 *) mcodeptr - cd->mcodebase);
- MCODECHECK(20);
+ MCODECHECK(21);
/* move index register into REG_ITMP1 */
M_MOV(REG_PV, rd->argintregs[0]);
M_MOV(REG_SP, rd->argintregs[1]);
- M_MOV(REG_ITMP2_XPC, rd->argintregs[2]);
- M_MOV(REG_ITMP1, rd->argintregs[3]);
- M_STWU(REG_SP, REG_SP, -(LA_SIZE + 5 * 4));
- M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
+ if (m->isleafmethod)
+ M_MOV(REG_ITMP3, rd->argintregs[2]);
+ else
+ M_ALD(rd->argintregs[2],
+ REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
+
+ M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
+ M_MOV(REG_ITMP1, rd->argintregs[4]);
- disp = dseg_addaddress(cd, stacktrace_new_arrayindexoutofboundsexception);
+ M_STWU(REG_SP, REG_SP, -(LA_SIZE + 6 * 4));
+ M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 5 * 4);
+
+ disp = dseg_addaddress(cd, stacktrace_inline_arrayindexoutofboundsexception);
M_ALD(REG_ITMP1, REG_PV, disp);
M_MTCTR(REG_ITMP1);
M_JSR;
M_MOV(REG_RESULT, REG_ITMP1_XPTR);
- M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
- M_IADD_IMM(REG_SP, LA_SIZE + 5 * 4, REG_SP);
+ M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 5 * 4);
+ M_IADD_IMM(REG_SP, LA_SIZE + 6 * 4, REG_SP);
if (m->isleafmethod) {
M_ALD(REG_ITMP3, REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
bref->branchpos,
(u1 *) mcodeptr - cd->mcodebase);
- MCODECHECK(19);
+ MCODECHECK(15);
M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
} else {
xcodeptr = mcodeptr;
- if (m->isleafmethod) {
- M_MFLR(REG_ITMP3);
- M_AST(REG_ITMP3, REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
- }
-
M_MOV(REG_PV, rd->argintregs[0]);
M_MOV(REG_SP, rd->argintregs[1]);
- M_MOV(REG_ITMP2_XPC, rd->argintregs[2]);
+ M_ALD(rd->argintregs[2],
+ REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
+ M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
- M_STWU(REG_SP, REG_SP, -(LA_SIZE + 4 * 4));
- M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 3 * 4);
+ M_STWU(REG_SP, REG_SP, -(LA_SIZE + 5 * 4));
+ M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
- disp = dseg_addaddress(cd, stacktrace_new_arraystoreexception);
+ disp = dseg_addaddress(cd, stacktrace_inline_arraystoreexception);
M_ALD(REG_ITMP1, REG_PV, disp);
M_MTCTR(REG_ITMP1);
M_JSR;
M_MOV(REG_RESULT, REG_ITMP1_XPTR);
- M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 3 * 4);
- M_IADD_IMM(REG_SP, LA_SIZE + 4 * 4, REG_SP);
-
- if (m->isleafmethod) {
- M_ALD(REG_ITMP3, REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
- M_MTLR(REG_ITMP3);
- }
+ M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
+ M_IADD_IMM(REG_SP, LA_SIZE + 5 * 4, REG_SP);
disp = dseg_addaddress(cd, asm_handle_exception);
M_ALD(REG_ITMP3, REG_PV, disp);
bref->branchpos,
(u1 *) mcodeptr - cd->mcodebase);
- MCODECHECK(19);
+ MCODECHECK(20);
M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
M_MOV(REG_PV, rd->argintregs[0]);
M_MOV(REG_SP, rd->argintregs[1]);
- M_MOV(REG_ITMP2_XPC, rd->argintregs[2]);
- M_STWU(REG_SP, REG_SP, -(LA_SIZE + 4 * 4));
- M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 3 * 4);
+ if (m->isleafmethod)
+ M_MOV(REG_ITMP3, rd->argintregs[2]);
+ else
+ M_ALD(rd->argintregs[2],
+ REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
+
+ M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
- disp = dseg_addaddress(cd, stacktrace_new_classcastexception);
+ M_STWU(REG_SP, REG_SP, -(LA_SIZE + 5 * 4));
+ M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
+
+ disp = dseg_addaddress(cd, stacktrace_inline_classcastexception);
M_ALD(REG_ITMP1, REG_PV, disp);
M_MTCTR(REG_ITMP1);
M_JSR;
M_MOV(REG_RESULT, REG_ITMP1_XPTR);
- M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 3 * 4);
- M_IADD_IMM(REG_SP, LA_SIZE + 4 * 4, REG_SP);
+ M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
+ M_IADD_IMM(REG_SP, LA_SIZE + 5 * 4, REG_SP);
if (m->isleafmethod) {
M_ALD(REG_ITMP3, REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
bref->branchpos,
(u1 *) mcodeptr - cd->mcodebase);
- MCODECHECK(19);
+ MCODECHECK(16);
M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
} else {
xcodeptr = mcodeptr;
- if (m->isleafmethod) {
- M_MFLR(REG_ITMP3);
- M_AST(REG_ITMP3, REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
- }
-
M_MOV(REG_PV, rd->argintregs[0]);
M_MOV(REG_SP, rd->argintregs[1]);
- M_MOV(REG_ITMP2_XPC, rd->argintregs[2]);
+ M_ALD(rd->argintregs[2],
+ REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
+ M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
- M_STWU(REG_SP, REG_SP, -(LA_SIZE + 4 * 4));
- M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 3 * 4);
+ M_STWU(REG_SP, REG_SP, -(LA_SIZE + 5 * 4));
+ M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
- disp = dseg_addaddress(cd, stacktrace_new_negativearraysizeexception);
+ disp = dseg_addaddress(cd, stacktrace_inline_negativearraysizeexception);
M_ALD(REG_ITMP1, REG_PV, disp);
M_MTCTR(REG_ITMP1);
M_JSR;
M_MOV(REG_RESULT, REG_ITMP1_XPTR);
- M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 3 * 4);
- M_IADD_IMM(REG_SP, LA_SIZE + 4 * 4, REG_SP);
-
- if (m->isleafmethod) {
- M_ALD(REG_ITMP3, REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
- M_MTLR(REG_ITMP3);
- }
+ M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
+ M_IADD_IMM(REG_SP, LA_SIZE + 5 * 4, REG_SP);
disp = dseg_addaddress(cd, asm_handle_exception);
M_ALD(REG_ITMP3, REG_PV, disp);
bref->branchpos,
(u1 *) mcodeptr - cd->mcodebase);
- MCODECHECK(19);
+ MCODECHECK(20);
M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
M_MOV(REG_PV, rd->argintregs[0]);
M_MOV(REG_SP, rd->argintregs[1]);
- M_MOV(REG_ITMP2_XPC, rd->argintregs[2]);
- M_STWU(REG_SP, REG_SP, -(LA_SIZE + 4 * 4));
- M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 3 * 4);
+ if (m->isleafmethod)
+ M_MOV(REG_ITMP3, rd->argintregs[2]);
+ else
+ M_ALD(rd->argintregs[2],
+ REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
+
+ M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
- disp = dseg_addaddress(cd, stacktrace_new_nullpointerexception);
+ M_STWU(REG_SP, REG_SP, -(LA_SIZE + 5 * 4));
+ M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
+
+ disp = dseg_addaddress(cd, stacktrace_inline_nullpointerexception);
M_ALD(REG_ITMP1, REG_PV, disp);
M_MTCTR(REG_ITMP1);
M_JSR;
M_MOV(REG_RESULT, REG_ITMP1_XPTR);
- M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 3 * 4);
- M_IADD_IMM(REG_SP, LA_SIZE + 4 * 4, REG_SP);
+ M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
+ M_IADD_IMM(REG_SP, LA_SIZE + 5 * 4, REG_SP);
if (m->isleafmethod) {
M_ALD(REG_ITMP3, REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
bref->branchpos,
(u1 *) mcodeptr - cd->mcodebase);
- MCODECHECK(19);
+ MCODECHECK(16);
M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
} else {
xcodeptr = mcodeptr;
- if (m->isleafmethod) {
- M_MFLR(REG_ITMP3);
- M_AST(REG_ITMP3, REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
- }
-
M_MOV(REG_PV, rd->argintregs[0]);
M_MOV(REG_SP, rd->argintregs[1]);
- M_MOV(REG_ITMP2_XPC, rd->argintregs[2]);
+ M_ALD(rd->argintregs[2],
+ REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
+ M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
- M_STWU(REG_SP, REG_SP, -(LA_SIZE + 4 * 4));
- M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 3 * 4);
+ M_STWU(REG_SP, REG_SP, -(LA_SIZE + 5 * 4));
+ M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
- disp = dseg_addaddress(cd, stacktrace_fillInStackTrace);
+ disp = dseg_addaddress(cd, stacktrace_inline_fillInStackTrace);
M_ALD(REG_ITMP1, REG_PV, disp);
M_MTCTR(REG_ITMP1);
M_JSR;
M_MOV(REG_RESULT, REG_ITMP1_XPTR);
- M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 3 * 4);
- M_IADD_IMM(REG_SP, LA_SIZE + 4 * 4, REG_SP);
-
- if (m->isleafmethod) {
- M_ALD(REG_ITMP3, REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
- M_MTLR(REG_ITMP3);
- }
+ M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
+ M_IADD_IMM(REG_SP, LA_SIZE + 5 * 4, REG_SP);
disp = dseg_addaddress(cd, asm_handle_exception);
M_ALD(REG_ITMP3, REG_PV, disp);
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