add patches that were rejected in discussion in case they are still needed

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1906 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/src/mainboard/island/aruma/README.txt b/src/mainboard/island/aruma/README.txt
new file mode 100644 (file)
index 0000000..28aa9ef
--- /dev/null
+++ b/src/mainboard/island/aruma/README.txt
@@ -0,0 +1,13 @@
+Patches for Island Aruma
+------------------------
+
+* dram8x.diff
+  due to a glitch in the used dram spdrom this patch is needed to
+  get the ram controller initialized correctly on this machine.
+
+* hyperclocking.diff
+  this patch allows experimenting with hypertransport speeds
+  of the CPU<-->CPU and AMD8131 links. Do not overclock HT links
+  for production use!
+
+

diff --git a/src/mainboard/island/aruma/dram8x.diff b/src/mainboard/island/aruma/dram8x.diff
new file mode 100644 (file)
index 0000000..e02c6b6
--- /dev/null
+++ b/src/mainboard/island/aruma/dram8x.diff
@@ -0,0 +1,16 @@
+Index: src/northbridge/amd/amdk8/raminit.c
+===================================================================
+RCS file: /cvsroot/freebios/freebios2/src/northbridge/amd/amdk8/raminit.c,v
+retrieving revision 1.26
+diff -u -r1.26 raminit.c
+--- src/northbridge/amd/amdk8/raminit.c        14 Oct 2004 22:06:29 -0000      1.26
++++ src/northbridge/amd/amdk8/raminit.c        26 Jan 2005 09:50:05 -0000
+@@ -1603,7 +1603,7 @@
+       dimm += DCL_x4DIMM_SHIFT;
+       dcl = pci_read_config32(ctrl->f2, DRAM_CONFIG_LOW);
+       dcl &= ~(1 << dimm);
+-      if (value == 4) {
++      if (value >= 4) {
+               dcl |= (1 << dimm);
+       }
+       pci_write_config32(ctrl->f2, DRAM_CONFIG_LOW, dcl);

diff --git a/src/mainboard/island/aruma/hyperclocking.diff b/src/mainboard/island/aruma/hyperclocking.diff
new file mode 100644 (file)
index 0000000..d3b421e
--- /dev/null
+++ b/src/mainboard/island/aruma/hyperclocking.diff
@@ -0,0 +1,155 @@
+Index: src/config/Options.lb
+===================================================================
+RCS file: /cvsroot/freebios/freebios2/src/config/Options.lb,v
+retrieving revision 1.56
+diff -u -r1.56 Options.lb
+--- src/config/Options.lb      14 Jan 2005 21:54:16 -0000      1.56
++++ src/config/Options.lb      26 Jan 2005 09:50:04 -0000
+@@ -815,3 +815,13 @@
+       export never
+       comment "Configure briQ with PowerPC G4"
+ end
++###############################################
++# Options for amd k8
++###############################################
++define ALLOW_HT_OVERCLOCKING
++      default 0
++      export always
++      comment "Allow K8 and AMD8131 to operate at maximum speed"
++end
++
++
+Index: src/devices/hypertransport.c
+===================================================================
+RCS file: /cvsroot/freebios/freebios2/src/devices/hypertransport.c,v
+retrieving revision 1.12
+diff -u -r1.12 hypertransport.c
+--- src/devices/hypertransport.c       19 Jan 2005 01:19:37 -0000      1.12
++++ src/devices/hypertransport.c       26 Jan 2005 09:50:04 -0000
+@@ -7,6 +7,9 @@
+ #include <device/hypertransport.h>
+ #include <part/hard_reset.h>
+ #include <part/fallback_boot.h>
++#if (ALLOW_HT_OVERCLOCKING==1) && (USE_FALLBACK_IMAGE==0)
++#include <pc80/mc146818rtc.h>
++#endif
+ 
+ static device_t ht_scan_get_devs(device_t *old_devices)
+ {
+@@ -29,6 +32,9 @@
+ {
+       /* Handle bugs in valid hypertransport frequency reporting */
+       unsigned freq_cap;
++#if (ALLOW_HT_OVERCLOCKING==1) && (USE_FALLBACK_IMAGE==0)
++      int on;
++#endif
+ 
+       freq_cap = pci_read_config16(dev, pos);
+       freq_cap &= ~(1 << HT_FREQ_VENDOR); /* Ignore Vendor HT frequencies */
+@@ -36,7 +42,12 @@
+       /* AMD 8131 Errata 48 */
+       if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
+               (dev->device == PCI_DEVICE_ID_AMD_8131_PCIX)) {
++#if (ALLOW_HT_OVERCLOCKING==1) && (USE_FALLBACK_IMAGE==0)
++              on=0; get_option(&on, "amd8131_800MHz");
++              if(!on) freq_cap &= ~(1 << HT_FREQ_800Mhz);
++#else
+               freq_cap &= ~(1 << HT_FREQ_800Mhz);
++#endif
+       }
+       /* AMD 8151 Errata 23 */
+       if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
+@@ -45,7 +56,12 @@
+       }
+       /* AMD K8 Unsupported 1Ghz? */
+       if ((dev->vendor == PCI_VENDOR_ID_AMD) && (dev->device == 0x1100)) {
++#if (ALLOW_HT_OVERCLOCKING==1) && (USE_FALLBACK_IMAGE==0)
++              on=0; get_option(&on, "amdk8_1GHz"); 
++              if(!on) freq_cap &= ~(1 << HT_FREQ_1000Mhz);
++#else
+               freq_cap &= ~(1 << HT_FREQ_1000Mhz);
++#endif
+       }
+       return freq_cap;
+ }
+Index: src/northbridge/amd/amdk8/coherent_ht.c
+===================================================================
+RCS file: /cvsroot/freebios/freebios2/src/northbridge/amd/amdk8/coherent_ht.c,v
+retrieving revision 1.40
+diff -u -r1.40 coherent_ht.c
+--- src/northbridge/amd/amdk8/coherent_ht.c    7 Jan 2005 21:12:05 -0000       1.40
++++ src/northbridge/amd/amdk8/coherent_ht.c    26 Jan 2005 09:50:04 -0000
+@@ -266,7 +266,13 @@
+ 
+       /* AMD 8131 Errata 48 */
+       if (id == (PCI_VENDOR_ID_AMD | (PCI_DEVICE_ID_AMD_8131_PCIX << 16))) {
+-              freq_cap &= ~(1 << HT_FREQ_800Mhz);
++#if (ALLOW_HT_OVERCLOCKING==1) && (USE_FALLBACK_IMAGE==0)
++                if(!read_option(CMOS_VSTART_amd8131_800MHz,
++                                CMOS_VLEN_amd8131_800MHz, 0))
++                        freq_cap &= ~(1 << HT_FREQ_800Mhz);
++#else
++                freq_cap &= ~(1 << HT_FREQ_800Mhz);
++#endif
+       }
+       /* AMD 8151 Errata 23 */
+       if (id == (PCI_VENDOR_ID_AMD | (PCI_DEVICE_ID_AMD_8151_SYSCTRL << 16))) {
+@@ -274,7 +280,13 @@
+       }
+       /* AMD K8 Unsupported 1Ghz? */
+       if (id == (PCI_VENDOR_ID_AMD | (0x1100 << 16))) {
+-              freq_cap &= ~(1 << HT_FREQ_1000Mhz);
++#if (ALLOW_HT_OVERCLOCKING==1) && (USE_FALLBACK_IMAGE==0)
++                if(!read_option(CMOS_VSTART_amdk8_1GHz,
++                                CMOS_VLEN_amdk8_1GHz, 0))
++                        freq_cap &= ~(1 << HT_FREQ_1000Mhz);
++#else
++                freq_cap &= ~(1 << HT_FREQ_1000Mhz);
++#endif
+       }
+       return freq_cap;
+ }
+Index: src/northbridge/amd/amdk8/incoherent_ht.c
+===================================================================
+RCS file: /cvsroot/freebios/freebios2/src/northbridge/amd/amdk8/incoherent_ht.c,v
+retrieving revision 1.15
+diff -u -r1.15 incoherent_ht.c
+--- src/northbridge/amd/amdk8/incoherent_ht.c  20 Jan 2005 20:41:17 -0000      1.15
++++ src/northbridge/amd/amdk8/incoherent_ht.c  26 Jan 2005 09:50:04 -0000
+@@ -1,6 +1,7 @@
+ /*
+       This should be done by Eric
+-      2004.12 yhlu add multi ht chain dynamically support
++      2004.12 yhlu    add multi ht chain dynamically support
++      2005.01 stepan  add HT overclocking feature
+ */
+ #include <device/pci_def.h>
+ #include <device/pci_ids.h>
+@@ -96,7 +97,13 @@
+ 
+       /* AMD 8131 Errata 48 */
+       if (id == (PCI_VENDOR_ID_AMD | (PCI_DEVICE_ID_AMD_8131_PCIX << 16))) {
++#if (ALLOW_HT_OVERCLOCKING==1) && (USE_FALLBACK_IMAGE==0)
++              if(!read_option(CMOS_VSTART_amd8131_800MHz, 
++                              CMOS_VLEN_amd8131_800MHz, 0))
++                      freq_cap &= ~(1 << HT_FREQ_800Mhz);
++#else
+               freq_cap &= ~(1 << HT_FREQ_800Mhz);
++#endif
+       }
+       /* AMD 8151 Errata 23 */
+       if (id == (PCI_VENDOR_ID_AMD | (PCI_DEVICE_ID_AMD_8151_SYSCTRL << 16))) {
+@@ -104,7 +111,13 @@
+       }
+       /* AMD K8 Unsupported 1Ghz? */
+       if (id == (PCI_VENDOR_ID_AMD | (0x1100 << 16))) {
++#if (ALLOW_HT_OVERCLOCKING==1) && (USE_FALLBACK_IMAGE==0)
++              if(!read_option(CMOS_VSTART_amdk8_1GHz, 
++                              CMOS_VLEN_amdk8_1GHz, 0))
++                      freq_cap &= ~(1 << HT_FREQ_1000Mhz);
++#else
+               freq_cap &= ~(1 << HT_FREQ_1000Mhz);
++#endif
+       }
+       return freq_cap;
+ }