[jit]Emit explicit float rounding on amd64. Fixes #15987
authorRodrigo Kumpera <kumpera@gmail.com>
Wed, 11 Dec 2013 16:14:44 +0000 (11:14 -0500)
committerRodrigo Kumpera <kumpera@gmail.com>
Wed, 11 Dec 2013 16:15:25 +0000 (11:15 -0500)
mono/mini/cpu-amd64.md
mono/mini/mini-amd64.c

index daaacc5ddff656f109d0ff158e5a5871285c6a52..329f70a52a9a1faa3e74690334cf5dbfcfaacbcf 100644 (file)
@@ -86,7 +86,7 @@ long_conv_to_i1: dest:i src1:i len:4
 long_conv_to_i2: dest:i src1:i len:4
 long_conv_to_i4: dest:i src1:i len:3
 long_conv_to_i8: dest:i src1:i len:3
-long_conv_to_r4: dest:f src1:i len:9
+long_conv_to_r4: dest:f src1:i len:15
 long_conv_to_r8: dest:f src1:i len:9
 long_conv_to_u4: dest:i src1:i len:3
 long_conv_to_u8: dest:i src1:i len:3
@@ -368,7 +368,7 @@ int_max_un: dest:i src1:i src2:i len:16 clob:1
 
 int_neg: dest:i src1:i clob:1 len:4
 int_not: dest:i src1:i clob:1 len:4
-int_conv_to_r4: dest:f src1:i len:9
+int_conv_to_r4: dest:f src1:i len:15
 int_conv_to_r8: dest:f src1:i len:9
 int_ceq: dest:c len:8
 int_cgt: dest:c len:8
@@ -504,7 +504,7 @@ amd64_or_membase_reg: src1:b src2:i len:13
 amd64_xor_membase_reg: src1:b src2:i len:13
 amd64_mul_membase_reg: src1:b src2:i len:15
 
-float_conv_to_r4: dest:f src1:f
+float_conv_to_r4: dest:f src1:f len:17
 
 vcall2: len:64 clob:c
 vcall2_reg: src1:i len:64 clob:c
index 52ee97986b5b6b456b07e17390e80630f644a786..bdfc9858370e1783b49a90dfee6362c70cf423cb 100644 (file)
@@ -5265,16 +5265,23 @@ mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
                        amd64_sse_movss_reg_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset);
                        amd64_sse_cvtss2sd_reg_reg (code, ins->dreg, ins->dreg);
                        break;
-               case OP_ICONV_TO_R4: /* FIXME: change precision */
+               case OP_ICONV_TO_R4:
+                       amd64_sse_cvtsi2ss_reg_reg_size (code, ins->dreg, ins->sreg1, 4);
+                       amd64_sse_cvtss2sd_reg_reg (code, ins->dreg, ins->dreg);
+                       break;
                case OP_ICONV_TO_R8:
                        amd64_sse_cvtsi2sd_reg_reg_size (code, ins->dreg, ins->sreg1, 4);
                        break;
-               case OP_LCONV_TO_R4: /* FIXME: change precision */
+               case OP_LCONV_TO_R4:
+                       amd64_sse_cvtsi2ss_reg_reg (code, ins->dreg, ins->sreg1);
+                       amd64_sse_cvtss2sd_reg_reg (code, ins->dreg, ins->dreg);
+                       break;
                case OP_LCONV_TO_R8:
                        amd64_sse_cvtsi2sd_reg_reg (code, ins->dreg, ins->sreg1);
                        break;
                case OP_FCONV_TO_R4:
-                       /* FIXME: nothing to do ?? */
+                       amd64_sse_cvtsd2ss_reg_reg (code, ins->dreg, ins->sreg1);
+                       amd64_sse_cvtss2sd_reg_reg (code, ins->dreg, ins->dreg);
                        break;
                case OP_FCONV_TO_I1:
                        code = emit_float_to_int (cfg, code, ins->dreg, ins->sreg1, 1, TRUE);