2004-07-23 zovarga <vargaz@freemail.hu>
authorZoltan Varga <vargaz@gmail.com>
Fri, 23 Jul 2004 16:11:34 +0000 (16:11 -0000)
committerZoltan Varga <vargaz@gmail.com>
Fri, 23 Jul 2004 16:11:34 +0000 (16:11 -0000)
* inssel.brg inssel-long32.brg inssel-long.brg: Move mul/div and shift
rules into the inssel-long*.brg files.

svn path=/trunk/mono/; revision=31418

mono/mini/ChangeLog
mono/mini/inssel-long.brg
mono/mini/inssel-long32.brg
mono/mini/inssel.brg

index 3539c27cbb9823fb4238499977caa556c2dd0020..fa93acf6f88b1a3a0e8a9be9e92eef052f48d213 100644 (file)
@@ -1,5 +1,8 @@
 2004-07-23  zovarga  <vargaz@freemail.hu>
 
+       * inssel.brg inssel-long32.brg inssel-long.brg: Move mul/div and shift
+       rules into the inssel-long*.brg files.
+
        * *-amd64.*: Add beginnings of AMD64 backend.
 
 2004-07-22  Ben Maurer  <bmaurer@ximian.com>
index e35743900505cbc6d3132abcce4149af5a454cee..944f498b4b772b3f3cdc50f3426b5fe096cc9f83 100644 (file)
@@ -30,7 +30,7 @@ stmt: CEE_STIND_REF (base, OP_ICONST),
 stmt: CEE_STIND_I (base, OP_ICONST),
 stmt: CEE_STIND_I8 (base, OP_ICONST) {
        MONO_EMIT_STORE_MEMBASE_IMM (s, tree, OP_STOREI8_MEMBASE_IMM, state->left->tree->inst_basereg,
-                                    state->left->tree->inst_offset, state->right->tree->inst_c0);
+                                    state->left->tree->inst_offset, state->right->tree->inst_l);
 }
 
 stmt: CEE_STIND_I8 (reg, reg) {
@@ -393,21 +393,33 @@ cflags: OP_LCOMPARE (CEE_LDIND_I8 (OP_REGVAR), OP_ICONST) {
        tree->sreg1 = state->left->left->tree->dreg;
        tree->inst_imm = state->right->tree->inst_c0;
        mono_bblock_add_inst (s->cbb, tree);
-}
+} cost {
+       MBCOND (mono_arch_is_inst_imm (state->right->tree->inst_c0));
+
+       return 0;
+}      
 
 cflags: OP_LCOMPARE (reg, OP_ICONST) {
        tree->opcode = OP_COMPARE_IMM;
        tree->sreg1 = state->left->reg1;
        tree->inst_imm = state->right->tree->inst_c0;
        mono_bblock_add_inst (s->cbb, tree);
-}
+} cost {
+       MBCOND (mono_arch_is_inst_imm (state->right->tree->inst_c0));
+
+       return 0;
+}      
 
 cflags: OP_LCOMPARE (reg, OP_I8CONST) {
        tree->opcode = OP_COMPARE_IMM;
        tree->sreg1 = state->left->reg1;
-       tree->inst_imm = state->right->tree->inst_c0;
+       tree->inst_imm = state->right->tree->inst_l;
        mono_bblock_add_inst (s->cbb, tree);
-}
+} cost {
+       MBCOND (mono_arch_is_inst_imm (state->right->tree->inst_l));
+
+       return 0;
+}      
 
 stmt: CEE_BNE_UN (cflags) {
        mono_bblock_add_inst (s->cbb, tree);
@@ -529,6 +541,85 @@ reg: CEE_SUB_OVF_UN (reg, reg) {
        MONO_EMIT_NEW_COND_EXC (s, IC, "OverflowException");
 }
 
+#
+# shift operations
+#
+
+reg: CEE_SHL (reg, reg) {
+       MONO_EMIT_BIALU (s, tree, OP_ISHL, state->reg1, state->left->reg1, state->right->reg1);
+}
+
+reg: CEE_SHL (reg, OP_ICONST) {
+       MONO_EMIT_BIALU_IMM (s, tree, OP_ISHL_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
+}
+
+reg: CEE_SHR (reg, reg) {
+       MONO_EMIT_BIALU (s, tree, OP_ISHR, state->reg1, state->left->reg1, state->right->reg1);
+}
+
+reg: CEE_SHR (reg, OP_ICONST) {
+       MONO_EMIT_BIALU_IMM (s, tree, OP_ISHR_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
+}
+
+reg: CEE_SHR_UN (reg, reg) {
+       MONO_EMIT_BIALU (s, tree, OP_ISHR_UN, state->reg1, state->left->reg1, state->right->reg1);
+}
+
+reg: CEE_SHR_UN (reg, OP_ICONST) {
+       MONO_EMIT_BIALU_IMM (s, tree, OP_ISHR_UN_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
+}
+
+#
+# mult/div operations
+#
+
+reg: CEE_MUL (reg, reg) {
+       MONO_EMIT_BIALU (s, tree, OP_IMUL, state->reg1, state->left->reg1, state->right->reg1);
+}
+
+reg: CEE_MUL (reg, OP_ICONST) {
+       MONO_EMIT_BIALU_IMM (s, tree, OP_IMUL_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
+}
+
+reg: CEE_MUL_OVF (reg, reg) {
+       MONO_EMIT_BIALU (s, tree, OP_IMUL_OVF, state->reg1, state->left->reg1, state->right->reg1);
+}
+
+reg: CEE_MUL_OVF_UN (reg, reg) {
+       MONO_EMIT_BIALU (s, tree, OP_IMUL_OVF_UN, state->reg1, state->left->reg1, state->right->reg1);
+}
+
+reg: CEE_DIV (reg, reg) {
+       MONO_EMIT_BIALU (s, tree, OP_IDIV, state->reg1, state->left->reg1, state->right->reg1);
+}
+
+#reg: CEE_DIV (reg, OP_ICONST) {
+#      MONO_EMIT_BIALU_IMM (s, tree, OP_IDIV_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
+#}
+
+reg: CEE_DIV_UN (reg, reg) {
+       MONO_EMIT_BIALU (s, tree, OP_IDIV_UN, state->reg1, state->left->reg1, state->right->reg1);
+}
+
+#reg: CEE_DIV_UN (reg, OP_ICONST) {
+#      MONO_EMIT_BIALU_IMM (s, tree, OP_IDIV_UN_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
+#}
+
+reg: CEE_REM (reg, reg) {
+       MONO_EMIT_BIALU (s, tree, OP_IREM, state->reg1, state->left->reg1, state->right->reg1);
+}
+
+#reg: CEE_REM (reg, OP_ICONST) {
+#      MONO_EMIT_BIALU_IMM (s, tree, OP_IREM_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
+#}
+
+reg: CEE_REM_UN (reg, reg) {
+       MONO_EMIT_BIALU (s, tree, OP_IREM_UN, state->reg1, state->left->reg1, state->right->reg1);
+}
+
+#reg: CEE_REM_UN (reg, OP_ICONST) {
+#      MONO_EMIT_BIALU_IMM (s, tree, OP_IREM_UN_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
+#}
 
 c32flags: OP_COMPARE (reg, reg) {
        tree->opcode = OP_ICOMPARE;
index e59af5fd8e8eafa4318fea73a991bfedc1a9cabf..14b8b530f78b96b5ade5e82c8d7c6bbfd205d2cd 100644 (file)
@@ -89,6 +89,86 @@ reg: CEE_SUB_OVF_UN (reg, reg) {
        MONO_EMIT_NEW_COND_EXC (s, C, "OverflowException");
 }
 
+#
+# mult/div operations
+#
+
+reg: CEE_MUL (reg, reg) {
+       MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
+}
+
+reg: CEE_MUL (reg, OP_ICONST) {
+       MONO_EMIT_BIALU_IMM (s, tree, OP_MUL_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
+}
+
+reg: CEE_MUL_OVF (reg, reg) {
+       MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
+}
+
+reg: CEE_MUL_OVF_UN (reg, reg) {
+       MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
+}
+
+reg: CEE_DIV (reg, reg) {
+       MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
+}
+
+#reg: CEE_DIV (reg, OP_ICONST) {
+#      MONO_EMIT_BIALU_IMM (s, tree, OP_DIV_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
+#}
+
+reg: CEE_DIV_UN (reg, reg) {
+       MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
+}
+
+#reg: CEE_DIV_UN (reg, OP_ICONST) {
+#      MONO_EMIT_BIALU_IMM (s, tree, OP_DIV_UN_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
+#}
+
+reg: CEE_REM (reg, reg) {
+       MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
+}
+
+#reg: CEE_REM (reg, OP_ICONST) {
+#      MONO_EMIT_BIALU_IMM (s, tree, OP_REM_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
+#}
+
+reg: CEE_REM_UN (reg, reg) {
+       MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
+}
+
+#reg: CEE_REM_UN (reg, OP_ICONST) {
+#      MONO_EMIT_BIALU_IMM (s, tree, OP_REM_UN_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
+#}
+
+#
+# shift operations
+#
+
+reg: CEE_SHL (reg, reg) {
+       MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
+}
+
+reg: CEE_SHL (reg, OP_ICONST) {
+       MONO_EMIT_BIALU_IMM (s, tree, OP_SHL_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
+}
+
+reg: CEE_SHR (reg, reg) {
+       MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
+}
+
+reg: CEE_SHR (reg, OP_ICONST) {
+       MONO_EMIT_BIALU_IMM (s, tree, OP_SHR_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
+}
+
+reg: CEE_SHR_UN (reg, reg) {
+       MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
+}
+
+reg: CEE_SHR_UN (reg, OP_ICONST) {
+       MONO_EMIT_BIALU_IMM (s, tree, OP_SHR_UN_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
+}
+
 cflags: OP_COMPARE (reg, reg) {
        tree->sreg1 = state->left->reg1;
        tree->sreg2 = state->right->reg1;
index a87c6a1bd6ae17e150cfa79066d471fe15935a00..90c2eaa725f25985c7a51daf3a06e25fdda2f760 100644 (file)
@@ -776,87 +776,6 @@ reg: CEE_CONV_OVF_U2_UN (reg) {
        MONO_EMIT_BIALU_IMM (s, tree, OP_AND_IMM, state->reg1, state->left->reg1, 0xffff);
 }
 
-#
-# mult/div operations
-#
-
-reg: CEE_MUL (reg, reg) {
-       MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
-}
-
-reg: CEE_MUL (reg, OP_ICONST) {
-       MONO_EMIT_BIALU_IMM (s, tree, OP_MUL_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
-}
-
-reg: CEE_MUL_OVF (reg, reg) {
-       MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
-}
-
-reg: CEE_MUL_OVF_UN (reg, reg) {
-       MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
-}
-
-reg: CEE_DIV (reg, reg) {
-       MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
-}
-
-#reg: CEE_DIV (reg, OP_ICONST) {
-#      MONO_EMIT_BIALU_IMM (s, tree, OP_DIV_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
-#}
-
-reg: CEE_DIV_UN (reg, reg) {
-       MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
-}
-
-#reg: CEE_DIV_UN (reg, OP_ICONST) {
-#      MONO_EMIT_BIALU_IMM (s, tree, OP_DIV_UN_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
-#}
-
-reg: CEE_REM (reg, reg) {
-       MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
-}
-
-#reg: CEE_REM (reg, OP_ICONST) {
-#      MONO_EMIT_BIALU_IMM (s, tree, OP_REM_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
-#}
-
-reg: CEE_REM_UN (reg, reg) {
-       MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
-}
-
-#reg: CEE_REM_UN (reg, OP_ICONST) {
-#      MONO_EMIT_BIALU_IMM (s, tree, OP_REM_UN_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
-#}
-
-#
-# shift operations
-#
-
-reg: CEE_SHL (reg, reg) {
-       MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
-}
-
-reg: CEE_SHL (reg, OP_ICONST) {
-       MONO_EMIT_BIALU_IMM (s, tree, OP_SHL_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
-}
-
-reg: CEE_SHR (reg, reg) {
-       MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
-}
-
-reg: CEE_SHR (reg, OP_ICONST) {
-       MONO_EMIT_BIALU_IMM (s, tree, OP_SHR_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
-}
-
-reg: CEE_SHR_UN (reg, reg) {
-       MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
-}
-
-reg: CEE_SHR_UN (reg, OP_ICONST) {
-       MONO_EMIT_BIALU_IMM (s, tree, OP_SHR_UN_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
-}
-
-
 #
 # other alu operations
 #