arguments.
* src/vm/jit/powerpc64/linux/md-asm.h: Likewise.
* src/vm/jit/powerpc64/linux/md-abi.c: Likewise.
* src/vm/jit/powerpc64/asmpart.S (asm_vm_call_method): Various
argument handling fixes.
* src/vm/jit/powerpc64/codegen.h (M_BRAC): Renamed to M_BC
(M_BRA): Renamed to M_B
(M_BRACMASK): Renamed to M_BCMASK.
(M_BRAMASK): Renamed to M_BMASK.
* src/vm/jit/powerpc64/md.c (md_codegen_patch_branch): Use M_BCMASK
and M_BMASK instead of hardcoded masks.
Changes: Christian Thalinger
Edwin Steiner
- $Id: asmpart.S 5880 2006-10-31 13:40:55Z tbfg $
+ $Id: asmpart.S 5940 2006-11-09 09:59:28Z tbfg $
*/
sub sp,sp,t4
mr t6,sp /* use t6 as temporary sp */
- addi t6,t6,LA_SIZE /* skip linkage area */
+ addi t6,t6,LA_SIZE+PA_SIZE /* skip linkage area */
#if defined(__DARWIN__)
add t6,t6,t5 /* skip stack space for arguments */
#endif
addi itmp1,itmp1,-sizevmarg /* initialize pointer (smaller code) */
addi itmp2,itmp2,1 /* initialize argument count */
-
+
L_stack_copy_loop:
addi itmp1,itmp1,sizevmarg /* goto next argument block */
addi itmp2,itmp2,-1 /* argument count - 1 */
andi. r0,itmp3,0x0001 /* is this a 2-word type? */
bne L_stack_handle_long
- lwz itmp3,offvmargdata+4(itmp1) /* get integer argument */
- stw itmp3,0(t6) /* and store it on the stack */
- addi t6,t6,4 /* increase temporary sp by 1 slot */
+ lwa itmp3,offvmargdata+4(itmp1) /* get integer argument */
+ std itmp3,0(t6) /* and store it on the stack */
+ addi t6,t6,8 /* increase temporary sp by 1 slot */
b L_stack_copy_loop
L_stack_handle_long:
-#if !defined(__DARWIN__)
- addi t6,t6,4 /* align stack to 8-bytes */
- rlwinm t6,t6,0,30,28 /* clear lower 4-bits */
-#endif
-
- lwz itmp3,offvmargdata+0(itmp1) /* get long argument */
- stw itmp3,0(t6) /* and store it on the stack */
- lwz itmp3,offvmargdata+4(itmp1)
- stw itmp3,4(t6)
- addi t6,t6,8 /* increase temporary sp by 2 slots */
+ ld itmp3,offvmargdata+0(itmp1) /* get long argument */
+ std itmp3,0(t6) /* and store it on the stack */
+ addi t6,t6,8 /* increase temporary sp by 1 slots */
b L_stack_copy_loop
L_stack_handle_float:
bne L_stack_handle_double
lfs ftmp3,offvmargdata(itmp1) /* get float argument */
- stfs ftmp3,0(t6) /* and store it on the stack */
- addi t6,t6,4 /* increase temporary sp by 1 slot */
+ stfs ftmp3,4(t6) /* and store it on the stack */
+ addi t6,t6,8 /* increase temporary sp by 1 slot */
b L_stack_copy_loop
L_stack_handle_double:
-#if !defined(__DARWIN__)
- addi t6,t6,4 /* align stack to 8-bytes */
- rlwinm t6,t6,0,30,28 /* clear lower 4-bits */
-#endif
-
lfd ftmp3,offvmargdata(itmp1) /* get double argument */
stfd ftmp3,0(t6) /* and store it on the stack */
- addi t6,t6,8 /* increase temporary sp by 2 slots */
+ addi t6,t6,8 /* increase temporary sp by 1 slots */
b L_stack_copy_loop
L_stack_copy_done:
.quad L_handle_fa5
.quad L_handle_fa6
.quad L_handle_fa7
-
-#if defined(__DARWIN__)
.quad L_handle_fa8
.quad L_handle_fa9
.quad L_handle_fa10
.quad L_handle_fa11
.quad L_handle_fa12
-#endif
.text
.align 4
L_handle_fa7:
lfs fa7,offvmargdata(itmp1)
b L_register_copy
-
-#if defined(__DARWIN__)
L_handle_fa8:
lfs fa8,offvmargdata(itmp1)
b L_register_copy
L_handle_fa12:
lfs fa12,offvmargdata(itmp1)
b L_register_copy
-#endif
-
.data
.align 8
.quad L_handle_fda5
.quad L_handle_fda6
.quad L_handle_fda7
-
-#if defined(__DARWIN__)
.quad L_handle_fda8
.quad L_handle_fda9
.quad L_handle_fda10
.quad L_handle_fda11
.quad L_handle_fda12
-#endif
.text
.align 4
L_handle_fda7:
lfd fa7,offvmargdata(itmp1)
b L_register_copy
-
-#if defined(__DARWIN__)
L_handle_fda8:
lfd fa8,offvmargdata(itmp1)
b L_register_copy
L_handle_fda12:
lfd fa12,offvmargdata(itmp1)
b L_register_copy
-#endif
/* asm_call_jit_compiler *******************************************************
Changes: Christian Thalinger
Christian Ullrich
- $Id: codegen.h 5934 2006-11-08 13:33:08Z tbfg $
+ $Id: codegen.h 5940 2006-11-09 09:59:28Z tbfg $
*/
cd->mcodeptr += 4; \
} while (0)
-#define M_BRMASK 0x0000fffc /* (((1 << 16) - 1) & ~3) */
-#define M_BRAMASK 0x03fffffc /* (((1 << 26) - 1) & ~3) */
+#define M_BCMASK 0x0000fffc /* (((1 << 16) - 1) & ~3) */
+#define M_BMASK 0x03fffffc /* (((1 << 26) - 1) & ~3) */
-#define M_BRA(x,i,a,l) \
+#define M_B(x,i,a,l) \
do { \
- *((u4 *) cd->mcodeptr) = (((x) << 26) | ((((i) * 4) + 4) & M_BRAMASK) | ((a) << 1) | (l)); \
+ *((u4 *) cd->mcodeptr) = (((x) << 26) | ((((i) * 4) + 4) & M_BMASK) | ((a) << 1) | (l)); \
cd->mcodeptr += 4; \
} while (0)
-#define M_BRAC(x,bo,bi,i,a,l) \
+#define M_BC(x,bo,bi,i,a,l) \
do { \
- *((u4 *) cd->mcodeptr) = (((x) << 26) | ((bo) << 21) | ((bi) << 16) | (((i) * 4 + 4) & M_BRMASK) | ((a) << 1) | (l)); \
+ *((u4 *) cd->mcodeptr) = (((x) << 26) | ((bo) << 21) | ((bi) << 16) | (((i) * 4 + 4) & M_BCMASK) | ((a) << 1) | (l)); \
cd->mcodeptr += 4; \
} while (0)
#define M_SSEXT(a,b) M_OP3(31, 922, 0, 0, a, b, 0)
#define M_ISEXT(a,b) M_OP3(31, 986, 0, 0, a, b, 0)
-#define M_BR(a) M_BRA(18, a, 0, 0)
-#define M_BL(a) M_BRA(18, a, 0, 1)
+#define M_BR(a) M_B(18, a, 0, 0)
+#define M_BL(a) M_B(18, a, 0, 1)
#define M_RET M_OP3(19, 16, 0, 0, 20, 0, 0)
#define M_JSR M_OP3(19, 528, 0, 1, 20, 0, 0)
#define M_RTS M_OP3(19, 528, 0, 0, 20, 0, 0)
#define M_CMPI(a,b) M_OP2_IMM(11, 1, a, b)
#define M_CMPUI(a,b) M_OP2_IMM(10, 1, a, b)
-#define M_BLT(a) M_BRAC(16, 12, 0, a, 0, 0)
-#define M_BLE(a) M_BRAC(16, 4, 1, a, 0, 0)
-#define M_BGT(a) M_BRAC(16, 12, 1, a, 0, 0)
-#define M_BGE(a) M_BRAC(16, 4, 0, a, 0, 0)
-#define M_BEQ(a) M_BRAC(16, 12, 2, a, 0, 0)
-#define M_BNE(a) M_BRAC(16, 4, 2, a, 0, 0)
-#define M_BNAN(a) M_BRAC(16, 12, 3, a, 0, 0)
+#define M_BLT(a) M_BC(16, 12, 0, a, 0, 0)
+#define M_BLE(a) M_BC(16, 4, 1, a, 0, 0)
+#define M_BGT(a) M_BC(16, 12, 1, a, 0, 0)
+#define M_BGE(a) M_BC(16, 4, 0, a, 0, 0)
+#define M_BEQ(a) M_BC(16, 12, 2, a, 0, 0)
+#define M_BNE(a) M_BC(16, 4, 2, a, 0, 0)
+#define M_BNAN(a) M_BC(16, 12, 3, a, 0, 0)
#define M_FLD_INTERN(a,b,disp) M_OP2_IMM(48,a,b,disp)
#define M_DLD_INTERN(a,b,disp) M_OP2_IMM(50,a,b,disp)
Changes:
- $Id: md-abi.c 5824 2006-10-25 14:26:08Z tbfg $
+ $Id: md-abi.c 5940 2006-11-09 09:59:28Z tbfg $
*/
/*ftmp3, fa0/v0, fa1, fa2, fa3, fa4, fa5, fa6, */
REG_RES, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG,
- /* fa7, ft0, ft1, ft2, ft3, ft4, fs0, fs1, */
- REG_ARG, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_SAV, REG_SAV,
+ /* fa7, fa8, fa9, fa10, fa11, fa12, ftmp1, ftmp2, */
+ REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_RES, REG_RES,
- /*ftmp1, ftmp2, ft5, ft6, ft7, ft8, ft9, ft10, */
- REG_RES, REG_RES, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP,
+ /* fs0, fs1, fs2, fs3, fs4, fs5, fs6, fs7 */
+ REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV,
- /* fs2, fs3, fs4, fs5, fs6, fs7, fs8, fs9 */
+ /* fs8, fs9, fs10, fs11, fs12, fs13, fs14, fs15 */
REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV,
REG_END
Changes:
- $Id: md-abi.h 5389 2006-09-06 23:18:27Z twisti $
+ $Id: md-abi.h 5940 2006-11-09 09:59:28Z tbfg $
*/
#define INT_RES_CNT 8 /* number of integer reserved registers */
#define FLT_REG_CNT 32 /* number of float registers */
-#define FLT_SAV_CNT 10 /* number of float callee saved registers */
-#define FLT_ARG_CNT 8 /* number of float argument registers */
-#define FLT_TMP_CNT 11 /* number of float temporary registers */
+#define FLT_SAV_CNT 16 /* number of float callee saved registers */
+#define FLT_ARG_CNT 13 /* number of float argument registers */
+#define FLT_TMP_CNT 0 /* number of float temporary registers */
#define FLT_RES_CNT 3 /* number of float reserved registers */
#define TRACE_ARGS_NUM 8
Changes:
- $Id: md-asm.h 5230 2006-08-10 19:45:28Z tbfg $
+ $Id: md-asm.h 5940 2006-11-09 09:59:28Z tbfg $
*/
#define fa5 fr6
#define fa6 fr7
#define fa7 fr8
-
#define fa8 fr9
#define fa9 fr10
#define fa10 fr11
#define fa11 fr12
#define fa12 fr13
-#define fs0 fr14
-#define fs1 fr15
-
-#define ftmp1 fr16
-#define ftmp2 fr17
-
-#define ft0 fr18
-#define ft1 fr19
-#define ft2 fr20
-#define ft3 fr21
-#define ft4 fr22
-#define ft5 fr23
-
-#define fs2 fr24
-#define fs3 fr25
-#define fs4 fr26
-#define fs5 fr27
-#define fs6 fr28
-#define fs7 fr29
-#define fs8 fr30
-#define fs9 fr31
+#define ftmp1 fr14
+#define ftmp2 fr15
+
+#define fs0 fr16
+#define fs1 fr17
+#define fs2 fr18
+#define fs3 fr19
+#define fs4 fr20
+#define fs5 fr21
+#define fs6 fr22
+#define fs7 fr23
+#define fs8 fr24
+#define fs9 fr25
+#define fs10 fr26
+#define fs11 fr27
+#define fs12 fr28
+#define fs13 fr29
+#define fs14 fr30
+#define fs15 fr31
#define fv0 fa0
stfd fa4,(12+(off))*8(sp); \
stfd fa5,(13+(off))*8(sp); \
stfd fa6,(14+(off))*8(sp); \
- stfd fa7,(15+(off))*8(sp);
+ stfd fa7,(15+(off))*8(sp); \
+ stfd fa8,(16+(off))*8(sp); \
+ stfd fa9,(17+(off))*8(sp); \
+ stfd fa10,(18+(off))*8(sp);\
+ stfd fa11,(19+(off))*8(sp);\
+ stfd fa12,(20+(off))*8(sp);\
#define RESTORE_ARGUMENT_REGISTERS(off) \
ld a0,(0+(off))*8(sp); \
lfd fa4,(12+(off))*8(sp); \
lfd fa5,(13+(off))*8(sp); \
lfd fa6,(14+(off))*8(sp); \
- lfd fa7,(15+(off))*8(sp);
+ lfd fa7,(15+(off))*8(sp); \
+ lfd fa8,(16+(off))*8(sp); \
+ lfd fa9,(17+(off))*8(sp); \
+ lfd fa10,(18+(off))*8(sp); \
+ lfd fa11,(19+(off))*8(sp); \
+ lfd fa12,(20+(off))*8(sp);
#define SAVE_TEMPORARY_REGISTERS(off) \
std t3,(3+(off))*8(sp); \
std t4,(4+(off))*8(sp); \
std t5,(5+(off))*8(sp); \
- std t6,(6+(off))*8(sp); \
+ std t6,(6+(off))*8(sp);
+#if 0
+ \
\
stfd ft0,(7+(off))*8(sp); \
stfd ft1,(8+(off))*8(sp); \
stfd ft3,(10+(off))*8(sp); \
stfd ft4,(11+(off))*8(sp); \
stfd ft5,(12+(off))*8(sp);
-
+#endif
#define RESTORE_TEMPORARY_REGISTERS(off) \
ld t0,(0+(off))*8(sp); \
ld t1,(1+(off))*8(sp); \
ld t3,(3+(off))*8(sp); \
ld t4,(4+(off))*8(sp); \
ld t5,(5+(off))*8(sp); \
- ld t6,(6+(off))*8(sp); \
+ ld t6,(6+(off))*8(sp);
+#if 0
+ \
\
lfd ft0,(7+(off))*8(sp); \
lfd ft1,(8+(off))*8(sp); \
lfd ft3,(10+(off))*8(sp); \
lfd ft4,(11+(off))*8(sp); \
lfd ft5,(12+(off))*8(sp);
-
+#endif
#endif /* _MD_ASM_H */
Changes: Edwin Steiner
- $Id: md.c 5934 2006-11-08 13:33:08Z tbfg $
+ $Id: md.c 5940 2006-11-09 09:59:28Z tbfg $
*/
#include "vm/global.h"
#include "vm/jit/asmpart.h"
+#include "codegen.h"
#if !defined(NDEBUG) && defined(ENABLE_DISASSEMBLER)
#include "vm/options.h" /* XXX debug */
vm_abort("jump displacement is out of range: %d > +/-%d", disp, 0x00007fff);
mcode &= 0xffff0000;
- mcode |= (((disp)&0xfffc));
+ mcode |= (((disp)& M_BCMASK));
} else if ((mcode & 0xfc000000) == 0x48000000) {
/* unconditional jump bx */
if ((disp < (s4) 0xfc000000) || (disp > (s4) 0x03ffffff))
vm_abort("jump displacement is out of range: %d > +/-%d", disp, 0x0cffffff);
mcode &= 0xfc000000;
- mcode |= (((disp)&0x03fffffc));
+ mcode |= (((disp)& M_BMASK));
} else {
vm_abort("md_codegen_patch_branch, patching unsupported branch: %xd", mcode);
}
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