fix caching problem
authorGreg Watson <jarrah@users.sourceforge.net>
Sun, 7 Mar 2004 17:28:59 +0000 (17:28 +0000)
committerGreg Watson <jarrah@users.sourceforge.net>
Sun, 7 Mar 2004 17:28:59 +0000 (17:28 +0000)
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1380 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/cpu/ppc/mpc74xx/Config.lb
src/cpu/ppc/mpc74xx/cache.S [new file with mode: 0644]

index 3c74233845645c60e3fb344466f6e77adea60df8..6005d9855cd150e66727776d352ec4088be6c0c0 100644 (file)
@@ -17,6 +17,7 @@ default DCACHE_RAM_SIZE=0x8000
 
 initinclude "FAMILY_INIT" cpu/ppc/mpc74xx/mpc74xx.inc
 object clock.o
+object cache.S
 initobject clock.o
-initobject cache.o
+initobject cache.S
 
diff --git a/src/cpu/ppc/mpc74xx/cache.S b/src/cpu/ppc/mpc74xx/cache.S
new file mode 100644 (file)
index 0000000..237b178
--- /dev/null
@@ -0,0 +1,23 @@
+#define ASM
+#include "ppcreg.h"
+#include <ppc_asm.tmpl>
+
+#define NUM_CACHE_LINES 128*8
+#define L1_CACHE_LINE_SIZE 32
+#define cache_flush_buffer 0x1000
+
+/*
+ * Flush data cache
+ * Do this by just reading lots of stuff into the cache.
+ */
+.globl flush_dcache
+flush_dcache:
+       lis     r3,cache_flush_buffer@h
+       ori     r3,r3,cache_flush_buffer@l
+       li      r4,NUM_CACHE_LINES
+       mtctr   r4
+0:     lwz     r4,0(r3)
+       addi    r3,r3,L1_CACHE_LINE_SIZE
+       bdnz    0b
+       blr
+