update failover handling of some amd64 boards

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1699 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/src/mainboard/Iwill/DK8S2/failover.c b/src/mainboard/Iwill/DK8S2/failover.c
index e40891b50df44c23db44f584dea8fc1d76736fa5..e351cae83d04f60ce4e447345c648e5e3d5b6cb5 100644 (file)
--- a/src/mainboard/Iwill/DK8S2/failover.c
+++ b/src/mainboard/Iwill/DK8S2/failover.c
@@ -3,40 +3,67 @@
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <arch/io.h>
-#include "arch/romcc_io.h"
+#include <arch/romcc_io.h>
+#include <cpu/x86/lapic.h>
 #include "pc80/mc146818rtc_early.c"
 #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
 #include "northbridge/amd/amdk8/early_ht.c"
-#include "cpu/p6/boot_cpu.c"
+#include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 
-static void main(void)
+static unsigned long main(unsigned long bist)
 {
-       /* Nothing special needs to be done to find bus 0 */
-       /* Allow the HT devices to be found */
-       enumerate_ht_chain();
-
-       /* Setup the 8111 */
-       amd8111_enable_rom();
+       /* Make cerain my local apic is useable */
+       enable_lapic();
 
-       /* Is this a cpu reset? */
+       /* Is this a cpu only reset? */
        if (cpu_init_detected()) {
                if (last_boot_normal()) {
-                       asm("jmp __normal_image");
+                       goto normal_image;
                } else {
-                       asm("jmp __cpu_reset");
+                       goto cpu_reset;
                }
        }
-       /* Is this a deliberate reset by the bios */
-       else if (bios_reset_detected() && last_boot_normal()) {
-               asm("jmp __normal_image");
-       }
        /* Is this a secondary cpu? */
-       else if (!boot_cpu() && last_boot_normal()) {
-               asm("jmp __normal_image");
+       if (!boot_cpu()) {
+               if (last_boot_normal()) {
+                       goto normal_image;
+               } else {
+                       goto fallback_image;
+               }
+       }
+       
+
+       /* Nothing special needs to be done to find bus 0 */
+       /* Allow the HT devices to be found */
+       enumerate_ht_chain();
+       
+       /* Setup the 8111 */
+       amd8111_enable_rom();
+
+       /* Is this a deliberate reset by the bios */
+       if (bios_reset_detected() && last_boot_normal()) {
+               goto normal_image;
        }
        /* This is the primary cpu how should I boot? */
        else if (do_normal_boot()) {
-               asm("jmp __normal_image");
+               goto normal_image;
+       }
+       else {
+               goto fallback_image;
        }
+ normal_image:
+       asm volatile ("jmp __normal_image" 
+               : /* outputs */ 
+               : "a" (bist) /* inputs */
+               : /* clobbers */
+               );
+ cpu_reset:
+       asm volatile ("jmp __cpu_reset"
+               : /* outputs */ 
+               : "a"(bist) /* inputs */
+               : /* clobbers */
+               );
+ fallback_image:
+       return bist;
 }

diff --git a/src/mainboard/Iwill/DK8X/failover.c b/src/mainboard/Iwill/DK8X/failover.c
index bd9c17020ec077595b157cc5275c6cff88a6b4f2..e351cae83d04f60ce4e447345c648e5e3d5b6cb5 100644 (file)
--- a/src/mainboard/Iwill/DK8X/failover.c
+++ b/src/mainboard/Iwill/DK8X/failover.c
@@ -3,40 +3,67 @@
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <arch/io.h>
-#include "arch/romcc_io.h"
+#include <arch/romcc_io.h>
+#include <cpu/x86/lapic.h>
 #include "pc80/mc146818rtc_early.c"
 #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
 #include "northbridge/amd/amdk8/early_ht.c"
-#include "cpu/p6/boot_cpu.c"
+#include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 
-static void main(void)
+static unsigned long main(unsigned long bist)
 {
-       /* Nothing special needs to be done to find bus 0 */
-       /* Allow the HT devices to be found */
-       enumerate_ht_chain(0);
-
-       /* Setup the 8111 */
-       amd8111_enable_rom();
+       /* Make cerain my local apic is useable */
+       enable_lapic();
 
-       /* Is this a cpu reset? */
+       /* Is this a cpu only reset? */
        if (cpu_init_detected()) {
                if (last_boot_normal()) {
-                       asm("jmp __normal_image");
+                       goto normal_image;
                } else {
-                       asm("jmp __cpu_reset");
+                       goto cpu_reset;
                }
        }
-       /* Is this a deliberate reset by the bios */
-       else if (bios_reset_detected() && last_boot_normal()) {
-               asm("jmp __normal_image");
-       }
        /* Is this a secondary cpu? */
-       else if (!boot_cpu() && last_boot_normal()) {
-               asm("jmp __normal_image");
+       if (!boot_cpu()) {
+               if (last_boot_normal()) {
+                       goto normal_image;
+               } else {
+                       goto fallback_image;
+               }
+       }
+       
+
+       /* Nothing special needs to be done to find bus 0 */
+       /* Allow the HT devices to be found */
+       enumerate_ht_chain();
+       
+       /* Setup the 8111 */
+       amd8111_enable_rom();
+
+       /* Is this a deliberate reset by the bios */
+       if (bios_reset_detected() && last_boot_normal()) {
+               goto normal_image;
        }
        /* This is the primary cpu how should I boot? */
        else if (do_normal_boot()) {
-               asm("jmp __normal_image");
+               goto normal_image;
+       }
+       else {
+               goto fallback_image;
        }
+ normal_image:
+       asm volatile ("jmp __normal_image" 
+               : /* outputs */ 
+               : "a" (bist) /* inputs */
+               : /* clobbers */
+               );
+ cpu_reset:
+       asm volatile ("jmp __cpu_reset"
+               : /* outputs */ 
+               : "a"(bist) /* inputs */
+               : /* clobbers */
+               );
+ fallback_image:
+       return bist;
 }

diff --git a/src/mainboard/amd/quartet/failover.c b/src/mainboard/amd/quartet/failover.c
index e40891b50df44c23db44f584dea8fc1d76736fa5..e351cae83d04f60ce4e447345c648e5e3d5b6cb5 100644 (file)
--- a/src/mainboard/amd/quartet/failover.c
+++ b/src/mainboard/amd/quartet/failover.c
@@ -3,40 +3,67 @@
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <arch/io.h>
-#include "arch/romcc_io.h"
+#include <arch/romcc_io.h>
+#include <cpu/x86/lapic.h>
 #include "pc80/mc146818rtc_early.c"
 #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
 #include "northbridge/amd/amdk8/early_ht.c"
-#include "cpu/p6/boot_cpu.c"
+#include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 
-static void main(void)
+static unsigned long main(unsigned long bist)
 {
-       /* Nothing special needs to be done to find bus 0 */
-       /* Allow the HT devices to be found */
-       enumerate_ht_chain();
-
-       /* Setup the 8111 */
-       amd8111_enable_rom();
+       /* Make cerain my local apic is useable */
+       enable_lapic();
 
-       /* Is this a cpu reset? */
+       /* Is this a cpu only reset? */
        if (cpu_init_detected()) {
                if (last_boot_normal()) {
-                       asm("jmp __normal_image");
+                       goto normal_image;
                } else {
-                       asm("jmp __cpu_reset");
+                       goto cpu_reset;
                }
        }
-       /* Is this a deliberate reset by the bios */
-       else if (bios_reset_detected() && last_boot_normal()) {
-               asm("jmp __normal_image");
-       }
        /* Is this a secondary cpu? */
-       else if (!boot_cpu() && last_boot_normal()) {
-               asm("jmp __normal_image");
+       if (!boot_cpu()) {
+               if (last_boot_normal()) {
+                       goto normal_image;
+               } else {
+                       goto fallback_image;
+               }
+       }
+       
+
+       /* Nothing special needs to be done to find bus 0 */
+       /* Allow the HT devices to be found */
+       enumerate_ht_chain();
+       
+       /* Setup the 8111 */
+       amd8111_enable_rom();
+
+       /* Is this a deliberate reset by the bios */
+       if (bios_reset_detected() && last_boot_normal()) {
+               goto normal_image;
        }
        /* This is the primary cpu how should I boot? */
        else if (do_normal_boot()) {
-               asm("jmp __normal_image");
+               goto normal_image;
+       }
+       else {
+               goto fallback_image;
        }
+ normal_image:
+       asm volatile ("jmp __normal_image" 
+               : /* outputs */ 
+               : "a" (bist) /* inputs */
+               : /* clobbers */
+               );
+ cpu_reset:
+       asm volatile ("jmp __cpu_reset"
+               : /* outputs */ 
+               : "a"(bist) /* inputs */
+               : /* clobbers */
+               );
+ fallback_image:
+       return bist;
 }

diff --git a/src/mainboard/amd/serenade/failover.c b/src/mainboard/amd/serenade/failover.c
index b22abfea06326c0487cec71978beac51e5da81d5..e351cae83d04f60ce4e447345c648e5e3d5b6cb5 100644 (file)
--- a/src/mainboard/amd/serenade/failover.c
+++ b/src/mainboard/amd/serenade/failover.c
@@ -4,22 +4,15 @@
 #include <device/pci_ids.h>
 #include <arch/io.h>
 #include <arch/romcc_io.h>
-#include <arch/smp/lapic.h>
+#include <cpu/x86/lapic.h>
 #include "pc80/mc146818rtc_early.c"
 #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
 #include "northbridge/amd/amdk8/early_ht.c"
-#include "cpu/p6/boot_cpu.c"
+#include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 
-#define HAVE_REGPARM_SUPPORT 0
-#if HAVE_REGPARM_SUPPORT
 static unsigned long main(unsigned long bist)
 {
-#else
-static void main(void)
-{
-       unsigned long bist = 0;
-#endif
        /* Make cerain my local apic is useable */
        enable_lapic();
 
@@ -60,21 +53,17 @@ static void main(void)
                goto fallback_image;
        }
  normal_image:
-       asm("jmp __normal_image" 
+       asm volatile ("jmp __normal_image" 
                : /* outputs */ 
                : "a" (bist) /* inputs */
                : /* clobbers */
                );
  cpu_reset:
-       asm("jmp __cpu_reset"
+       asm volatile ("jmp __cpu_reset"
                : /* outputs */ 
                : "a"(bist) /* inputs */
                : /* clobbers */
                );
  fallback_image:
-#if HAVE_REGPARM_SUPPORT
        return bist;
-#else
-       return;
-#endif
 }

diff --git a/src/mainboard/amd/solo/failover.c b/src/mainboard/amd/solo/failover.c
index b22abfea06326c0487cec71978beac51e5da81d5..e351cae83d04f60ce4e447345c648e5e3d5b6cb5 100644 (file)
--- a/src/mainboard/amd/solo/failover.c
+++ b/src/mainboard/amd/solo/failover.c
@@ -4,22 +4,15 @@
 #include <device/pci_ids.h>
 #include <arch/io.h>
 #include <arch/romcc_io.h>
-#include <arch/smp/lapic.h>
+#include <cpu/x86/lapic.h>
 #include "pc80/mc146818rtc_early.c"
 #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
 #include "northbridge/amd/amdk8/early_ht.c"
-#include "cpu/p6/boot_cpu.c"
+#include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 
-#define HAVE_REGPARM_SUPPORT 0
-#if HAVE_REGPARM_SUPPORT
 static unsigned long main(unsigned long bist)
 {
-#else
-static void main(void)
-{
-       unsigned long bist = 0;
-#endif
        /* Make cerain my local apic is useable */
        enable_lapic();
 
@@ -60,21 +53,17 @@ static void main(void)
                goto fallback_image;
        }
  normal_image:
-       asm("jmp __normal_image" 
+       asm volatile ("jmp __normal_image" 
                : /* outputs */ 
                : "a" (bist) /* inputs */
                : /* clobbers */
                );
  cpu_reset:
-       asm("jmp __cpu_reset"
+       asm volatile ("jmp __cpu_reset"
                : /* outputs */ 
                : "a"(bist) /* inputs */
                : /* clobbers */
                );
  fallback_image:
-#if HAVE_REGPARM_SUPPORT
        return bist;
-#else
-       return;
-#endif
 }

diff --git a/src/mainboard/ibm/e325/failover.c b/src/mainboard/ibm/e325/failover.c
index b22abfea06326c0487cec71978beac51e5da81d5..e351cae83d04f60ce4e447345c648e5e3d5b6cb5 100644 (file)
--- a/src/mainboard/ibm/e325/failover.c
+++ b/src/mainboard/ibm/e325/failover.c
@@ -4,22 +4,15 @@
 #include <device/pci_ids.h>
 #include <arch/io.h>
 #include <arch/romcc_io.h>
-#include <arch/smp/lapic.h>
+#include <cpu/x86/lapic.h>
 #include "pc80/mc146818rtc_early.c"
 #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
 #include "northbridge/amd/amdk8/early_ht.c"
-#include "cpu/p6/boot_cpu.c"
+#include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 
-#define HAVE_REGPARM_SUPPORT 0
-#if HAVE_REGPARM_SUPPORT
 static unsigned long main(unsigned long bist)
 {
-#else
-static void main(void)
-{
-       unsigned long bist = 0;
-#endif
        /* Make cerain my local apic is useable */
        enable_lapic();
 
@@ -60,21 +53,17 @@ static void main(void)
                goto fallback_image;
        }
  normal_image:
-       asm("jmp __normal_image" 
+       asm volatile ("jmp __normal_image" 
                : /* outputs */ 
                : "a" (bist) /* inputs */
                : /* clobbers */
                );
  cpu_reset:
-       asm("jmp __cpu_reset"
+       asm volatile ("jmp __cpu_reset"
                : /* outputs */ 
                : "a"(bist) /* inputs */
                : /* clobbers */
                );
  fallback_image:
-#if HAVE_REGPARM_SUPPORT
        return bist;
-#else
-       return;
-#endif
 }

diff --git a/src/mainboard/newisys/khepri/failover.c b/src/mainboard/newisys/khepri/failover.c
index e40891b50df44c23db44f584dea8fc1d76736fa5..e351cae83d04f60ce4e447345c648e5e3d5b6cb5 100644 (file)
--- a/src/mainboard/newisys/khepri/failover.c
+++ b/src/mainboard/newisys/khepri/failover.c
@@ -3,40 +3,67 @@
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <arch/io.h>
-#include "arch/romcc_io.h"
+#include <arch/romcc_io.h>
+#include <cpu/x86/lapic.h>
 #include "pc80/mc146818rtc_early.c"
 #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
 #include "northbridge/amd/amdk8/early_ht.c"
-#include "cpu/p6/boot_cpu.c"
+#include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 
-static void main(void)
+static unsigned long main(unsigned long bist)
 {
-       /* Nothing special needs to be done to find bus 0 */
-       /* Allow the HT devices to be found */
-       enumerate_ht_chain();
-
-       /* Setup the 8111 */
-       amd8111_enable_rom();
+       /* Make cerain my local apic is useable */
+       enable_lapic();
 
-       /* Is this a cpu reset? */
+       /* Is this a cpu only reset? */
        if (cpu_init_detected()) {
                if (last_boot_normal()) {
-                       asm("jmp __normal_image");
+                       goto normal_image;
                } else {
-                       asm("jmp __cpu_reset");
+                       goto cpu_reset;
                }
        }
-       /* Is this a deliberate reset by the bios */
-       else if (bios_reset_detected() && last_boot_normal()) {
-               asm("jmp __normal_image");
-       }
        /* Is this a secondary cpu? */
-       else if (!boot_cpu() && last_boot_normal()) {
-               asm("jmp __normal_image");
+       if (!boot_cpu()) {
+               if (last_boot_normal()) {
+                       goto normal_image;
+               } else {
+                       goto fallback_image;
+               }
+       }
+       
+
+       /* Nothing special needs to be done to find bus 0 */
+       /* Allow the HT devices to be found */
+       enumerate_ht_chain();
+       
+       /* Setup the 8111 */
+       amd8111_enable_rom();
+
+       /* Is this a deliberate reset by the bios */
+       if (bios_reset_detected() && last_boot_normal()) {
+               goto normal_image;
        }
        /* This is the primary cpu how should I boot? */
        else if (do_normal_boot()) {
-               asm("jmp __normal_image");
+               goto normal_image;
+       }
+       else {
+               goto fallback_image;
        }
+ normal_image:
+       asm volatile ("jmp __normal_image" 
+               : /* outputs */ 
+               : "a" (bist) /* inputs */
+               : /* clobbers */
+               );
+ cpu_reset:
+       asm volatile ("jmp __cpu_reset"
+               : /* outputs */ 
+               : "a"(bist) /* inputs */
+               : /* clobbers */
+               );
+ fallback_image:
+       return bist;
 }