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Fix the `nop` opcode on some MIPS-based Loongson CPUs.
author
Alex Rønne Petersen
<alexrp@xamarin.com>
Fri, 15 Nov 2013 14:08:06 +0000
(15:08 +0100)
committer
Alex Rønne Petersen
<alexrp@xamarin.com>
Fri, 15 Nov 2013 14:08:06 +0000
(15:08 +0100)
After much trouble building Mono in Debian/MIPS, @directhex
narrowed it down to this issue:
https://sourceware.org/ml/binutils/2009-11/msg00387.html
So since some of the 2E and 2F versions of the Loongson CPUs
break with a regular `sll zero, zero, 0` we need to issue an
`or at, at, 0`. This makes sure we don't randomly deadlock or
blow up when the CPU is under heavy load.
Yes, really.
mono/arch/mips/mips-codegen.h
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diff --git
a/mono/arch/mips/mips-codegen.h
b/mono/arch/mips/mips-codegen.h
index dc4df7d8a6a048ffe35419d5975e09a63528e98c..1dbd1c6e279d40613c8d7ccf9eb3ea0664528993 100644
(file)
--- a/
mono/arch/mips/mips-codegen.h
+++ b/
mono/arch/mips/mips-codegen.h
@@
-334,7
+334,7
@@
enum {
/* misc and coprocessor ops */
#define mips_move(c,dest,src) mips_addu(c,dest,src,mips_zero)
#define mips_dmove(c,dest,src) mips_daddu(c,dest,src,mips_zero)
-#define mips_nop(c) mips_
sll(c,0,0
,0)
+#define mips_nop(c) mips_
or(c,mips_at,mips_at
,0)
#define mips_break(c,code) mips_emit32(c, ((code)<<6)|13)
#define mips_mfhi(c,dest) mips_format_r(c,0,0,0,dest,0,16)
#define mips_mflo(c,dest) mips_format_r(c,0,0,0,dest,0,18)