Move coreboot_ram and coreboot_apc to CBFS. This allows to

reduce the size of the bootblock (done for kontron/986lcd-m)

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4315 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/src/arch/i386/Config.lb b/src/arch/i386/Config.lb
index 5f090666952b3c46ca0f180ab60c25576fd300c1..68b4310248c169f612c6c22a193adbfb676b101b 100644 (file)
--- a/src/arch/i386/Config.lb
+++ b/src/arch/i386/Config.lb
@@ -1,3 +1,4 @@
+uses CONFIG_CBFS
 uses CONFIG_SMP
 uses CONFIG_PRECOMPRESSED_PAYLOAD
 uses CONFIG_USE_INIT
@@ -7,18 +8,39 @@ uses USE_FALLBACK_IMAGE
 
 init init/crt0.S.lb
 
+if CONFIG_CBFS
+       if USE_FAILOVER_IMAGE
+       else
+               initobject /src/lib/cbfs.o
+               initobject /src/console/vsprintf.o
+               initobject /src/lib/lzma.o
+       end
+end
+
 if HAVE_FAILOVER_BOOT
-      if USE_FAILOVER_IMAGE
-              ldscript init/ldscript_failover.lb
-      else
-              ldscript init/ldscript.lb
-      end
+       if USE_FAILOVER_IMAGE
+               ldscript init/ldscript_failover.lb
+       else
+               if CONFIG_CBFS
+                       ldscript init/ldscript_cbfs.lb
+               else
+                       ldscript init/ldscript.lb
+               end
+       end
 else
-      if USE_FALLBACK_IMAGE
-              ldscript init/ldscript_fallback.lb
-      else
-              ldscript init/ldscript.lb
-      end
+       if CONFIG_CBFS
+               if USE_FALLBACK_IMAGE
+                       ldscript init/ldscript_fallback_cbfs.lb
+               else
+                       ldscript init/ldscript_cbfs.lb
+               end
+       else
+               if USE_FALLBACK_IMAGE
+                       ldscript init/ldscript_fallback.lb
+               else
+                       ldscript init/ldscript.lb
+               end
+       end
 end
 
 makerule all

diff --git a/src/arch/i386/init/crt0.S.lb b/src/arch/i386/init/crt0.S.lb
index c54e7053d04a85f2748ffdded15bf9e744938ea3..dd518994418f533a174eae2d72f652ba12ac91be 100644 (file)
--- a/src/arch/i386/init/crt0.S.lb
+++ b/src/arch/i386/init/crt0.S.lb
@@ -73,6 +73,10 @@ __main:
        movl    $0x4000000, %esp
        movl    %esp, %ebp
        pushl %esi
+#ifdef CONFIG_CBFS
+       pushl $str_coreboot_ram_name
+       call cbfs_and_run_core
+#else
        movl    $_liseg, %esi
        movl    $_iseg,  %edi
        movl    $_eiseg, %ecx
@@ -81,6 +85,7 @@ __main:
        pushl %edi
        pushl %esi
        call copy_and_run_core
+#endif
 
 .Lhlt: 
        intel_chip_post_macro(0xee)     /* post fe */
@@ -137,6 +142,13 @@ str_copying_to_ram:  .string "Uncompressing coreboot to RAM.\r\n"
 #else
 str_copying_to_ram:  .string "Copying coreboot to RAM.\r\n"
 #endif
+#if CONFIG_CBFS
+# if USE_FALLBACK_IMAGE == 1
+str_coreboot_ram_name: .string "fallback/coreboot_ram"
+# else
+str_coreboot_ram_name: .string "normal/coreboot_ram"
+# endif
+#endif
 str_pre_main:        .string "Jumping to coreboot.\r\n"
 .previous
 

diff --git a/src/arch/i386/init/ldscript_cbfs.lb b/src/arch/i386/init/ldscript_cbfs.lb
new file mode 100644 (file)
index 0000000..e86befb
--- /dev/null
+++ b/src/arch/i386/init/ldscript_cbfs.lb
@@ -0,0 +1,59 @@
+/*
+ *     Memory map:
+ *
+ *     _RAMBASE                
+ *                             : data segment
+ *                             : bss segment
+ *                             : heap
+ *                             : stack
+ *     _ROMBASE
+ *                             : coreboot text 
+ *                             : readonly text
+ */
+/*
+ * Bootstrap code for the STPC Consumer
+ * Copyright (c) 1999 by Net Insight AB. All Rights Reserved.
+ *
+ */
+
+/*
+ *     Written by Johan Rydberg, based on work by Daniel Kahlin.
+ *      Rewritten by Eric Biederman
+ */
+/*
+ *     We use ELF as output format. So that we can
+ *     debug the code in some form. 
+ */
+OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
+OUTPUT_ARCH(i386)
+
+/*
+ENTRY(_start)
+*/
+
+TARGET(binary)
+SECTIONS
+{
+       . = _ROMBASE;
+
+       /* This section might be better named .setup */
+       .rom . : {
+               _rom = .;
+               *(.rom.text);
+               *(.rom.data);
+               *(.rodata.*);
+               *(.rom.data.*);
+               . = ALIGN(16);
+               _erom = .;
+       }
+
+       _lrom = LOADADDR(.rom);
+       _elrom = LOADADDR(.rom) + SIZEOF(.rom);
+
+       /DISCARD/ : {
+               *(.comment)
+               *(.comment.*)
+               *(.note)
+               *(.note.*)
+       }
+}

diff --git a/src/arch/i386/init/ldscript_fallback_cbfs.lb b/src/arch/i386/init/ldscript_fallback_cbfs.lb
new file mode 100644 (file)
index 0000000..d1b56ce
--- /dev/null
+++ b/src/arch/i386/init/ldscript_fallback_cbfs.lb
@@ -0,0 +1,64 @@
+/*
+ *     Memory map:
+ *
+ *     _RAMBASE                
+ *                             : data segment
+ *                             : bss segment
+ *                             : heap
+ *                             : stack
+ *     _ROMBASE
+ *                             : coreboot text 
+ *                             : readonly text
+ */
+/*
+ * Bootstrap code for the STPC Consumer
+ * Copyright (c) 1999 by Net Insight AB. All Rights Reserved.
+ *
+ */
+
+/*
+ *     Written by Johan Rydberg, based on work by Daniel Kahlin.
+ *      Rewritten by Eric Biederman
+ */
+/*
+ *     We use ELF as output format. So that we can
+ *     debug the code in some form. 
+ */
+OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
+OUTPUT_ARCH(i386)
+
+/*
+ENTRY(_start)
+*/
+
+TARGET(binary)
+SECTIONS
+{
+       . = _ROMBASE;
+
+       /* cut _start into last 64k*/
+       _x = .;
+       . = (_x < (_ROMBASE - 0x10000 +  ROM_IMAGE_SIZE)) ? (_ROMBASE - 0x10000 +  ROM_IMAGE_SIZE) : _x;
+
+       /* This section might be better named .setup */
+       .rom . : {
+               _rom = .;
+               *(.rom.text);
+               *(.rom.data);
+               *(.init.rodata.*);
+               *(.rodata.*);
+               *(.rom.data.*);
+               . = ALIGN(16);
+               _erom = .;
+       }
+
+       _lrom = LOADADDR(.rom);
+       _elrom = LOADADDR(.rom) + SIZEOF(.rom);
+
+       /DISCARD/ : {
+               *(.comment)
+               *(.note)
+               *(.comment.*)
+               *(.note.*)
+       }
+}

diff --git a/src/arch/i386/lib/Config.lb b/src/arch/i386/lib/Config.lb
index 3356b8f4f58305b77bbe9de59a103c391be72d86..52da9d5e59caaaa1489000b69f65c3922ec7edb1 100644 (file)
--- a/src/arch/i386/lib/Config.lb
+++ b/src/arch/i386/lib/Config.lb
@@ -1,6 +1,7 @@
 uses CONFIG_USE_INIT
 uses CONFIG_USE_PRINTK_IN_CAR
 uses USE_FAILOVER_IMAGE
+uses CONFIG_CBFS
 
 object c_start.S
 object cpu.c
@@ -14,5 +15,9 @@ initobject printk_init.o
 
 if USE_FAILOVER_IMAGE
 else
-       initobject copy_and_run.o
+       if CONFIG_CBFS
+               initobject cbfs_and_run.o
+       else
+               initobject copy_and_run.o
+       end
 end

diff --git a/src/arch/i386/lib/cbfs_and_run.c b/src/arch/i386/lib/cbfs_and_run.c
new file mode 100644 (file)
index 0000000..eaded11
--- /dev/null
+++ b/src/arch/i386/lib/cbfs_and_run.c
@@ -0,0 +1,23 @@
+/* by yhlu 6.2005
+       moved from nrv2v.c and some lines from crt0.S
+   2006/05/02 - stepan: move nrv2b to an extra file.
+*/
+
+#include <console/console.h>
+#include <cbfs.h>
+
+void cbfs_and_run_core(char *filename, unsigned ebp)
+{
+       u8 *dst;
+       print_debug("Jumping to image.\r\n");
+       dst = cbfs_load_stage(filename);
+       print_debug("Jumping to image.\r\n");
+
+       __asm__ volatile (
+               "movl %%eax, %%ebp\n\t"
+               "cli\n\t"
+               "jmp     *%%edi\n\t"
+               :: "a"(ebp), "D"(dst)
+       );
+
+}

diff --git a/src/cpu/amd/car/copy_and_run.c b/src/cpu/amd/car/copy_and_run.c
index e0fa098833bf4875115670ed4c8b23c41bde3678..437b91d4acf558e38930fe3048a3f35658960ee9 100644 (file)
--- a/src/cpu/amd/car/copy_and_run.c
+++ b/src/cpu/amd/car/copy_and_run.c
@@ -3,6 +3,31 @@
    2006/05/02 - stepan: move nrv2b to an extra file.
 */
 
+#if CONFIG_CBFS == 1
+void cbfs_and_run_core(char*, unsigned ebp);
+
+static void copy_and_run(void)
+{
+# if USE_FALLBACK_IMAGE == 1
+       cbfs_and_run_core("fallback/coreboot_ram", 0);
+# else
+       cbfs_and_run_core("normal/coreboot_ram", 0);
+# endif
+}
+
+#if CONFIG_AP_CODE_IN_CAR == 1
+
+static void copy_and_run_ap_code_in_car(unsigned ret_addr)
+{
+# if USE_FALLBACK_IMAGE == 1
+       cbfs_and_run_core("fallback/coreboot_apc", ret_addr);
+# else
+       cbfs_and_run_core("normal/coreboot_apc", ret_addr);
+# endif
+}
+#endif
+
+#else
 void copy_and_run_core(u8 *src, u8 *dst, unsigned long ilen, unsigned ebp);
 
 extern u8 _liseg, _iseg, _eiseg;
@@ -35,3 +60,4 @@ static void copy_and_run_ap_code_in_car(unsigned ret_addr)
        copy_and_run_core(src, dst, ilen, ret_addr);
 }
 #endif
+#endif

diff --git a/src/cpu/x86/car/copy_and_run.c b/src/cpu/x86/car/copy_and_run.c
index 14fe83d667f42ae5f33faba7c2c70663f7d1b52d..30b3b7a2f5282d85ba2dcb3547f1a5eee5fa3c08 100644 (file)
--- a/src/cpu/x86/car/copy_and_run.c
+++ b/src/cpu/x86/car/copy_and_run.c
@@ -2,6 +2,22 @@
    (Written by Patrick Georgi <patrick.georgi@coresystems.de> for coresystems GmbH
 */
 
+#if CONFIG_CBFS == 1
+void cbfs_and_run_core(char*, unsigned ebp);
+
+static void copy_and_run(unsigned cpu_reset)
+{
+       if (cpu_reset == 1) cpu_reset = -1;
+       else cpu_reset = 0;
+
+# if USE_FALLBACK_IMAGE == 1
+       cbfs_and_run_core("fallback/coreboot_ram", cpu_reset);
+# else
+       cbfs_and_run_core("normal/coreboot_ram", cpu_reset);
+# endif
+}
+
+#else
 void copy_and_run_core(u8 *src, u8 *dst, unsigned long ilen, unsigned ebp);
 
 extern u8 _liseg, _iseg, _eiseg;
@@ -21,3 +37,5 @@ static void copy_and_run(unsigned cpu_reset)
 
        copy_and_run_core(src, dst, ilen, cpu_reset);
 }
+#endif
+

diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c
index b5fb9b15eb481aa5ecc33e2cbc045760cc7e2b0f..caf5db4b49e1848dc7773c916c0a5ebeafa3f508 100644 (file)
--- a/src/lib/cbfs.c
+++ b/src/lib/cbfs.c
@@ -38,14 +38,11 @@ int cbfs_decompress(int algo, void *src, void *dst, int len)
                memcpy(dst, src, len);
                return 0;
 
-#if CONFIG_COMPRESSED_PAYLOAD_LZMA==1
-
        case CBFS_COMPRESS_LZMA: {
                unsigned long ulzma(unsigned char *src, unsigned char *dst);
                ulzma(src, dst);
        }
                return 0;
-#endif
 
 #if CONFIG_COMPRESSED_PAYLOAD_NRV2B==1
        case CBFS_COMPRESS_NRV2B: {
@@ -186,16 +183,17 @@ void * cbfs_load_stage(const char *name)
                return (void *) -1;
 
        printk_info("Stage: load @ %d/%d bytes, enter @ %llx\n", 
-                       ntohl((u32) stage->load), ntohl(stage->memlen), 
+                       (u32) stage->load, stage->memlen, 
                        stage->entry);
-       memset((void *) ntohl((u32) stage->load), 0, ntohl(stage->memlen));
+       memset((void *) (u32) stage->load, 0, stage->memlen);
 
-       if (cbfs_decompress(ntohl(stage->compression),
+       if (cbfs_decompress(stage->compression,
                             ((unsigned char *) stage) +
                             sizeof(struct cbfs_stage),
-                            (void *) ntohl((u32) stage->load),
-                            ntohl(stage->len)))
+                            (void *) (u32) stage->load,
+                            stage->len))
                return (void *) -1;
+       printk_info("Stage: done loading.\n");
 
        entry = stage->entry;
 //     return (void *) ntohl((u32) stage->entry);

diff --git a/targets/kontron/986lcd-m/Config-abuild.lb b/targets/kontron/986lcd-m/Config-abuild.lb
index cf076b9d9b7b8c7024da1980955f8220ed7b586d..6924d877c05bf44f30ab7edab574a51d1829974b 100644 (file)
--- a/targets/kontron/986lcd-m/Config-abuild.lb
+++ b/targets/kontron/986lcd-m/Config-abuild.lb
@@ -11,18 +11,18 @@ __COMPRESSION__
 __LOGLEVEL__
 
 option ROM_SIZE=1024*1024
-option FALLBACK_SIZE=1024*512
+option FALLBACK_SIZE=1024*64
 
 romimage "normal"
        option USE_FALLBACK_IMAGE=0
-       option ROM_IMAGE_SIZE=0x24000
+       option ROM_IMAGE_SIZE=0x10000
        option COREBOOT_EXTRA_VERSION=".0-normal"
        payload __PAYLOAD__
 end
 
 romimage "fallback" 
        option USE_FALLBACK_IMAGE=1
-       option ROM_IMAGE_SIZE=0x24000
+       option ROM_IMAGE_SIZE=0x10000
        option COREBOOT_EXTRA_VERSION=".0-fallback"
        payload __PAYLOAD__
 end

diff --git a/util/newconfig/config.g b/util/newconfig/config.g
index b8b8c16e9cd4bbb782611a0c8e66e1b338168f68..2bd4ca6c4bc1461330f11697c357d678ec5c9885 100644 (file)
--- a/util/newconfig/config.g
+++ b/util/newconfig/config.g
@@ -2303,6 +2303,9 @@ def writemakefile(path):
                        #failover is a hack that will go away soon. 
                        if (j != "failover") and (rommapping[j] != "/dev/null"):
                                file.write("\t./cbfstool %s add-payload %s %s/payload $(CBFS_COMPRESS_FLAG)\n" % (i.name, rommapping[j], j,))
+                       if (j != "failover"):
+                               file.write("\t./cbfstool %s add-stage %s/coreboot_ram %s/coreboot_ram $(CBFS_COMPRESS_FLAG)\n" % (i.name, j, j,))
+                       file.write("\tif [ -f %s/coreboot_apc ]; then ./cbfstool %s add-stage %s/coreboot_apc %s/coreboot_apc $(CBFS_COMPRESS_FLAG); fi\n" % (j, i.name, j, j,))
                file.write("\t./cbfstool %s print\n" % i.name)
                file.write("\n")
        file.write("else\n\n")