float arguments are preserved over codegen_start_native_call.
* src/vm/jit/sparc64/md-abi.c (codegen_start_native_call): Likewise.
* src/vm/jit/sparc64/machine-instr.h (compare_and_swap): Changed inline
assembly, so it survives gcc optimization.
* src/vm/jit/sparc64/asmpart.S (asm_patcher_wrapper): Saving and restoring
float return register.
* src/vm/jit/sparc64/md-asm.h: Likewise.
mov pv_callee,pv_caller
/* create window and stack frame */
- save %sp,-((FLT_ARG_CNT+FLT_TMP_CNT+CSTACK_CNT+4)*8),%sp
+ save %sp,-((FLT_ARG_CNT+FLT_TMP_CNT+CSTACK_CNT+6)*8),%sp
- SAVE_FLOAT_ARGUMENT_REGISTERS(CSTACK_CNT)
- SAVE_FLOAT_TEMPORARY_REGISTERS(CSTACK_CNT+FLT_ARG_CNT)
+ SAVE_FLOAT_RETURN_REGISTER(CSTACK_CNT)
+ SAVE_FLOAT_ARGUMENT_REGISTERS(CSTACK_CNT+1)
+ SAVE_FLOAT_TEMPORARY_REGISTERS(CSTACK_CNT+1+FLT_ARG_CNT)
mov itmp1,%l0 /* save itmp1 */
mov itmp2,%l1 /* save itmp2 */
call patcher_wrapper
nop
- RESTORE_FLOAT_ARGUMENT_REGISTERS(CSTACK_CNT)
- RESTORE_FLOAT_TEMPORARY_REGISTERS(CSTACK_CNT+FLT_ARG_CNT)
+ RESTORE_FLOAT_RETURN_REGISTER(CSTACK_CNT)
+ RESTORE_FLOAT_ARGUMENT_REGISTERS(CSTACK_CNT+1)
+ RESTORE_FLOAT_TEMPORARY_REGISTERS(CSTACK_CNT+1+FLT_ARG_CNT)
mov %l0,itmp1 /* restore itmp1 */
mov %l1,itmp2 /* restore itmp2 */
for (i = 0, j = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
- s1 = WINSAVE_CNT + (j * 8);
- M_DST(abi_registers_float_argument[i], REG_SP, BIAS + s1);
+ s1 = WINSAVE_CNT + nmd->memuse + j;
+ M_DST(abi_registers_float_argument[i], REG_SP, BIAS + (s1*8));
fltregarg_offset[i] = s1; /* remember stack offset */
j++;
}
/* prepare data structures for native function call */
- M_ADD_IMM(REG_FP, BIAS, REG_OUT0); /* datasp == top of the stack frame (absolute == +BIAS) */
+ M_ADD_IMM(REG_FP, BIAS, REG_OUT0); /* datasp == top of the stack frame (absolute, ie. + BIAS) */
M_MOV(REG_PV_CALLEE, REG_OUT1);
M_MOV(REG_FP, REG_OUT2); /* java sp */
M_MOV(REG_RA_CALLEE, REG_OUT3);
s2 = nmd->params[j].regoff;
/* JIT float regs are still on the stack */
- M_DLD(s2, REG_SP, BIAS + fltregarg_offset[i]);
+ M_DLD(s2, REG_SP, BIAS + (fltregarg_offset[i] * 8));
}
else {
/* not supposed to happen with 16 NAT flt args */
__asm__ __volatile__ (
"mov %3,%0\n\t"
- "casx %1,%2,%0\n\t"
+ "casx [%4],%2,%0\n\t"
: "=&r"(ret), "=m"(*p)
- : "r"(oldval), "r"(newval), "m"(*p));
+ : "r"(oldval), "r"(newval), "r"(p));
/*dolog("compare_and_swap() return=%d mem=%d", ret, *p);*/
return ret;
#include "mm/memory.h"
#include <assert.h>
+/* helper macros for allocation methods ***************************************/
+#define MIN(a,b) (((a) <= (b)) ? (a) : (b))
/* register descripton array **************************************************/
s4 i;
s4 reguse;
s4 stacksize;
+ s4 min_nat_regs;
/* set default values */
reguse = 0;
stacksize = 6;
+ /* when we are above this, we have to increase the stacksize with every */
+ /* single argument to create the proper argument array */
+ min_nat_regs = MIN(INT_NATARG_CNT, FLT_NATARG_CNT);
+
/* get params field of methoddesc */
pd = md->params;
pd->inmemory = true;
pd->regoff = reguse;
reguse++;
- stacksize++;
}
+
+ if (i >= min_nat_regs)
+ stacksize++;
break;
case TYPE_FLT:
case TYPE_DBL:
pd->inmemory = true;
pd->regoff = reguse;
reguse++;
- stacksize++;
}
+
+ if (i >= min_nat_regs)
+ stacksize++;
break;
}
}
/* save and restore macros ****************************************************/
+#define SAVE_FLOAT_RETURN_REGISTER(off) \
+ std fv0,[%sp + bias + ((off)*8)] ;
+
+#define RESTORE_FLOAT_RETURN_REGISTER(off) \
+ ldd [%sp + bias + ((off)*8)],fv0 ;
+
#define SAVE_FLOAT_ARGUMENT_REGISTERS(off) \
std fa0,[%sp + bias + ((0+(off))*8)] ; \