select UDELAY_TSC
select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
for all 440BX and i810 boards as per Options.lb.
The UDELAY_IO / TSC / LAPIC / HPET setup will probably be checked
and improved later when the kconfig transition is done. For now
we keep the same values as in Options.lb.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4729
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
select SOUTHBRIDGE_INTEL_I82371EB
select SUPERIO_WINBOND_W83977TF
select HAVE_PIRQ_TABLE
- select UDELAY_IO
+ select UDELAY_TSC
+ select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
config MAINBOARD_DIR
string
select SOUTHBRIDGE_INTEL_I82371EB
select SUPERIO_WINBOND_W83627HF
select HAVE_PIRQ_TABLE
- select UDELAY_IO
+ select UDELAY_TSC
+ select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
config MAINBOARD_DIR
string
select SOUTHBRIDGE_INTEL_I82371EB
select SUPERIO_WINBOND_W83977TF
select HAVE_PIRQ_TABLE
- select UDELAY_IO
+ select UDELAY_TSC
+ select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
config MAINBOARD_DIR
string
select SOUTHBRIDGE_INTEL_I82801XX
select SUPERIO_SMSC_SMSCSUPERIO
select HAVE_PIRQ_TABLE
- select UDELAY_IO
+ select UDELAY_TSC
+ select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
config MAINBOARD_DIR
string
select SOUTHBRIDGE_INTEL_I82801XX
select SUPERIO_SMSC_LPC47B272
select HAVE_PIRQ_TABLE
- select UDELAY_IO
+ select UDELAY_TSC
+ select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
config MAINBOARD_DIR
string
select HAVE_MP_TABLE
select SMP
select IOAPIC
- select UDELAY_IO
+ select UDELAY_TSC
+ select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
config MAINBOARD_DIR
string
select HAVE_MP_TABLE
select SMP
select IOAPIC
- select UDELAY_IO
+ select UDELAY_TSC
+ select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
config MAINBOARD_DIR
string
select SOUTHBRIDGE_INTEL_I82371EB
select SUPERIO_WINBOND_W83977TF
select HAVE_PIRQ_TABLE
- select UDELAY_IO
+ select UDELAY_TSC
+ select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
config MAINBOARD_DIR
string
select SOUTHBRIDGE_INTEL_I82371EB
select SUPERIO_WINBOND_W83977TF
select HAVE_PIRQ_TABLE
- select UDELAY_IO
+ select UDELAY_TSC
+ select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
config MAINBOARD_DIR
string
select SOUTHBRIDGE_INTEL_I82371EB
select SUPERIO_WINBOND_W83977TF
select HAVE_PIRQ_TABLE
- select UDELAY_IO
+ select UDELAY_TSC
+ select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
config MAINBOARD_DIR
string
select SOUTHBRIDGE_INTEL_I82371EB
select SUPERIO_WINBOND_W83977TF
select HAVE_PIRQ_TABLE
- select UDELAY_IO
+ select UDELAY_TSC
+ select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
config MAINBOARD_DIR
string
select SOUTHBRIDGE_INTEL_I82371EB
select SUPERIO_SMSC_SMSCSUPERIO
select HAVE_PIRQ_TABLE
- select UDELAY_IO
+ select UDELAY_TSC
+ select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
config MAINBOARD_DIR
string
# should be SUPERIO_NSC_PC97307!
select SUPERIO_NSC_PC97317
select HAVE_PIRQ_TABLE
- select UDELAY_IO
+ select UDELAY_TSC
+ select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
config MAINBOARD_DIR
string
select SOUTHBRIDGE_INTEL_I82371EB
select SUPERIO_ITE_IT8671F
select HAVE_PIRQ_TABLE
- select UDELAY_IO
+ select UDELAY_TSC
+ select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
config MAINBOARD_DIR
string
select SOUTHBRIDGE_INTEL_I82801XX
select SUPERIO_SMSC_SMSCSUPERIO
select HAVE_PIRQ_TABLE
- select UDELAY_IO
+ select UDELAY_TSC
+ select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
config MAINBOARD_DIR
string
select SOUTHBRIDGE_INTEL_I82371EB
select SUPERIO_WINBOND_W83977TF
select HAVE_PIRQ_TABLE
- select UDELAY_IO
+ select UDELAY_TSC
+ select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
config MAINBOARD_DIR
string
select SOUTHBRIDGE_INTEL_I82371EB
select SUPERIO_WINBOND_W83977TF
select HAVE_PIRQ_TABLE
- select UDELAY_IO
+ select UDELAY_TSC
+ select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
config MAINBOARD_DIR
string
select SOUTHBRIDGE_INTEL_I82801XX
select SUPERIO_SMSC_SMSCSUPERIO
select HAVE_PIRQ_TABLE
- select UDELAY_IO
+ select UDELAY_TSC
+ select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
config MAINBOARD_DIR
string
select SOUTHBRIDGE_INTEL_I82371EB
select SUPERIO_ITE_IT8671F
select HAVE_PIRQ_TABLE
- select UDELAY_IO
+ select UDELAY_TSC
+ select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
config MAINBOARD_DIR
string
select NORTHBRIDGE_INTEL_I440BX
select SOUTHBRIDGE_INTEL_I82371EB
select SUPERIO_NSC_PC87309
- select UDELAY_IO
+ select UDELAY_TSC
+ select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
config MAINBOARD_DIR
string