Move CAR settings to board config for socket 940 boards.
authorWarren Turkal <wt@penguintechs.org>
Thu, 30 Sep 2010 03:35:00 +0000 (03:35 +0000)
committerWarren Turkal <wt@penguintechs.org>
Thu, 30 Sep 2010 03:35:00 +0000 (03:35 +0000)
For the a number of the socket 940 based machines, I collapsed their CAR
configurations into the socket config.

However, I have kept a number of overrides in place for the following
machines:
* broadcom/blast
* ibm/e32{5,6}
* newisys/khepri
* sunw/ultra40
* tyan/s488{0,2}

These machines used different setting than the defaults for socket 940
systems.

Signed-off-by: Warren Turkal <wt@penguintechs.org>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5883 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

13 files changed:
src/cpu/amd/model_fxx/Kconfig
src/cpu/amd/socket_940/Kconfig
src/mainboard/arima/hdama/Kconfig
src/mainboard/broadcom/blast/Kconfig
src/mainboard/ibm/e325/Kconfig
src/mainboard/ibm/e326/Kconfig
src/mainboard/iwill/dk8_htx/Kconfig
src/mainboard/iwill/dk8s2/Kconfig
src/mainboard/iwill/dk8x/Kconfig
src/mainboard/newisys/khepri/Kconfig
src/mainboard/sunw/ultra40/Kconfig
src/mainboard/tyan/s4880/Kconfig
src/mainboard/tyan/s4882/Kconfig

index 21fc1ab377731c937f3f48e680c2120244ed8454..139b96ad250f4b9cadbcbeb5be173ae1d42ce2f8 100644 (file)
@@ -1,31 +1,9 @@
 config CPU_AMD_MODEL_FXX
        bool
-       select CACHE_AS_RAM
        select MMX
        select SSE
        select SSE2
 
-config CPU_ADDR_BITS
-       int
-       default 40
-       depends on CPU_AMD_MODEL_FXX
-
-config DCACHE_RAM_BASE
-       hex
-       default 0xc8000
-       depends on CPU_AMD_MODEL_FXX
-
-config DCACHE_RAM_SIZE
-       hex
-       default 0x08000
-       depends on CPU_AMD_MODEL_FXX
-
-config DCACHE_RAM_GLOBAL_VAR_SIZE
-       hex
-       default 0x01000
-       depends on CPU_AMD_MODEL_FXX
-
-
 config UDELAY_IO
        bool
        default n
index c17a85ffcf5625b41e95f42969b3a2b825528297..6c3a929f14ef8c379f0bf8334ada705843254867 100644 (file)
@@ -1,14 +1,36 @@
 config CPU_AMD_SOCKET_940
        bool
+
+if CPU_AMD_SOCKET_940
+
+config SOCKET_SPECIFIC_OPTIONS
+       def_bool y
        select K8_HT_FREQ_1G_SUPPORT
        select CPU_AMD_MODEL_FXX
+       select CACHE_AS_RAM
 
 config CPU_SOCKET_TYPE
        hex
        default 0x0
-       depends on CPU_AMD_SOCKET_940
 
 config DIMM_SUPPORT
        hex
        default 0x108
-       depends on CPU_AMD_SOCKET_940
+
+config CPU_ADDR_BITS
+       int
+       default 40
+
+config DCACHE_RAM_BASE
+       hex
+       default 0xc8000
+
+config DCACHE_RAM_SIZE
+       hex
+       default 0x08000
+
+config DCACHE_RAM_GLOBAL_VAR_SIZE
+       hex
+       default 0x01000
+
+endif # CPU_AMD_SOCKET_940
index 08faf06e2c099b62aa508981fbdf0158edd24cc6..7a2fecc2d19a1152f327aa96e5a79cf3447678cf 100644 (file)
@@ -12,7 +12,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select HAVE_PIRQ_TABLE
        select HAVE_OPTION_TABLE
        select HAVE_MP_TABLE
-       select CACHE_AS_RAM
        select HAVE_HARD_RESET
        select SB_HT_CHAIN_UNITID_OFFSET_ONLY
        select BOARD_ROMSIZE_KB_512
index a0b5cd76ef593910b1d7e82ae97dda534b97b433..943627a03140c7ebf7e4813d3c7eca6ba2c13511 100644 (file)
@@ -13,7 +13,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select HAVE_OPTION_TABLE
        select HAVE_PIRQ_TABLE
        select HAVE_MP_TABLE
-       select CACHE_AS_RAM
        select HAVE_HARD_RESET
        select BOARD_ROMSIZE_KB_512
        select SB_HT_CHAIN_UNITID_OFFSET_ONLY
index 7f2ae41a9343dd397f3227a48e198f9098a4a121..d986eb4f72fe9023ce77dd195427d07af6f198be 100644 (file)
@@ -12,7 +12,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select HAVE_OPTION_TABLE
        select HAVE_PIRQ_TABLE
        select HAVE_MP_TABLE
-       select CACHE_AS_RAM
        select HAVE_HARD_RESET
        select SB_HT_CHAIN_UNITID_OFFSET_ONLY
        select WAIT_BEFORE_CPUS_INIT
index e268847a9d30af0830602fb5e579022d713427db..10c51811d5396da1427df81f130109a05d1c0122 100644 (file)
@@ -12,7 +12,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select HAVE_OPTION_TABLE
        select HAVE_PIRQ_TABLE
        select HAVE_MP_TABLE
-       select CACHE_AS_RAM
        select HAVE_HARD_RESET
        select SB_HT_CHAIN_UNITID_OFFSET_ONLY
        select WAIT_BEFORE_CPUS_INIT
index e276bca0047056df1be8f6040eddd1fc604cc929..2af7fcfecef8f010ab32905291fffe0db22858dd 100644 (file)
@@ -14,7 +14,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select HAVE_OPTION_TABLE
        select HAVE_PIRQ_TABLE
        select HAVE_MP_TABLE
-       select CACHE_AS_RAM
        select HAVE_HARD_RESET
        select LIFT_BSP_APIC_ID
        select SB_HT_CHAIN_UNITID_OFFSET_ONLY
@@ -26,18 +25,6 @@ config MAINBOARD_DIR
        string
        default iwill/dk8_htx
 
-config DCACHE_RAM_BASE
-       hex
-       default 0xc8000
-
-config DCACHE_RAM_SIZE
-       hex
-       default 0x08000
-
-config DCACHE_RAM_GLOBAL_VAR_SIZE
-       hex
-       default 0x01000
-
 config APIC_ID_OFFSET
        hex
        default 0x10
index ae10855d0765192f3f062365d4a68e25b16164b3..a0ac21c3efab1b9738ff8f65415717bcf9182fee 100644 (file)
@@ -12,7 +12,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select HAVE_PIRQ_TABLE
        select HAVE_OPTION_TABLE
        select HAVE_MP_TABLE
-       select CACHE_AS_RAM
        select HAVE_HARD_RESET
        select SB_HT_CHAIN_UNITID_OFFSET_ONLY
        select WAIT_BEFORE_CPUS_INIT
@@ -23,18 +22,6 @@ config MAINBOARD_DIR
        string
        default iwill/dk8s2
 
-config DCACHE_RAM_BASE
-       hex
-       default 0xc8000
-
-config DCACHE_RAM_SIZE
-       hex
-       default 0x08000
-
-config DCACHE_RAM_GLOBAL_VAR_SIZE
-       hex
-       default 0x01000
-
 config APIC_ID_OFFSET
        hex
        default 0x0
index 7cf97bafb8603fe95ef858dc0f3a75696922dada..f2c99d3a3192ba637c2134d7d9199e0e0ce76987 100644 (file)
@@ -12,7 +12,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select HAVE_OPTION_TABLE
        select HAVE_PIRQ_TABLE
        select HAVE_MP_TABLE
-       select CACHE_AS_RAM
        select HAVE_HARD_RESET
        select SB_HT_CHAIN_UNITID_OFFSET_ONLY
        select WAIT_BEFORE_CPUS_INIT
@@ -22,18 +21,6 @@ config MAINBOARD_DIR
        string
        default iwill/dk8x
 
-config DCACHE_RAM_BASE
-       hex
-       default 0xc8000
-
-config DCACHE_RAM_SIZE
-       hex
-       default 0x08000
-
-config DCACHE_RAM_GLOBAL_VAR_SIZE
-       hex
-       default 0x01000
-
 config APIC_ID_OFFSET
        hex
        default 0x0
index e0a773f18108a17c4d5eb71cda32e21f80cbed1f..3d7aadea69262eec9909dfb4dde4da41c8c8d41f 100644 (file)
@@ -12,7 +12,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select HAVE_OPTION_TABLE
        select HAVE_PIRQ_TABLE
        select HAVE_MP_TABLE
-       select CACHE_AS_RAM
        select HAVE_HARD_RESET
        select BOARD_ROMSIZE_KB_512
        select SB_HT_CHAIN_UNITID_OFFSET_ONLY
index ac548e5faea1abd3e18460fa8ad68ace0bd52052..ac07513fdecc4196f8d2b8652bd3585ad35b0955 100644 (file)
@@ -12,7 +12,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select HAVE_BUS_CONFIG
        select HAVE_PIRQ_TABLE
        select HAVE_MP_TABLE
-       select CACHE_AS_RAM
        select HAVE_HARD_RESET
        select BOARD_ROMSIZE_KB_1024
 
index 00b4257917223d78bac06123beeca2b70ed7c0b4..c9c59b15867fede8f286926140f9a7635c3860ca 100644 (file)
@@ -12,7 +12,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select HAVE_OPTION_TABLE
        select HAVE_PIRQ_TABLE
        select HAVE_MP_TABLE
-       select CACHE_AS_RAM
        select HAVE_HARD_RESET
        select BOARD_ROMSIZE_KB_512
        select SB_HT_CHAIN_UNITID_OFFSET_ONLY
index 88d2e04eb46bb448dc1fcbba7b3c87e0d57a750c..f19448f336c223c37afb4c05f63f3350d527e519 100644 (file)
@@ -12,7 +12,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select HAVE_OPTION_TABLE
        select HAVE_PIRQ_TABLE
        select HAVE_MP_TABLE
-       select CACHE_AS_RAM
        select HAVE_HARD_RESET
        select BOARD_ROMSIZE_KB_512
        select SB_HT_CHAIN_UNITID_OFFSET_ONLY