For the a number of the socket 940 based machines, I collapsed their CAR
configurations into the socket config.
However, I have kept a number of overrides in place for the following
machines:
* broadcom/blast
* ibm/e32{5,6}
* newisys/khepri
* sunw/ultra40
* tyan/s488{0,2}
These machines used different setting than the defaults for socket 940
systems.
Signed-off-by: Warren Turkal <wt@penguintechs.org>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5883
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
config CPU_AMD_MODEL_FXX
bool
- select CACHE_AS_RAM
select MMX
select SSE
select SSE2
-config CPU_ADDR_BITS
- int
- default 40
- depends on CPU_AMD_MODEL_FXX
-
-config DCACHE_RAM_BASE
- hex
- default 0xc8000
- depends on CPU_AMD_MODEL_FXX
-
-config DCACHE_RAM_SIZE
- hex
- default 0x08000
- depends on CPU_AMD_MODEL_FXX
-
-config DCACHE_RAM_GLOBAL_VAR_SIZE
- hex
- default 0x01000
- depends on CPU_AMD_MODEL_FXX
-
-
config UDELAY_IO
bool
default n
config CPU_AMD_SOCKET_940
bool
+
+if CPU_AMD_SOCKET_940
+
+config SOCKET_SPECIFIC_OPTIONS
+ def_bool y
select K8_HT_FREQ_1G_SUPPORT
select CPU_AMD_MODEL_FXX
+ select CACHE_AS_RAM
config CPU_SOCKET_TYPE
hex
default 0x0
- depends on CPU_AMD_SOCKET_940
config DIMM_SUPPORT
hex
default 0x108
- depends on CPU_AMD_SOCKET_940
+
+config CPU_ADDR_BITS
+ int
+ default 40
+
+config DCACHE_RAM_BASE
+ hex
+ default 0xc8000
+
+config DCACHE_RAM_SIZE
+ hex
+ default 0x08000
+
+config DCACHE_RAM_GLOBAL_VAR_SIZE
+ hex
+ default 0x01000
+
+endif # CPU_AMD_SOCKET_940
select HAVE_PIRQ_TABLE
select HAVE_OPTION_TABLE
select HAVE_MP_TABLE
- select CACHE_AS_RAM
select HAVE_HARD_RESET
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select BOARD_ROMSIZE_KB_512
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select CACHE_AS_RAM
select HAVE_HARD_RESET
select BOARD_ROMSIZE_KB_512
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select CACHE_AS_RAM
select HAVE_HARD_RESET
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select WAIT_BEFORE_CPUS_INIT
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select CACHE_AS_RAM
select HAVE_HARD_RESET
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select WAIT_BEFORE_CPUS_INIT
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select CACHE_AS_RAM
select HAVE_HARD_RESET
select LIFT_BSP_APIC_ID
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
string
default iwill/dk8_htx
-config DCACHE_RAM_BASE
- hex
- default 0xc8000
-
-config DCACHE_RAM_SIZE
- hex
- default 0x08000
-
-config DCACHE_RAM_GLOBAL_VAR_SIZE
- hex
- default 0x01000
-
config APIC_ID_OFFSET
hex
default 0x10
select HAVE_PIRQ_TABLE
select HAVE_OPTION_TABLE
select HAVE_MP_TABLE
- select CACHE_AS_RAM
select HAVE_HARD_RESET
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select WAIT_BEFORE_CPUS_INIT
string
default iwill/dk8s2
-config DCACHE_RAM_BASE
- hex
- default 0xc8000
-
-config DCACHE_RAM_SIZE
- hex
- default 0x08000
-
-config DCACHE_RAM_GLOBAL_VAR_SIZE
- hex
- default 0x01000
-
config APIC_ID_OFFSET
hex
default 0x0
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select CACHE_AS_RAM
select HAVE_HARD_RESET
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select WAIT_BEFORE_CPUS_INIT
string
default iwill/dk8x
-config DCACHE_RAM_BASE
- hex
- default 0xc8000
-
-config DCACHE_RAM_SIZE
- hex
- default 0x08000
-
-config DCACHE_RAM_GLOBAL_VAR_SIZE
- hex
- default 0x01000
-
config APIC_ID_OFFSET
hex
default 0x0
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select CACHE_AS_RAM
select HAVE_HARD_RESET
select BOARD_ROMSIZE_KB_512
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select HAVE_BUS_CONFIG
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select CACHE_AS_RAM
select HAVE_HARD_RESET
select BOARD_ROMSIZE_KB_1024
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select CACHE_AS_RAM
select HAVE_HARD_RESET
select BOARD_ROMSIZE_KB_512
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
- select CACHE_AS_RAM
select HAVE_HARD_RESET
select BOARD_ROMSIZE_KB_512
select SB_HT_CHAIN_UNITID_OFFSET_ONLY