amd64_mov_reg_imm_size (code, ins->dreg, 0, 8);
break;
case OP_MOVE:
- amd64_mov_reg_reg (code, ins->dreg, ins->sreg1, sizeof(mgreg_t));
+ if (ins->dreg != ins->sreg1)
+ amd64_mov_reg_reg (code, ins->dreg, ins->sreg1, sizeof(mgreg_t));
break;
case OP_AMD64_SET_XMMREG_R4: {
amd64_sse_cvtsd2ss_reg_reg (code, ins->dreg, ins->sreg1);
break;
}
case OP_FMOVE:
- if (IS_VFP)
+ if (IS_VFP && ins->dreg != ins->sreg1)
ARM_CPYD (code, ins->dreg, ins->sreg1);
break;
case OP_FCONV_TO_R4:
CASE_PPC32 (OP_ICONV_TO_I4)
CASE_PPC32 (OP_ICONV_TO_U4)
case OP_MOVE:
- ppc_mr (code, ins->dreg, ins->sreg1);
+ if (ins->dreg != ins->sreg1)
+ ppc_mr (code, ins->dreg, ins->sreg1);
break;
case OP_SETLRET: {
int saved = ins->sreg1;
break;
}
case OP_FMOVE:
- ppc_fmr (code, ins->dreg, ins->sreg1);
+ if (ins->dreg != ins->sreg1)
+ ppc_fmr (code, ins->dreg, ins->sreg1);
break;
case OP_FCONV_TO_R4:
ppc_frsp (code, ins->dreg, ins->sreg1);
x86_push_membase (code, ins->inst_basereg, 0xf0f0f0f0);
break;
case OP_MOVE:
- x86_mov_reg_reg (code, ins->dreg, ins->sreg1, 4);
+ if (ins->dreg != ins->sreg1)
+ x86_mov_reg_reg (code, ins->dreg, ins->sreg1, 4);
break;
case OP_TAILCALL: {
MonoCallInst *call = (MonoCallInst*)ins;