[jit]Add amd64 support for the new compare instructions.

diff --git a/mono/mini/cpu-amd64.md b/mono/mini/cpu-amd64.md
index 2422d73c139df21c962a75101751fc70da827f22..ca1d23bc1934964ed8835b47e73e28090929ba72 100644 (file)
--- a/mono/mini/cpu-amd64.md
+++ b/mono/mini/cpu-amd64.md
@@ -246,6 +246,9 @@ float_cgt: dest:i src1:f src2:f len:35
 float_cgt_un: dest:i src1:f src2:f len:48
 float_clt: dest:i src1:f src2:f len:35
 float_clt_un: dest:i src1:f src2:f len:42
+float_cneq: dest:i src1:f src2:f len:42
+float_cge: dest:i src1:f src2:f len:35
+float_cle: dest:i src1:f src2:f len:35
 float_ceq_membase: dest:i src1:f src2:b len:35
 float_cgt_membase: dest:i src1:f src2:b len:35
 float_cgt_un_membase: dest:i src1:f src2:b len:48
@@ -370,6 +373,13 @@ int_cgt: dest:c len:8
 int_cgt_un: dest:c len:8
 int_clt: dest:c len:8
 int_clt_un: dest:c len:8
+
+int_cneq: dest:c len:8
+int_cge: dest:c len:8
+int_cle: dest:c len:8
+int_cge_un: dest:c len:8
+int_cle_un: dest:c len:8
+
 int_beq: len:8
 int_bne_un: len:8
 int_blt: len:8

diff --git a/mono/mini/mini-amd64.c b/mono/mini/mini-amd64.c
index a82c21bb1b985ec50d01190291f9fe62615bf028..c2f85218859ef393b62ac229014cb83e4e73a5b2 100644 (file)
--- a/mono/mini/mini-amd64.c
+++ b/mono/mini/mini-amd64.c
@@ -5146,6 +5146,12 @@ mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
                case OP_BR_REG:
                        amd64_jump_reg (code, ins->sreg1);
                        break;
+               case OP_ICNEQ:
+               case OP_ICGE:
+               case OP_ICLE:
+               case OP_ICGE_UN:
+               case OP_ICLE_UN:
+
                case OP_CEQ:
                case OP_LCEQ:
                case OP_ICEQ:
@@ -5414,6 +5420,7 @@ mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
                         */
                        amd64_sse_comisd_reg_reg (code, ins->sreg2, ins->sreg1);
                        break;
+               case OP_FCNEQ:
                case OP_FCEQ: {
                        /* zeroing the register at the start results in 
                         * shorter and faster code (we can also remove the widening op)
@@ -5423,8 +5430,19 @@ mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
                        amd64_sse_comisd_reg_reg (code, ins->sreg1, ins->sreg2);
                        unordered_check = code;
                        x86_branch8 (code, X86_CC_P, 0, FALSE);
-                       amd64_set_reg (code, X86_CC_EQ, ins->dreg, FALSE);
-                       amd64_patch (unordered_check, code);
+
+                       if (ins->opcode == OP_FCEQ) {
+                               amd64_set_reg (code, X86_CC_EQ, ins->dreg, FALSE);
+                               amd64_patch (unordered_check, code);
+                       } else {
+                               guchar *jump_to_end;
+                               amd64_set_reg (code, X86_CC_NE, ins->dreg, FALSE);
+                               jump_to_end = code;
+                               x86_jump8 (code, 0);
+                               amd64_patch (unordered_check, code);
+                               amd64_inc_reg (code, ins->dreg);
+                               amd64_patch (jump_to_end, code);
+                       }
                        break;
                }
                case OP_FCLT:
@@ -5448,6 +5466,16 @@ mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
                                amd64_set_reg (code, X86_CC_GT, ins->dreg, FALSE);
                        }
                        break;
+               case OP_FCLE: {
+                       guchar *unordered_check;
+                       amd64_alu_reg_reg (code, X86_XOR, ins->dreg, ins->dreg);
+                       amd64_sse_comisd_reg_reg (code, ins->sreg2, ins->sreg1);
+                       unordered_check = code;
+                       x86_branch8 (code, X86_CC_P, 0, FALSE);
+                       amd64_set_reg (code, X86_CC_NB, ins->dreg, FALSE);
+                       amd64_patch (unordered_check, code);
+                       break;
+               }
                case OP_FCGT:
                case OP_FCGT_UN: {
                        /* zeroing the register at the start results in 
@@ -5466,6 +5494,17 @@ mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
                        }
                        break;
                }
+               case OP_FCGE: {
+                       guchar *unordered_check;
+                       amd64_alu_reg_reg (code, X86_XOR, ins->dreg, ins->dreg);
+                       amd64_sse_comisd_reg_reg (code, ins->sreg2, ins->sreg1);
+                       unordered_check = code;
+                       x86_branch8 (code, X86_CC_P, 0, FALSE);
+                       amd64_set_reg (code, X86_CC_NA, ins->dreg, FALSE);
+                       amd64_patch (unordered_check, code);
+                       break;
+               }
+               
                case OP_FCLT_MEMBASE:
                case OP_FCGT_MEMBASE:
                case OP_FCLT_UN_MEMBASE: