#include "vm/types.h"
#include "vm/jit/i386/codegen.h"
+#include "vm/jit/i386/md.h"
#include "threads/threads-common.h"
+#include "vm/builtin.h"
#include "vm/exceptions.h"
#include "vm/global.h"
#include "vm/signallocal.h"
intptr_t val;
int type;
void *p;
+ java_object_t *o;
_uc = (ucontext_t *) _p;
_mc = _uc->uc_mcontext;
((d == 4) ? _ss->esp :
((d == 5) ? _ss->ebp :
((d == 6) ? _ss->esi : _ss->edi))))));
+
+ if (type == EXCEPTION_HARDWARE_COMPILER) {
+ /* The PV from the compiler stub is equal to the XPC. */
+
+ pv = xpc;
+
+ /* We use a framesize of zero here because the call pushed
+ the return addres onto the stack. */
+
+ ra = md_stacktrace_get_returnaddress(sp, 0);
+
+ /* Skip the RA on the stack. */
+
+ sp = sp + 1 * SIZEOF_VOID_P;
+
+ /* The XPC is the RA minus 2, because the RA points to the
+ instruction after the call. */
+
+ xpc = ra - 2;
+ }
}
else {
/* this was a normal NPE */
p = signal_handle(type, val, pv, sp, ra, xpc, _p);
- /* set registers */
-
- _ss->eax = (intptr_t) p;
- _ss->ecx = (intptr_t) xpc;
- _ss->eip = (intptr_t) asm_handle_exception;
+ /* Set registers. */
+
+ if (type == EXCEPTION_HARDWARE_COMPILER) {
+ if (p == NULL) {
+ o = builtin_retrieve_exception();
+
+ _ss->esp = (uintptr_t) sp; /* Remove RA from stack. */
+
+ _ss->eax = (uintptr_t) o;
+ _ss->ecx = (uintptr_t) xpc; /* REG_ITMP2_XPC */
+ _ss->eip = (uintptr_t) asm_handle_exception;
+ }
+ else {
+ _ss->eip = (uintptr_t) p;
+ }
+ }
+ else {
+ _ss->eax = (intptr_t) p;
+ _ss->ecx = (intptr_t) xpc;
+ _ss->eip = (intptr_t) asm_handle_exception;
+ }
}
}
+/* md_signal_handler_sigill ****************************************************
+
+ Signal handler for hardware patcher traps (ud2).
+
+*******************************************************************************/
+
+void md_signal_handler_sigill(int sig, siginfo_t *siginfo, void *_p)
+{
+ ucontext_t *_uc;
+ mcontext_t _mc;
+ u1 *pv;
+ i386_thread_state_t *_ss;
+ u1 *sp;
+ u1 *ra;
+ u1 *xpc;
+ int type;
+ intptr_t val;
+ void *p;
+
+
+ _uc = (ucontext_t *) _p;
+ _mc = _uc->uc_mcontext;
+ _ss = &_mc->ss;
+
+ pv = NULL; /* is resolved during stackframeinfo creation */
+ sp = (u1 *) _ss->esp;
+ xpc = (u1 *) _ss->eip;
+ ra = xpc; /* return address is equal to xpc */
+
+ /* this is an ArithmeticException */
+
+ type = EXCEPTION_HARDWARE_PATCHER;
+ val = 0;
+
+ /* generate appropriate exception */
+
+ p = signal_handle(type, val, pv, sp, ra, xpc, _p);
+
+ /* set registers (only if exception object ready) */
+
+ if (p != NULL) {
+ _ss->eax = (intptr_t) p;
+ _ss->ecx = (intptr_t) xpc;
+ _ss->eip = (intptr_t) asm_handle_exception;
+ }
+}
+
+/* md_replace_executionstate_read **********************************************
+
+ Read the given context into an executionstate for Replacement.
+
+*******************************************************************************/
+
+#if defined(ENABLE_REPLACEMENT)
+void md_replace_executionstate_read(executionstate_t *es, void *context)
+{
+ ucontext_t *_uc;
+ mcontext_t *_mc;
+ i386_thread_state_t *_ss;
+ s4 i;
+
+ _uc = (ucontext_t *) context;
+ _mc = &_uc->uc_mcontext;
+ _ss = &_mc->ss;
+
+ /* read special registers */
+ es->pc = (u1 *) _ss->eip;
+ es->sp = (u1 *) _ss->esp;
+ es->pv = NULL; /* pv must be looked up via AVL tree */
+
+ /* read integer registers */
+ for (i = 0; i < INT_REG_CNT; i++)
+ es->intregs[i] = (i == 0) ? _ss->eax :
+ ((i == 1) ? _ss->ecx :
+ ((i == 2) ? _ss->edx :
+ ((i == 3) ? _ss->ebx :
+ ((i == 4) ? _ss->esp :
+ ((i == 5) ? _ss->ebp :
+ ((i == 6) ? _ss->esi : _ss->edi))))));
+
+ /* read float registers */
+ for (i = 0; i < FLT_REG_CNT; i++)
+ es->fltregs[i] = 0xdeadbeefdeadbeefULL;
+}
+#endif
+
+
+/* md_replace_executionstate_write *********************************************
+
+ Write the given executionstate back to the context for Replacement.
+
+*******************************************************************************/
+
+#if defined(ENABLE_REPLACEMENT)
+void md_replace_executionstate_write(executionstate_t *es, void *context)
+{
+ ucontext_t *_uc;
+ mcontext_t *_mc;
+ i386_thread_state_t *_ss;
+ s4 i;
+
+ _uc = (ucontext_t *) context;
+ _mc = &_uc->uc_mcontext;
+ _ss = &_mc->ss;
+
+ /* write integer registers */
+ for (i = 0; i < INT_REG_CNT; i++)
+ *((i == 0) ? &_ss->eax :
+ ((i == 1) ? &_ss->ecx :
+ ((i == 2) ? &_ss->edx :
+ ((i == 3) ? &_ss->ebx :
+ ((i == 4) ? &_ss->esp :
+ ((i == 5) ? &_ss->ebp :
+ ((i == 6) ? &_ss->esi : &_ss->edi))))))) = es->intregs[i];
+
+ /* write special registers */
+ _ss->eip = (ptrint) es->pc;
+ _ss->esp = (ptrint) es->sp;
+}
+#endif
+
+
/* md_critical_section_restart *************************************************
Search the critical sections tree for a matching section and set