device_t bus_dev;
unsigned index;
uint16_t reg_old, reg;
+ uint8_t byte;
/* See if we are on the behind the amd8111 pci bridge */
bus_dev = dev->bus->dev;
return;
}
}
+
+ if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
+ (dev->device == PCI_DEVICE_ID_AMD_8111_USB2)) {
+ if(!dev->enabled) {
+ byte = pci_read_config8(lpc_dev, 0x47);
+ byte |= (1<<7);
+ pci_write_config8(lpc_dev, 0x47, byte);
+ return;
+ }
+
+ }
+
reg = reg_old = pci_read_config16(lpc_dev, 0x48);
reg &= ~(1 << index);
if (dev->enabled) {
if (reg != reg_old) {
pci_write_config16(lpc_dev, 0x48, reg);
}
+
}
struct chip_control southbridge_amd_amd8111_control = {
/* Enable ide devices so the linux ide driver will work */
uint16_t word;
+ uint8_t byte;
int enable_a=1, enable_b=1;
word = pci_read_config16(dev, 0x40);
pci_write_config16(dev, 0x40, word);
- word = 0x0f;
- pci_write_config16(dev, 0x42, word);
- /* The AMD768 has a bug where the BM DMA address must be
- * 256 byte aligned while it is only 16 bytes long.
- * Hard code this to a valid address below 0x1000
- * where automatic port address assignment starts.
- * FIXME: I assume the 8111 does the same thing. We should
- * clarify. stepan@suse.de
- */
- pci_write_config32(dev, 0x20, 0xf01);
+ byte = 0x20 ; // Latency: 64-->32
+ pci_write_config8(dev, 0xd, byte);
- pci_write_config32(dev, 0x48, 0x205e5e5e);
- word = 0x06a;
- pci_write_config16(dev, 0x4c, word);
+ word = 0x0f;
+ pci_write_config16(dev, 0x42, word);
}
static struct device_operations ide_ops = {