Authors: Andreas Krall
Reinhard Grafl
- $Id: jit.c 631 2003-11-14 09:21:47Z stefan $
+ $Id: jit.c 638 2003-11-14 23:51:34Z stefan $
*/
{ ICMD_L2D, TYPE_LONG, TYPE_VOID, TYPE_DOUBLE, ICMD_BUILTIN1,
(functionptr) builtin_l2d, SUPPORT_LONG && SUPPORT_DOUBLE && SUPPORT_LONG_FCVT, true },
{ ICMD_F2L, TYPE_FLOAT, TYPE_VOID, TYPE_LONG, ICMD_BUILTIN1,
- (functionptr) builtin_f2l, SUPPORT_FLOAT && SUPPORT_LONG && SUPPORT_LONG_FCVT, true },
+ (functionptr) builtin_f2l, SUPPORT_FLOAT && SUPPORT_LONG && SUPPORT_LONG_ICVT, true },
{ ICMD_D2L, TYPE_DOUBLE, TYPE_VOID, TYPE_LONG, ICMD_BUILTIN1,
- (functionptr) builtin_d2l, SUPPORT_DOUBLE && SUPPORT_LONG && SUPPORT_LONG_FCVT, true },
+ (functionptr) builtin_d2l, SUPPORT_DOUBLE && SUPPORT_LONG && SUPPORT_LONG_ICVT, true },
{ ICMD_F2I, TYPE_FLOAT, TYPE_VOID, TYPE_INT, ICMD_BUILTIN1,
(functionptr) builtin_f2i, SUPPORT_FLOAT && SUPPORT_FICVT, true },
{ ICMD_D2I, TYPE_DOUBLE, TYPE_VOID, TYPE_INT, ICMD_BUILTIN1,
len = sizeof(builtintable) / sizeof(stdopdescriptor);
qsort(builtintable, len, sizeof(stdopdescriptor), stdopcompare);
+
+#if 0
+ {
+ int i;
+ for (i=0; i<len; i++)
+ if (!builtintable[i].supported)
+ printf("%s\n", icmd_names[builtintable[i].opcode]);
+ }
+#endif
}
This module generates MIPS machine code for a sequence of
intermediate code commands (ICMDs).
- $Id: codegen.c 636 2003-11-14 20:19:21Z stefan $
+ $Id: codegen.c 638 2003-11-14 23:51:34Z stefan $
*/
var_to_reg_flt(s1, src->prev, REG_FTMP1);
var_to_reg_flt(s2, src, REG_FTMP2);
d = reg_of_var(iptr->dst, REG_ITMP3);
- M_FCMPUEQF(s1, s2);
- M_NOP; /* compare delay */
- M_FBF(2); /* jump over next instructions */
- M_LSUB_IMM(REG_ZERO, 1, d); /* delay slot */
- M_CLR(d);
- M_FCMPULTF(s2, s1);
- M_NOP; /* compare delay */
- M_FBF(2); /* jump over next instruction */
- M_NOP;
+ M_FCMPULEF(s1, s2);
+ M_FBT(3);
M_LADD_IMM(REG_ZERO, 1, d);
+ M_BR(4);
+ M_NOP;
+ M_FCMPEQF(s1, s2);
+ M_LSUB_IMM(REG_ZERO, 1, d);
+ M_CMOVT(REG_ZERO, d);
store_reg_to_var_int(iptr->dst, d);
break;
-
+
case ICMD_DCMPL: /* ..., val1, val2 ==> ..., val1 fcmpl val2 */
var_to_reg_flt(s1, src->prev, REG_FTMP1);
var_to_reg_flt(s2, src, REG_FTMP2);
d = reg_of_var(iptr->dst, REG_ITMP3);
- M_FCMPUEQD(s1, s2);
- M_NOP; /* compare delay */
- M_FBF(2); /* jump over next instructions */
- M_LSUB_IMM(REG_ZERO, 1, d); /* delay slot */
- M_CLR(d);
- M_FCMPULTD(s2, s1);
- M_NOP; /* compare delay */
- M_FBF(2); /* jump over next instruction */
- M_NOP;
+ M_FCMPULED(s1, s2);
+ M_FBT(3);
M_LADD_IMM(REG_ZERO, 1, d);
+ M_BR(4);
+ M_NOP;
+ M_FCMPEQD(s1, s2);
+ M_LSUB_IMM(REG_ZERO, 1, d);
+ M_CMOVT(REG_ZERO, d);
store_reg_to_var_int(iptr->dst, d);
break;
var_to_reg_flt(s1, src->prev, REG_FTMP1);
var_to_reg_flt(s2, src, REG_FTMP2);
d = reg_of_var(iptr->dst, REG_ITMP3);
- M_FCMPUEQF(s1, s2);
- M_NOP; /* compare delay */
- M_FBF(2); /* jump over next instruction */
- M_LADD_IMM(REG_ZERO, 1, d); /* delay slot */
- M_CLR(d);
- M_FCMPULTF(s1, s2);
- M_NOP; /* compare delay */
- M_FBF(2); /* jump over next instruction */
- M_NOP;
+ M_FCMPOLTF(s1, s2);
+ M_FBF(3);
M_LSUB_IMM(REG_ZERO, 1, d);
+ M_BR(4);
+ M_NOP;
+ M_FCMPEQF(s1, s2);
+ M_LADD_IMM(REG_ZERO, 1, d);
+ M_CMOVT(REG_ZERO, d);
store_reg_to_var_int(iptr->dst, d);
break;
var_to_reg_flt(s1, src->prev, REG_FTMP1);
var_to_reg_flt(s2, src, REG_FTMP2);
d = reg_of_var(iptr->dst, REG_ITMP3);
- M_FCMPUEQD(s1, s2);
- M_NOP; /* compare delay */
- M_FBF(2); /* jump over next instruction */
- M_LADD_IMM(REG_ZERO, 1, d); /* delay slot */
- M_CLR(d);
- M_FCMPULTD(s1, s2);
- M_NOP; /* compare delay */
- M_FBF(2); /* jump over next instruction */
- M_NOP;
+ M_FCMPOLTD(s1, s2);
+ M_FBF(3);
M_LSUB_IMM(REG_ZERO, 1, d);
+ M_BR(4);
+ M_NOP;
+ M_FCMPEQD(s1, s2);
+ M_LADD_IMM(REG_ZERO, 1, d);
+ M_CMOVT(REG_ZERO, d);
store_reg_to_var_int(iptr->dst, d);
break;
Authors: Andreas Krall
- $Id: codegen.h 597 2003-11-09 20:08:18Z twisti $
+ $Id: codegen.h 638 2003-11-14 23:51:34Z stefan $
*/
#define M_FCMPOLEF(a,b) M_FP3(0x36,FMT_F,a,b,0) /* c = a <= b */
#define M_FCMPOLED(a,b) M_FP3(0x36,FMT_D,a,b,0) /* c = a <= b */
#define M_FCMPULEF(a,b) M_FP3(0x37,FMT_F,a,b,0) /* c = a <= b */
-#define M_FCMPULE(a,b) M_FP3(0x37,FMT_D,a,b,0) /* c = a <= b */
+#define M_FCMPULED(a,b) M_FP3(0x37,FMT_D,a,b,0) /* c = a <= b */
#define M_FBF(disp) M_ITYPE(0x11,8,0,disp) /* br false */
#define M_FBT(disp) M_ITYPE(0x11,8,1,disp) /* br true */
#define M_FBFL(disp) M_ITYPE(0x11,8,2,disp) /* br false */
#define M_FBTL(disp) M_ITYPE(0x11,8,3,disp) /* br true */
+#define M_CMOVF(a,b) M_RTYPE(0x00,a,0,b,0,1)
+#define M_CMOVT(a,b) M_RTYPE(0x00,a,1,b,0,1)
+
/*
* Load Address pseudo instruction:
* -n32 addressing mode -> 32 bit addrs, -64 addressing mode -> 64 bit addrs
Changes: Christan Thalinger
- $Id: types.h 624 2003-11-13 14:06:52Z twisti $
+ $Id: types.h 638 2003-11-14 23:51:34Z stefan $
*/
#define SUPPORT_LONG 1
#define SUPPORT_FLOAT 1
#define SUPPORT_DOUBLE 1
+#define SUPPORT_FMOD 1
+#define SUPPORT_FICVT 0
+#define SUPPORT_IFCVT 1
#define SUPPORT_LONG_ADD 1
#define SUPPORT_LONG_CMP 1
#define SUPPORT_LONG_SHIFT 1
#define SUPPORT_LONG_MUL 1
#define SUPPORT_LONG_DIV 0
-#define SUPPORT_LONG_ICVT 1
+#define SUPPORT_LONG_ICVT 0
#define SUPPORT_LONG_FCVT 1
+#define USEBUILTINTABLE
+
#define U8_AVAILABLE 1
Authors: Andreas Krall
Reinhard Grafl
- $Id: jit.c 631 2003-11-14 09:21:47Z stefan $
+ $Id: jit.c 638 2003-11-14 23:51:34Z stefan $
*/
{ ICMD_L2D, TYPE_LONG, TYPE_VOID, TYPE_DOUBLE, ICMD_BUILTIN1,
(functionptr) builtin_l2d, SUPPORT_LONG && SUPPORT_DOUBLE && SUPPORT_LONG_FCVT, true },
{ ICMD_F2L, TYPE_FLOAT, TYPE_VOID, TYPE_LONG, ICMD_BUILTIN1,
- (functionptr) builtin_f2l, SUPPORT_FLOAT && SUPPORT_LONG && SUPPORT_LONG_FCVT, true },
+ (functionptr) builtin_f2l, SUPPORT_FLOAT && SUPPORT_LONG && SUPPORT_LONG_ICVT, true },
{ ICMD_D2L, TYPE_DOUBLE, TYPE_VOID, TYPE_LONG, ICMD_BUILTIN1,
- (functionptr) builtin_d2l, SUPPORT_DOUBLE && SUPPORT_LONG && SUPPORT_LONG_FCVT, true },
+ (functionptr) builtin_d2l, SUPPORT_DOUBLE && SUPPORT_LONG && SUPPORT_LONG_ICVT, true },
{ ICMD_F2I, TYPE_FLOAT, TYPE_VOID, TYPE_INT, ICMD_BUILTIN1,
(functionptr) builtin_f2i, SUPPORT_FLOAT && SUPPORT_FICVT, true },
{ ICMD_D2I, TYPE_DOUBLE, TYPE_VOID, TYPE_INT, ICMD_BUILTIN1,
len = sizeof(builtintable) / sizeof(stdopdescriptor);
qsort(builtintable, len, sizeof(stdopdescriptor), stdopcompare);
+
+#if 0
+ {
+ int i;
+ for (i=0; i<len; i++)
+ if (!builtintable[i].supported)
+ printf("%s\n", icmd_names[builtintable[i].opcode]);
+ }
+#endif
}
This module generates MIPS machine code for a sequence of
intermediate code commands (ICMDs).
- $Id: codegen.c 636 2003-11-14 20:19:21Z stefan $
+ $Id: codegen.c 638 2003-11-14 23:51:34Z stefan $
*/
var_to_reg_flt(s1, src->prev, REG_FTMP1);
var_to_reg_flt(s2, src, REG_FTMP2);
d = reg_of_var(iptr->dst, REG_ITMP3);
- M_FCMPUEQF(s1, s2);
- M_NOP; /* compare delay */
- M_FBF(2); /* jump over next instructions */
- M_LSUB_IMM(REG_ZERO, 1, d); /* delay slot */
- M_CLR(d);
- M_FCMPULTF(s2, s1);
- M_NOP; /* compare delay */
- M_FBF(2); /* jump over next instruction */
- M_NOP;
+ M_FCMPULEF(s1, s2);
+ M_FBT(3);
M_LADD_IMM(REG_ZERO, 1, d);
+ M_BR(4);
+ M_NOP;
+ M_FCMPEQF(s1, s2);
+ M_LSUB_IMM(REG_ZERO, 1, d);
+ M_CMOVT(REG_ZERO, d);
store_reg_to_var_int(iptr->dst, d);
break;
-
+
case ICMD_DCMPL: /* ..., val1, val2 ==> ..., val1 fcmpl val2 */
var_to_reg_flt(s1, src->prev, REG_FTMP1);
var_to_reg_flt(s2, src, REG_FTMP2);
d = reg_of_var(iptr->dst, REG_ITMP3);
- M_FCMPUEQD(s1, s2);
- M_NOP; /* compare delay */
- M_FBF(2); /* jump over next instructions */
- M_LSUB_IMM(REG_ZERO, 1, d); /* delay slot */
- M_CLR(d);
- M_FCMPULTD(s2, s1);
- M_NOP; /* compare delay */
- M_FBF(2); /* jump over next instruction */
- M_NOP;
+ M_FCMPULED(s1, s2);
+ M_FBT(3);
M_LADD_IMM(REG_ZERO, 1, d);
+ M_BR(4);
+ M_NOP;
+ M_FCMPEQD(s1, s2);
+ M_LSUB_IMM(REG_ZERO, 1, d);
+ M_CMOVT(REG_ZERO, d);
store_reg_to_var_int(iptr->dst, d);
break;
var_to_reg_flt(s1, src->prev, REG_FTMP1);
var_to_reg_flt(s2, src, REG_FTMP2);
d = reg_of_var(iptr->dst, REG_ITMP3);
- M_FCMPUEQF(s1, s2);
- M_NOP; /* compare delay */
- M_FBF(2); /* jump over next instruction */
- M_LADD_IMM(REG_ZERO, 1, d); /* delay slot */
- M_CLR(d);
- M_FCMPULTF(s1, s2);
- M_NOP; /* compare delay */
- M_FBF(2); /* jump over next instruction */
- M_NOP;
+ M_FCMPOLTF(s1, s2);
+ M_FBF(3);
M_LSUB_IMM(REG_ZERO, 1, d);
+ M_BR(4);
+ M_NOP;
+ M_FCMPEQF(s1, s2);
+ M_LADD_IMM(REG_ZERO, 1, d);
+ M_CMOVT(REG_ZERO, d);
store_reg_to_var_int(iptr->dst, d);
break;
var_to_reg_flt(s1, src->prev, REG_FTMP1);
var_to_reg_flt(s2, src, REG_FTMP2);
d = reg_of_var(iptr->dst, REG_ITMP3);
- M_FCMPUEQD(s1, s2);
- M_NOP; /* compare delay */
- M_FBF(2); /* jump over next instruction */
- M_LADD_IMM(REG_ZERO, 1, d); /* delay slot */
- M_CLR(d);
- M_FCMPULTD(s1, s2);
- M_NOP; /* compare delay */
- M_FBF(2); /* jump over next instruction */
- M_NOP;
+ M_FCMPOLTD(s1, s2);
+ M_FBF(3);
M_LSUB_IMM(REG_ZERO, 1, d);
+ M_BR(4);
+ M_NOP;
+ M_FCMPEQD(s1, s2);
+ M_LADD_IMM(REG_ZERO, 1, d);
+ M_CMOVT(REG_ZERO, d);
store_reg_to_var_int(iptr->dst, d);
break;
Authors: Andreas Krall
- $Id: codegen.h 597 2003-11-09 20:08:18Z twisti $
+ $Id: codegen.h 638 2003-11-14 23:51:34Z stefan $
*/
#define M_FCMPOLEF(a,b) M_FP3(0x36,FMT_F,a,b,0) /* c = a <= b */
#define M_FCMPOLED(a,b) M_FP3(0x36,FMT_D,a,b,0) /* c = a <= b */
#define M_FCMPULEF(a,b) M_FP3(0x37,FMT_F,a,b,0) /* c = a <= b */
-#define M_FCMPULE(a,b) M_FP3(0x37,FMT_D,a,b,0) /* c = a <= b */
+#define M_FCMPULED(a,b) M_FP3(0x37,FMT_D,a,b,0) /* c = a <= b */
#define M_FBF(disp) M_ITYPE(0x11,8,0,disp) /* br false */
#define M_FBT(disp) M_ITYPE(0x11,8,1,disp) /* br true */
#define M_FBFL(disp) M_ITYPE(0x11,8,2,disp) /* br false */
#define M_FBTL(disp) M_ITYPE(0x11,8,3,disp) /* br true */
+#define M_CMOVF(a,b) M_RTYPE(0x00,a,0,b,0,1)
+#define M_CMOVT(a,b) M_RTYPE(0x00,a,1,b,0,1)
+
/*
* Load Address pseudo instruction:
* -n32 addressing mode -> 32 bit addrs, -64 addressing mode -> 64 bit addrs
Changes: Christan Thalinger
- $Id: types.h 624 2003-11-13 14:06:52Z twisti $
+ $Id: types.h 638 2003-11-14 23:51:34Z stefan $
*/
#define SUPPORT_LONG 1
#define SUPPORT_FLOAT 1
#define SUPPORT_DOUBLE 1
+#define SUPPORT_FMOD 1
+#define SUPPORT_FICVT 0
+#define SUPPORT_IFCVT 1
#define SUPPORT_LONG_ADD 1
#define SUPPORT_LONG_CMP 1
#define SUPPORT_LONG_SHIFT 1
#define SUPPORT_LONG_MUL 1
#define SUPPORT_LONG_DIV 0
-#define SUPPORT_LONG_ICVT 1
+#define SUPPORT_LONG_ICVT 0
#define SUPPORT_LONG_FCVT 1
+#define USEBUILTINTABLE
+
#define U8_AVAILABLE 1