This target is dead.

The company is dead.

It causes builds to fail, and that is not a problem we need to have.

Removing it to remove the problems it causes.

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3945 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/src/mainboard/agami/aruma/Config.lb b/src/mainboard/agami/aruma/Config.lb
deleted file mode 100644 (file)
index 667f6d2..0000000
--- a/src/mainboard/agami/aruma/Config.lb
+++ /dev/null
@@ -1,460 +0,0 @@
-##
-## Compute the location and size of where this firmware image
-## (coreboot plus bootloader) will live in the boot rom chip.
-##
-if USE_FALLBACK_IMAGE
-       default ROM_SECTION_SIZE   = FALLBACK_SIZE
-       default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
-else
-       default ROM_SECTION_SIZE   = ( ROM_SIZE - FALLBACK_SIZE )
-       default ROM_SECTION_OFFSET = 0
-end
-
-##
-## Compute the start location and size size of
-## The coreboot bootloader.
-##
-default PAYLOAD_SIZE            = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
-default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
-
-##
-## Compute where this copy of coreboot will start in the boot rom
-##
-default _ROMBASE      = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
-
-##
-## Compute a range of ROM that can cached to speed up coreboot,
-## execution speed.
-##
-## XIP_ROM_SIZE must be a power of 2.
-## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
-##
-default XIP_ROM_SIZE=65536
-default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
-
-arch i386 end 
-
-##
-## Build the objects we have code for in this directory.
-##
-
-driver mainboard.o
-if HAVE_MP_TABLE object mptable.o end
-if HAVE_PIRQ_TABLE object irq_tables.o end
-
-#needed by irq_tables and mptable and acpi_tables
-#object get_bus_conf.o
-
-if HAVE_ACPI_TABLES
-       object acpi_tables_static.o
-       object fadt.o
-
-       object dsdt.o
-
-#      makerule dsdt.c
-#              depends "$(MAINBOARD)/dx/dsdt_lb.dsl"
-#              action  "iasl -tc $(MAINBOARD)/dx/dsdt_lb.dsl"
-#              action  "mv dsdt_lb.hex dsdt.c"
-#      end
-#      object ./dsdt.o
-#
-#      makerule ssdt.c
-#              depends "$(MAINBOARD)/ssdt_lb_x.dsl"
-#              action  "iasl -tc $(MAINBOARD)/ssdt_lb_x.dsl"
-#              action  "perl -pi -e 's/AmlCode/AmlCode_ssdt/g' ssdt_lb_x.hex"
-#              action  "mv ssdt_lb_x.hex ssdt.c"
-#      end
-#      object ./ssdt.o
-#      
-#      if ACPI_SSDTX_NUM
-#              makerule ssdt2.c
-#                      depends "$(MAINBOARD)/dx/pci2.asl"
-#                      action  "iasl -tc $(MAINBOARD)/dx/pci2.asl"
-#                      action  "perl -pi -e 's/AmlCode/AmlCode_ssdt2/g' pci2.hex"
-#                      action  "mv pci2.hex ssdt2.c"
-#              end
-#              object ./ssdt2.o
-#              makerule ssdt3.c
-#                      depends "$(MAINBOARD)/dx/pci3.asl"
-#                      action  "iasl -tc $(MAINBOARD)/dx/pci3.asl"
-#                      action  "perl -pi -e 's/AmlCode/AmlCode_ssdt3/g' pci3.hex"
-#                      action  "mv pci3.hex ssdt3.c"
-#              end
-#              object ./ssdt3.o
-#              makerule ssdt4.c
-#                      depends "$(MAINBOARD)/dx/pci4.asl"
-#                      action  "iasl -tc $(MAINBOARD)/dx/pci4.asl"
-#                      action  "perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' pci4.hex"
-#                      action  "mv pci4.hex ssdt4.c"
-#              end
-#              object ./ssdt4.o
-#
-#      end
-end
-
-
-
-#object reset.o
-
-# FIXME: This should be solved generically.
-#object vgabios.o
-#driver atiragexl.o
-
-if USE_DCACHE_RAM
-
-       if CONFIG_USE_INIT
-               # compile cache_as_ram.c to auto.o
-               makerule ./cache_as_ram_auto.o
-                       depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h"
-                       action "$(CC) $(DISTRO_CFLAGS) -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/cache_as_ram_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -o cache_as_ram_auto.o" 
-               end
-
-       else   
-               #compile cache_as_ram.c to auto.inc 
-               makerule ./cache_as_ram_auto.inc
-                       depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h"
-                       action "$(CC) $(DISTRO_CFLAGS) -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/cache_as_ram_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall $(DEBUG_CFLAGS) -c -S -o $@"         
-                       action "perl -e 's/\.rodata/.rom.data/g' -pi $@"
-                       action "perl -e 's/\.text/.section .rom.text/g' -pi $@"
-               end
-
-       end
-else
-  
-       ##
-       ## Romcc output
-       ##
-       makerule ./failover.E
-               depends "$(MAINBOARD)/failover.c ../romcc"
-               action "../romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@"
-       end
-
-       makerule ./failover.inc
-               depends "$(MAINBOARD)/failover.c ../romcc"
-               action "../romcc    -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@"
-       end
-
-       makerule ./auto.E
-               depends "$(MAINBOARD)/auto.c option_table.h ../romcc"
-               action  "../romcc -E -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
-       end
-       makerule ./auto.inc
-               depends "$(MAINBOARD)/auto.c option_table.h ../romcc"
-               action  "../romcc    -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
-       end
-
-end
-##
-## Build our 16 bit and 32 bit coreboot entry code
-##
-
-mainboardinit cpu/x86/16bit/entry16.inc
-ldscript /cpu/x86/16bit/entry16.lds
-
-mainboardinit cpu/x86/32bit/entry32.inc
-if USE_DCACHE_RAM
-       if CONFIG_USE_INIT
-               ldscript /cpu/x86/32bit/entry32.lds
-       end
-
-       if CONFIG_USE_INIT
-               ldscript /cpu/amd/car/cache_as_ram.lds
-       end
-end
-
-##
-## Build our reset vector (This is where coreboot is entered)
-##
-if USE_FALLBACK_IMAGE 
-       mainboardinit cpu/x86/16bit/reset16.inc 
-       ldscript /cpu/x86/16bit/reset16.lds 
-else
-       mainboardinit cpu/x86/32bit/reset32.inc 
-       ldscript /cpu/x86/32bit/reset32.lds 
-end
-
-if USE_DCACHE_RAM
-else
-       ### Should this be in the northbridge code?
-       mainboardinit arch/i386/lib/cpu_reset.inc
-end
-
-##
-## Include an id string (For safe flashing)
-##
-mainboardinit arch/i386/lib/id.inc
-ldscript /arch/i386/lib/id.lds
-
-if USE_DCACHE_RAM
-       ##
-       ## Setup Cache-As-Ram
-       ##
-       mainboardinit cpu/amd/car/cache_as_ram.inc
-end
-
-###
-### This is the early phase of coreboot startup 
-### Things are delicate and we test to see if we should
-### failover to another image.
-###
-if USE_FALLBACK_IMAGE
-       if USE_DCACHE_RAM
-               ldscript /arch/i386/lib/failover.lds
-       else
-               ldscript /arch/i386/lib/failover.lds
-               mainboardinit ./failover.inc
-       end
-end
-
-###
-### O.k. We aren't just an intermediary anymore!
-###
-
-##
-## Setup RAM
-##
-if USE_DCACHE_RAM
-
-       if CONFIG_USE_INIT
-               initobject cache_as_ram_auto.o
-       else
-               mainboardinit ./cache_as_ram_auto.inc
-       end
-
-else
-
-       ##
-       ## Setup RAM
-       ##
-       mainboardinit cpu/x86/fpu/enable_fpu.inc
-       mainboardinit cpu/x86/mmx/enable_mmx.inc
-       mainboardinit cpu/x86/sse/enable_sse.inc
-       mainboardinit ./auto.inc
-       mainboardinit cpu/x86/sse/disable_sse.inc
-       mainboardinit cpu/x86/mmx/disable_mmx.inc
-
-end
-
-##
-## Include the secondary Configuration files 
-##
-
-dir /pc80
-
-config chip.h
-
-# config for agami/aruma
-chip northbridge/amd/amdk8/root_complex
-        device apic_cluster 0 on
-                chip cpu/amd/socket_940
-                        device apic 0 on end
-                end
-        end
-       device pci_domain 0 on
-           chip northbridge/amd/amdk8
-               device pci 18.0 on end #  device pci 18.0 
-               device pci 18.0 on 
-                       #  devices on link 1, link 1 == LDT 1 
-                       chip southbridge/amd/amd8131
-                               # the on/off keyword is mandatory
-                               device pci 0.0 on end
-                               device pci 0.1 on end
-                               device pci 1.0 on end
-                               device pci 1.1 on end
-                       end # 8131
-                       chip southbridge/amd/amd8111
-                               # this "device pci 0.0" is the parent the next one
-                               # PCI bridge
-                               device pci 0.0 on
-                                       device pci 0.0 on end
-                                       device pci 0.1 on end
-                                       device pci 0.2 off end
-                                       device pci 1.0 off end
-                                       #chip drivers/ati/ragexl
-                                       chip drivers/pci/onboard
-                                               device pci 4.0 on end
-                                               register "rom_address" = "0xfff80000"
-                                       end
-                               end
-                               device pci 1.0 on
-                                       chip superio/winbond/w83627hf
-                                               device pnp 2e.0 on #  Floppy
-                                                        io 0x60 = 0x3f0
-                                                        irq 0x70 = 6
-                                                        drq 0x74 = 2
-                                                end
-                                                device pnp 2e.1 off #  Parallel Port
-                                                        io 0x60 = 0x378
-                                                        irq 0x70 = 7
-                                                end
-                                                device pnp 2e.2 on #  Com1
-                                                        io 0x60 = 0x3f8
-                                                        irq 0x70 = 4
-                                                end
-                                                device pnp 2e.3 on #  Com2
-                                                        io 0x60 = 0x2f8
-                                                        irq 0x70 = 3
-                                                end
-                                                device pnp 2e.5 on #  Keyboard
-                                                        io 0x60 = 0x60
-                                                        io 0x62 = 0x64
-                                                        irq 0x70 = 1
-                                                        irq 0x72 = 12
-                                                end
-                                                device pnp 2e.6 off #  CIR
-                                                        io 0x60 = 0x100
-                                                end
-                                                device pnp 2e.7 off # GAME_MIDI_GIPO1
-                                                        io 0x60 = 0x201
-                                                        io 0x62 = 0x330
-                                                        irq 0x70 = 9
-                                                end
-                                                device pnp 2e.8 off end # GPIO2
-                                                device pnp 2e.9 off end # GPIO3
-                                                device pnp 2e.a off end #  ACPI
-                                                device pnp 2e.b on #  HW Monitor
-                                                        io 0x60 = 0x290
-                                                        irq 0x70 = 5
-                                                end
-                                       end
-                               end
-                               device pci 1.1 on end
-                               device pci 1.2 on end
-                               device pci 1.3 on 
-                                        chip drivers/i2c/i2cmux2 # pca9545 smbus mux
-                                                device i2c 71 on     #pca9545 channel0
-                                                        chip drivers/i2c/adm1026
-                                                                device i2c 2d on end
-                                                        end
-                                                end
-                                               device i2c 71 on     #pca9545 channel1
-                                                        chip drivers/generic/generic # fan board / pstray behind another mux
-                                                                device i2c 2d on end
-                                                        end
-                                                end
-                                        end
-                                        chip drivers/i2c/i2cmux2 # pca9543 smbus mux
-                                                device i2c 73 on     #pca9543 channel0
-                                                       chip drivers/generic/generic #dimm 0-0-0
-                                                               device i2c 50 on end
-                                                       end
-                                                       chip drivers/generic/generic #dimm 0-0-1
-                                                               device i2c 51 on end
-                                                       end 
-                                                       chip drivers/generic/generic #dimm 0-1-0
-                                                               device i2c 52 on end
-                                                       end 
-                                                       chip drivers/generic/generic #dimm 0-1-1
-                                                               device i2c 53 on end
-                                                       end 
-                                               end
-
-                                                device i2c 73 on     #pca9543 channel1
-                                                       chip drivers/generic/generic #dimm 1-0-0
-                                                               device i2c 50 on end 
-                                                       end
-                                                       chip drivers/generic/generic #dimm 1-0-1
-                                                               device i2c 51 on end
-                                                       end 
-                                                       chip drivers/generic/generic #dimm 1-1-0
-                                                               device i2c 52 on end
-                                                       end 
-                                                       chip drivers/generic/generic #dimm 1-1-1
-                                                               device i2c 53 on end
-                                                       end 
-                                               end
-                                       end # chip end
-                                       chip drivers/generic/generic # ICS950405AF
-                                               device i2c 69 on end
-                                       end
-                               end
-                               device pci 1.5 off end
-                               device pci 1.6 on end
-                               register "ide0_enable" = "1"
-                               register "ide1_enable" = "1"
-                       end # 8111
-               end # LDT1
-               device pci 18.0 on end # LDT2
-               device pci 18.1 on end
-               device pci 18.2 on end
-               device pci 18.3 on end
-           end
-
-               chip northbridge/amd/amdk8
-                       device pci 19.0 on end # LDT0
-                       device pci 19.0 on end # LDT1
-                       device pci 19.0 on # LDT2
-                               chip southbridge/amd/amd8131
-                                       # the on/off keyword is mandatory
-                                       device pci 0.0 on end
-                                       device pci 0.1 on end
-                                       device pci 1.0 on end
-                                       device pci 1.1 on end
-                               end
-                               chip southbridge/amd/amd8131
-                                       # the on/off keyword is mandatory
-                                       device pci 0.0 on end
-                                       device pci 0.1 on end
-                                       device pci 1.0 on end
-                                       device pci 1.1 on end
-                               end
-                       end # LDT2
-                       device pci 19.1 on end
-                       device pci 19.2 on end
-                       device pci 19.3 on end
-               end
-
-                chip northbridge/amd/amdk8
-                        device pci 1a.0 on end
-                        device pci 1a.0 on end
-                        device pci 1a.0 on # LDT2
-                               chip southbridge/amd/amd8131
-                                       # the on/off keyword is mandatory
-                                       device pci 0.0 on end
-                                       device pci 0.1 on end
-                                       device pci 1.0 on end
-                                       device pci 1.1 on end
-                               end
-                               chip southbridge/amd/amd8131
-                                       # the on/off keyword is mandatory
-                                       device pci 0.0 on end
-                                       device pci 0.1 on end
-                                       device pci 1.0 on end
-                                       device pci 1.1 on end
-                               end
-
-                       end # LDT2
-                        device pci 1a.1 on end
-                        device pci 1a.2 on end
-                        device pci 1a.3 on end
-                end
-
-                chip northbridge/amd/amdk8
-                        device pci 1b.0 on end
-                        device pci 1b.0 on # LDT1
-                               chip southbridge/amd/amd8131
-                                       # the on/off keyword is mandatory
-                                       device pci 0.0 on end
-                                       device pci 0.1 on end
-                                       device pci 1.0 on end
-                                       device pci 1.1 on end
-                               end
-                               chip southbridge/amd/amd8131
-                                       # the on/off keyword is mandatory
-                                       device pci 0.0 on end
-                                       device pci 0.1 on end
-                                       device pci 1.0 on end
-                                       device pci 1.1 on end
-                               end
-
-                       end
-                        device pci 1b.0 on end
-                        device pci 1b.1 on end
-                        device pci 1b.2 on end
-                        device pci 1b.3 on end
-                end
-
-
-       end 
-end
-

diff --git a/src/mainboard/agami/aruma/Options.lb b/src/mainboard/agami/aruma/Options.lb
deleted file mode 100644 (file)
index a6775ea..0000000
--- a/src/mainboard/agami/aruma/Options.lb
+++ /dev/null
@@ -1,295 +0,0 @@
-uses HAVE_MP_TABLE
-uses HAVE_PIRQ_TABLE
-uses HAVE_ACPI_TABLES
-uses ACPI_SSDTX_NUM
-uses USE_FALLBACK_IMAGE
-uses HAVE_FALLBACK_BOOT
-uses HAVE_HARD_RESET
-uses IRQ_SLOT_COUNT
-uses HAVE_OPTION_TABLE
-uses CONFIG_MAX_CPUS
-uses CONFIG_MAX_PHYSICAL_CPUS
-uses CONFIG_LOGICAL_CPUS
-uses CONFIG_IOAPIC
-uses CONFIG_SMP
-uses FALLBACK_SIZE
-uses ROM_SIZE
-uses ROM_SECTION_SIZE
-uses ROM_IMAGE_SIZE
-uses ROM_SECTION_SIZE
-uses ROM_SECTION_OFFSET
-uses CONFIG_ROM_PAYLOAD
-uses CONFIG_ROM_PAYLOAD_START
-uses CONFIG_COMPRESSED_PAYLOAD_LZMA
-uses CONFIG_PRECOMPRESSED_PAYLOAD
-uses PAYLOAD_SIZE
-uses _ROMBASE
-uses XIP_ROM_SIZE
-uses XIP_ROM_BASE
-uses STACK_SIZE
-uses HEAP_SIZE
-uses USE_OPTION_TABLE
-uses LB_CKS_RANGE_START
-uses LB_CKS_RANGE_END
-uses LB_CKS_LOC
-uses MAINBOARD
-uses MAINBOARD_PART_NUMBER
-uses MAINBOARD_VENDOR
-uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
-uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
-uses COREBOOT_EXTRA_VERSION
-uses _RAMBASE
-uses CC
-uses HOSTCC
-uses CROSS_COMPILE
-uses TTYS0_BAUD
-uses TTYS0_BASE
-uses TTYS0_LCS
-uses DEFAULT_CONSOLE_LOGLEVEL
-uses MAXIMUM_CONSOLE_LOGLEVEL
-uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL
-uses CONFIG_CONSOLE_SERIAL8250
-uses HAVE_INIT_TIMER
-uses CONFIG_GDB_STUB
-uses CONFIG_CONSOLE_VGA
-uses CONFIG_PCI_ROM_RUN
-uses CONFIG_CHIP_NAME
-
-uses HT_CHAIN_UNITID_BASE
-uses HT_CHAIN_END_UNITID_BASE
-uses SB_HT_CHAIN_ON_BUS0
-uses SB_HT_CHAIN_UNITID_OFFSET_ONLY
-
-uses USE_DCACHE_RAM
-uses DCACHE_RAM_BASE
-uses DCACHE_RAM_SIZE
-uses CONFIG_USE_INIT
-
-uses CONFIG_USE_PRINTK_IN_CAR
-
-
-uses SERIAL_CPU_INIT
-
-uses ENABLE_APIC_EXT_ID
-uses APIC_ID_OFFSET
-uses LIFT_BSP_APIC_ID
-
-uses HW_MEM_HOLE_SIZEK
-uses CONFIG_PCI_64BIT_PREF_MEM
-
-
-###
-### Build options
-###
-
-##
-## ROM_SIZE is the size of boot ROM that this board will use.
-##
-default ROM_SIZE=524288
-
-##
-## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
-##
-#default FALLBACK_SIZE=131072
-# 256k
-default FALLBACK_SIZE=0x40000
-
-
-##
-## Set this.
-##
-
-default CONFIG_CHIP_NAME=1
-
-
-##
-## Build code for the fallback boot
-##
-default HAVE_FALLBACK_BOOT=1
-
-##
-## Use hard_reset for rebooting, it uses reg. 0xcf9 in the amd8111.
-##
-default HAVE_HARD_RESET=1
-
-##
-## set memory hole size
-##
-default HW_MEM_HOLE_SIZEK=0x300000
-#default HW_MEM_HOLE_SIZEK=0x200000
-
-##
-## Build code to export a programmable irq routing table
-##
-default HAVE_PIRQ_TABLE=1
-default IRQ_SLOT_COUNT=23
-
-##
-## Build code to export an x86 MP table
-## Useful for specifying IRQ routing values
-##
-default HAVE_MP_TABLE=1
-default HAVE_ACPI_TABLES=1
-
-## extra SSDT num
-default ACPI_SSDTX_NUM=3
-
-##
-## Build code to export a CMOS option table
-##
-default HAVE_OPTION_TABLE=1
-
-##
-## Move the default coreboot cmos range off of AMD RTC registers
-##
-default LB_CKS_RANGE_START=49
-default LB_CKS_RANGE_END=122
-default LB_CKS_LOC=123
-
-##
-## Build code for SMP support
-##
-default CONFIG_SMP=1
-default CONFIG_MAX_CPUS=8
-default CONFIG_MAX_PHYSICAL_CPUS=4
-default CONFIG_LOGICAL_CPUS=1
-#default ALLOW_HT_OVERCLOCKING=1
-
-default ENABLE_APIC_EXT_ID=1
-default APIC_ID_OFFSET=0x10
-default LIFT_BSP_APIC_ID=1        # SDE was 0
-
-#HT Unit ID offset
-#default HT_CHAIN_UNITID_BASE=0xa
-
-#real SB Unit ID
-#default HT_CHAIN_END_UNITID_BASE=0x6
-
-#make the SB HT chain on bus 0
-#default SB_HT_CHAIN_ON_BUS0=1
-
-#allow capable device use that above 4G
-#default CONFIG_PCI_64BIT_PREF_MEM=1
-
-##
-## enable CACHE_AS_RAM specifics
-##
-default USE_DCACHE_RAM=1
-default DCACHE_RAM_BASE=0xcc000
-default DCACHE_RAM_SIZE=0x4000
-default CONFIG_USE_INIT=0
-#default CONFIG_USE_INIT=1
-default CONFIG_USE_PRINTK_IN_CAR=1
-
-##
-## Build code to setup a generic IOAPIC
-##
-default CONFIG_IOAPIC=1
-
-##
-## Clean up the motherboard id strings
-##
-default MAINBOARD_PART_NUMBER="ARUMA"
-default MAINBOARD_VENDOR="AGAMI"
-default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x1022
-default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x36c0
-
-
-###
-### coreboot layout values
-###
-
-## ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy.
-default ROM_IMAGE_SIZE = 65536
-
-##
-## Use a small 8K stack
-##
-default STACK_SIZE=0x2000
-
-##
-## Use a 32K heap
-##
-default HEAP_SIZE=0x8000
-
-##
-## Only use the option table in a normal image
-##
-default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
-
-##
-## Coreboot C code runs at this location in RAM
-##
-default _RAMBASE=0x00004000
-
-##
-## Load the payload from the ROM
-##
-default CONFIG_ROM_PAYLOAD = 1
-
-###
-### Defaults of options that you may want to override in the target config file
-### 
-
-##
-## The default compiler
-##
-default CC="$(CROSS_COMPILE)gcc -m32"
-default HOSTCC="gcc"
-
-##
-## The Serial Console
-##
-
-# To Enable the Serial Console
-default CONFIG_CONSOLE_SERIAL8250=1
-
-## Select the serial console baud rate
-#default TTYS0_BAUD=115200
-#default TTYS0_BAUD=57600
-#default TTYS0_BAUD=38400
-#default TTYS0_BAUD=19200
-default TTYS0_BAUD=9600
-#default TTYS0_BAUD=4800
-#default TTYS0_BAUD=2400
-#default TTYS0_BAUD=1200
-
-# Select the serial console base port
-default TTYS0_BASE=0x3f8
-
-# Select the serial protocol
-# This defaults to 8 data bits, 1 stop bit, and no parity
-default TTYS0_LCS=0x3
-
-##
-### Select the coreboot loglevel
-##
-## EMERG      1   system is unusable               
-## ALERT      2   action must be taken immediately 
-## CRIT       3   critical conditions              
-## ERR        4   error conditions                 
-## WARNING    5   warning conditions               
-## NOTICE     6   normal but significant condition 
-## INFO       7   informational                    
-## DEBUG      8   debug-level messages             
-## SPEW       9   Way too many details             
-
-
-## These values can be overwritten by corebootv2/targets/agami/aruma/Config.lb
-## Request this level of debugging output
-default  DEFAULT_CONSOLE_LOGLEVEL=8
-## At a maximum only compile in this level of debugging
-default  MAXIMUM_CONSOLE_LOGLEVEL=8
-
-##
-## Select power on after power fail setting
-default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
-
-#VGA
-default CONFIG_CONSOLE_VGA=1
-default CONFIG_PCI_ROM_RUN=1
-#default CONFIG_CONSOLE_VGA=0
-#default CONFIG_PCI_ROM_RUN=0
-
-### End Options.lb
-end

diff --git a/src/mainboard/agami/aruma/acpi_tables.c b/src/mainboard/agami/aruma/acpi_tables.c
deleted file mode 100644 (file)
index da1bf56..0000000
--- a/src/mainboard/agami/aruma/acpi_tables.c
+++ /dev/null
@@ -1,333 +0,0 @@
-/*
- * Agami Aruma ACPI support
- * 
- *  Copyright 2005 Stefan Reinauer
- *  Copyright 2005 AMD
- *  
- * written by Stefan Reinauer <stepan@openbios.org>
- *  2005.9 yhlu modify that to more dynamic for AMD Opteron Based MB
- */
-
-#include <console/console.h>
-#include <string.h>
-#include <arch/acpi.h>
-#include <device/pci.h>
-#include <device/pci_ids.h>
-#include <cpu/x86/msr.h>
-#include <cpu/amd/mtrr.h>
-#include <../../../northbridge/amd/amdk8/amdk8_acpi.h>
-
-#define DUMP_ACPI_TABLES 0
-
-#if DUMP_ACPI_TABLES == 1
-static void dump_mem(unsigned start, unsigned end)
-{
-
-       unsigned i;
-       print_debug("dump_mem:");
-       for (i = start; i < end; i++) {
-               if ((i & 0xf) == 0) {
-                       printk_debug("\n%08x:", i);
-               }
-               printk_debug(" %02x",
-                            (unsigned char) *((unsigned char *) i));
-       }
-       print_debug("\n");
-}
-#endif
-
-#define HC_POSSIBLE_NUM 8
-extern unsigned char AmlCode[];
-#if ACPI_SSDTX_NUM >= 1
-extern unsigned char AmlCode_ssdt2[];
-extern unsigned char AmlCode_ssdt3[];
-extern unsigned char AmlCode_ssdt4[];
-//extern unsigned char AmlCode_ssdt5[];
-//extern unsigned char AmlCode_ssdt6[];
-//extern unsigned char AmlCode_ssdt7[];
-//extern unsigned char AmlCode_ssdt8[];
-#endif
-
-#define IO_APIC_ADDR   0xfec00000UL
-
-extern unsigned char bus_isa;
-extern unsigned char bus_8111_0;
-extern unsigned char bus_8111_1;
-extern unsigned char bus_8131[7][3];   // another 6 8131
-extern unsigned apicid_8111;
-extern unsigned apicid_8131[7][2];
-
-extern unsigned pci1234[];
-extern unsigned hc_possible_num;
-extern unsigned sblk;
-extern unsigned sbdn;
-extern unsigned hcdn[];
-extern unsigned sbdnx[7];      // for all 8131
-
-unsigned long acpi_fill_mcfg(unsigned long current)
-{
-       /* Just a dummy */
-       return current;
-}
-
-unsigned long acpi_fill_madt(unsigned long current)
-{
-       unsigned int gsi_base = 0x18;
-
-       /* create all subtables for processors */
-       current = acpi_create_madt_lapics(current);
-
-       /* Write 8111 IOAPIC */
-       current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 
-                       apicid_8111, IO_APIC_ADDR, 0);
-
-       /* Write all 8131/8132 IOAPICs */
-       {
-               device_t dev;
-               struct resource *res;
-               dev = dev_find_slot(bus_8131[0][0], PCI_DEVFN(sbdnx[0], 1));
-
-               if (dev) {
-                       res = find_resource(dev, PCI_BASE_ADDRESS_0);
-                       if (res) {
-                               current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 
-                                               apicid_8131[0][0], res->base, gsi_base);
-                               gsi_base += 4;
-
-                       }
-               }
-               dev = dev_find_slot(bus_8131[0][0], PCI_DEVFN(sbdnx[0] + 1, 1));
-               if (dev) {
-                       res = find_resource(dev, PCI_BASE_ADDRESS_0);
-                       if (res) {
-                               current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 
-                                               apicid_8131[0][1], res->base, gsi_base);
-                               gsi_base += 4;
-                       }
-               }
-       }
-
-       int i;
-       for (i = 1; i < hc_possible_num; i++) 
-       {       // 0: is hc sblink
-               device_t dev;
-               int j;
-               struct resource *res;
-               
-               if ((pci1234[i] & 1) != 1)
-                       continue;
-       
-               j = (i - 1) * 2 + 1;
-               dev = dev_find_slot(bus_8131[j][0], PCI_DEVFN(sbdnx[j], 1));
-
-               if (dev) {
-                       res = find_resource(dev, PCI_BASE_ADDRESS_0);
-                       if (res) {
-                               current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 
-                                               apicid_8131[j][0], res->base, gsi_base);
-                               gsi_base += 4;
-
-                       }
-               }
-               dev =
-                   dev_find_slot(bus_8131[j][0],
-                                 PCI_DEVFN(sbdnx[j] + 1, 1));
-               if (dev) 
-               {
-                       res = find_resource(dev, PCI_BASE_ADDRESS_0);
-                       if (res) {
-                               current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 
-                                               apicid_8131[j][1], res->base, gsi_base);
-                               gsi_base += 4;
-                       }
-               }
-
-               dev =
-                   dev_find_slot(bus_8131[j + 1][0],
-                                 PCI_DEVFN(sbdnx[j + 1], 1));
-
-               if (dev) 
-               {
-                       res = find_resource(dev, PCI_BASE_ADDRESS_0);
-                       if (res) {
-                               current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 
-                                               apicid_8131[j + 1][0], res->base, gsi_base);
-                               gsi_base += 4;
-
-                       }
-               }
-               dev = dev_find_slot(bus_8131[j + 1][0], PCI_DEVFN(sbdnx[j + 1] + 1, 1));
-               if (dev) 
-               {
-                       res = find_resource(dev, PCI_BASE_ADDRESS_0);
-                       if (res) {
-                               current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 
-                                               apicid_8131[j + 1][1], res->base, gsi_base);
-                               gsi_base += 4;
-                       }
-               }
-
-
-       }
-
-
-       current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) current, 0, 0, 2, 5);
-       /* 0: mean bus 0--->ISA */
-       /* 0: PIC 0 */
-       /* 2: APIC 2 */
-       /* 5 mean: 0101 --> Edige-triggered, Active high */
-
-
-       /* create all subtables for processors */
-       current = acpi_create_madt_lapic_nmis(current, 5, 1);
-       /* 1: LINT1 connect to NMI */
-
-
-       return current;
-}
-
-unsigned long acpi_fill_ssdt_generator(unsigned long current, char *oem_table_id) {
-       k8acpi_write_vars();
-       return (unsigned long) (acpigen_get_current());
-}
-
-unsigned long write_acpi_tables(unsigned long start)
-{
-       unsigned long current;
-       acpi_rsdp_t *rsdp;
-       acpi_rsdt_t *rsdt;
-       acpi_hpet_t *hpet;
-       acpi_madt_t *madt;
-       acpi_srat_t *srat;
-       acpi_fadt_t *fadt;
-       acpi_facs_t *facs;
-       acpi_header_t *dsdt;
-       acpi_header_t *ssdt;
-       acpi_header_t *ssdtx;
-
-       unsigned char *AmlCode_ssdtx[HC_POSSIBLE_NUM];
-
-       int i;
-
-       /* Align ACPI tables to 16byte */
-       start = (start + 0x0f) & -0x10;
-       current = start;
-
-       printk_info("ACPI: Writing ACPI tables at %lx...\n", start);
-
-       /* We need at least an RSDP and an RSDT Table */
-       rsdp = (acpi_rsdp_t *) current;
-       current += sizeof(acpi_rsdp_t);
-       rsdt = (acpi_rsdt_t *) current;
-       current += sizeof(acpi_rsdt_t);
-
-       /* clear all table memory */
-       memset((void *) start, 0, current - start);
-
-       acpi_write_rsdp(rsdp, rsdt);
-       acpi_write_rsdt(rsdt);
-
-       get_bus_conf();         // get sblk, pci1234, and sbdn
-
-       /*
-        * We explicitly add these tables later on:
-        */
-       printk_debug("ACPI:    * HPET\n");
-       hpet = (acpi_hpet_t *) current;
-       current += sizeof(acpi_hpet_t);
-       acpi_create_hpet(hpet);
-       acpi_add_table(rsdt, hpet);
-
-       /* If we want to use HPET Timers Linux wants an MADT */
-       printk_debug("ACPI:    * MADT\n");
-       madt = (acpi_madt_t *) current;
-       acpi_create_madt(madt);
-       current += madt->header.length;
-       acpi_add_table(rsdt, madt);
-
-       /* SRAT */
-       printk_debug("ACPI:    * SRAT\n");
-       srat = (acpi_srat_t *) current;
-       acpi_create_srat(srat);
-       current += srat->header.length;
-       acpi_add_table(rsdt, srat);
-
-       /* SSDT */
-       printk_debug("ACPI:    * SSDT\n");
-       ssdt = (acpi_header_t *)current;
-
-       acpi_create_ssdt_generator(ssdt, "DYNADATA");
-       current += ssdt->length;
-       acpi_add_table(rsdt, ssdt);
-
-#if ACPI_SSDTX_NUM >= 1
-       // we need to make ssdt2 match to PCI2 in pci2.asl,... pci1234[1] 
-       AmlCode_ssdtx[1] = AmlCode_ssdt2;       // if you have different HT IO card for the same ht slot, here need to check vendor id, to set coresponding SSDT
-       AmlCode_ssdtx[2] = AmlCode_ssdt3;
-       AmlCode_ssdtx[3] = AmlCode_ssdt4;
-//      AmlCode_ssdtx[4] = AmlCode_ssdt5;
-//      AmlCode_ssdtx[5] = AmlCode_ssdt6;
-//      AmlCode_ssdtx[6] = AmlCode_ssdt7;
-//      AmlCode_ssdtx[7] = AmlCode_ssdt8;
-
-       //same htio, but different possition? We may have to copy, change HCIN, and recalculate the checknum and add_table
-
-       for (i = 1; i < hc_possible_num; i++) { // 0: is hc sblink
-               if ((pci1234[i] & 1) != 1)
-                       continue;
-               printk_debug("ACPI:    * SSDT for PCI%d\n", i + 1);     //pci0 and pci1 are in dsdt
-               ssdtx = (acpi_header_t *) current;
-               current += ((acpi_header_t *) AmlCode_ssdtx[i])->length;
-               memcpy((void *) ssdtx, (void *) AmlCode_ssdtx[i],
-                      ((acpi_header_t *) AmlCode_ssdtx[i])->length);
-               acpi_add_table(rsdt, ssdtx);
-       }
-#endif
-
-
-       /* FACS */
-       printk_debug("ACPI:    * FACS\n");
-       facs = (acpi_facs_t *) current;
-       current += sizeof(acpi_facs_t);
-       acpi_create_facs(facs);
-
-       /* DSDT */
-       printk_debug("ACPI:    * DSDT\n");
-       dsdt = (acpi_header_t *) current;
-       current += ((acpi_header_t *) AmlCode)->length;
-       memcpy((void *) dsdt, (void *) AmlCode,
-              ((acpi_header_t *) AmlCode)->length);
-       printk_debug("ACPI:    * DSDT @ %08x Length %x\n", dsdt,
-                    dsdt->length);
-
-       /* FDAT */
-       printk_debug("ACPI:    * FADT\n");
-       fadt = (acpi_fadt_t *) current;
-       current += sizeof(acpi_fadt_t);
-
-       acpi_create_fadt(fadt, facs, dsdt);
-       acpi_add_table(rsdt, fadt);
-
-#if DUMP_ACPI_TABLES == 1
-       printk_debug("rsdp\n");
-       dump_mem(rsdp, ((void *) rsdp) + sizeof(acpi_rsdp_t));
-
-       printk_debug("rsdt\n");
-       dump_mem(rsdt, ((void *) rsdt) + sizeof(acpi_rsdt_t));
-
-       printk_debug("madt\n");
-       dump_mem(madt, ((void *) madt) + madt->header.length);
-
-       printk_debug("srat\n");
-       dump_mem(srat, ((void *) srat) + srat->header.length);
-
-       printk_debug("ssdt\n");
-       dump_mem(ssdt, ((void *) ssdt) + ssdt->length);
-
-       printk_debug("fadt\n");
-       dump_mem(fadt, ((void *) fadt) + fadt->header.length);
-#endif
-
-       printk_info("ACPI: done.\n");
-       return current;
-}

diff --git a/src/mainboard/agami/aruma/acpi_tables_static.c b/src/mainboard/agami/aruma/acpi_tables_static.c
deleted file mode 100644 (file)
index b20a7d7..0000000
--- a/src/mainboard/agami/aruma/acpi_tables_static.c
+++ /dev/null
@@ -1,252 +0,0 @@
-/*
- * Agami Aruma ACPI support
- * 
- * written by Stefan Reinauer <stepan@coresystems.de>
- *  (C) 2005 Stefan Reinauer
- *  (C) 2007 coresystems GmbH
- */
-
-#include <console/console.h>
-#include <string.h>
-#include <arch/acpi.h>
-#include <device/pci.h>
-#include <device/pci_ids.h>
-
-extern unsigned char AmlCode[];
-
-unsigned long acpi_fill_mcfg(unsigned long current)
-{
-       /* Just a dummy */
-       return current;
-}
-
-
-#define IO_APIC_ADDR   0xfec00000UL
-
-unsigned long acpi_fill_madt(unsigned long current)
-{
-       unsigned int gsi_base=0x18, ioapic_nr=2, i;
-       device_t dev=0;
- 
-       /* creare all subtables for 4p */
-#ifdef PRE_REVE
-       current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 0, 0);
-       current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 1, 17);
-       current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 2, 18);
-       current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 3, 19);
-#endif
-       current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 0, 16);
-       current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 1, 18);
-       current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 2, 20);
-       current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 3, 22);
-       
-       /* Write 8111 IOAPIC */
-       current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, 1,
-                       IO_APIC_ADDR, 0);
-
-        /* Write the first 8131 IOAPICs */
-       for(i = 0; i < 2; i++) {
-               if (dev = dev_find_device(PCI_VENDOR_ID_AMD, 0x7451, dev)){
-                       ACPI_WRITE_MADT_IOAPIC(dev, ioapic_nr);
-                       ioapic_nr++;
-               }
-       }
-
-       /* Write the 8132 IOAPICs if they exist */      
-       for(i = 0; i < 4; i++) {
-               if (dev = dev_find_device(PCI_VENDOR_ID_AMD, 0x7459, dev)){
-                       ACPI_WRITE_MADT_IOAPIC(dev, ioapic_nr);
-                       ioapic_nr++;
-               }
-       }
-
-       /* in the event there were no 8132s reset dev and look for the 8131s */
-        /* first skip the onboard 8131 */
-        dev=dev_find_device(PCI_VENDOR_ID_AMD, 0x7451, 0);
-        dev=dev_find_device(PCI_VENDOR_ID_AMD, 0x7451, dev);
-
-        /* Write all 8131 IOAPICs */
-       while((dev = dev_find_device(PCI_VENDOR_ID_AMD, 0x7451, dev))) {
-               ACPI_WRITE_MADT_IOAPIC(dev, ioapic_nr);
-               ioapic_nr++;
-       }
-
-       current += acpi_create_madt_irqoverride( (acpi_madt_irqoverride_t *)
-                       current, 1, 0, 2, 0 );
-
-       current += acpi_create_madt_irqoverride( (acpi_madt_irqoverride_t *)
-                       current, 1, 0, 2, 0 );
-
-       return current;
-}
-
-
-/* The next two tables are used by our DSDT and are freely defined
- * here. This construct is used because the bus numbers containing 
- * the 8131 bridges may vary so that we need to pass coreboot 
- * knowledge into the DSDT
- */
-typedef struct lnxc_busses {
-       u8 secondary;
-       u8 subordinate;
-} acpi_lnxb_busses_t;
-
-typedef struct acpi_lnxb {
-       struct acpi_table_header header;
-       acpi_lnxb_busses_t busses[5];
-} acpi_lnxb_t;
-
-/* special coreboot acpi table */
-void acpi_create_lnxb(acpi_lnxb_t *lnxb)
-{
-       device_t dev;
-       int busidx=0;
-       
-        acpi_header_t *header=&(lnxb->header);
-
-        /* fill out header fields */
-        memcpy(header->signature, "LNXB", 4);
-        memcpy(header->oem_id, OEM_ID, 6);
-        memcpy(header->oem_table_id, "LNXBIOS ", 8);
-        memcpy(header->asl_compiler_id, ASLC, 4);
-
-        header->length = sizeof(acpi_lnxb_t);
-        header->revision = 1;
-
-       /* 
-        * Write external 8131 bus ranges 
-        */
-       /* first skip the onboard 8131 */
-       dev=dev_find_device(PCI_VENDOR_ID_AMD, 0x7450, 0);
-       dev=dev_find_device(PCI_VENDOR_ID_AMD, 0x7450, dev);
-       /* now look at the last 8131 in each chain, 
-        * as it contains the valid bus ranges
-        */
-       /* Add a check for 8132 devices, device ID == 0x7458 */
-       while((dev = dev_find_device(PCI_VENDOR_ID_AMD, 0x7458, dev)) 
-                       && busidx<5 ) {
-               int subu, fn, slot;
-               acpi_lnxb_busses_t *busses;
-               
-               if(PCI_SLOT(dev->path.u.pci.devfn)!=4)
-                       continue;
-               
-               busses=&(lnxb->busses[busidx]);
-               lnxb->busses[busidx].secondary   = dev->bus->secondary;
-               lnxb->busses[busidx].subordinate = 
-                       pci_read_config8(dev, PCI_SUBORDINATE_BUS);
-#if 0  
-               /*  SDE-test print out lnbx table values  */
-               printk_info("ACPI: 7458 lnxb value, secondary %lx, subordinate %1x \n", 
-                       lnxb->busses[busidx].secondary, lnxb->busses[busidx].subordinate);
-#endif         
-               busidx++;
-       }
-       dev=dev_find_device(PCI_VENDOR_ID_AMD, 0x7450, 0);
-       dev=dev_find_device(PCI_VENDOR_ID_AMD, 0x7450, dev);
-       while((dev = dev_find_device(PCI_VENDOR_ID_AMD, 0x7450, dev)) 
-                       && busidx<5 ) {
-               int subu, fn, slot;
-               acpi_lnxb_busses_t *busses;
-               
-               if(PCI_SLOT(dev->path.u.pci.devfn)!=4)
-                       continue;
-               
-               busses=&(lnxb->busses[busidx]);
-               lnxb->busses[busidx].secondary   = dev->bus->secondary;
-               lnxb->busses[busidx].subordinate = 
-                       pci_read_config8(dev, PCI_SUBORDINATE_BUS);
-#if 0  
-               /*  SDE-test print out lnbx table values  */
-               printk_info("ACPI: 7450 lnxb value, secondary %lx, subordinate %1x \n", 
-                       lnxb->busses[busidx].secondary, lnxb->busses[busidx].subordinate);
-#endif         
-               busidx++;
-       }
-       header->checksum = acpi_checksum((void *)lnxb, sizeof(acpi_lnxb_t));
-}
-
-
-
-unsigned long write_acpi_tables(unsigned long start)
-{
-       unsigned long current;
-       acpi_rsdp_t *rsdp;
-       acpi_rsdt_t *rsdt;
-       acpi_hpet_t *hpet;
-       acpi_madt_t *madt;
-       acpi_fadt_t *fadt;
-       acpi_facs_t *facs;
-       acpi_lnxb_t *lnxb;
-       acpi_header_t *dsdt;
-
-       /* Align ACPI tables to 16byte */
-       start   = ( start + 0x0f ) & -0x10;
-       current = start;
-       
-       printk_info("ACPI: Writing ACPI tables at %lx...\n", start);
-
-       /* We need at least an RSDP and an RSDT Table */
-       rsdp = (acpi_rsdp_t *) current;
-       current += sizeof(acpi_rsdp_t);
-       rsdt = (acpi_rsdt_t *) current;
-       current += sizeof(acpi_rsdt_t);
-
-       /* clear all table memory */
-       memset((void *)start, 0, current - start);
-       
-       acpi_write_rsdp(rsdp, rsdt);
-       acpi_write_rsdt(rsdt);
-       
-       /*
-        * We explicitly add these tables later on:
-        */
-       printk_debug("ACPI:    * HPET\n");
-
-       hpet = (acpi_hpet_t *) current;
-       current += sizeof(acpi_hpet_t);
-       acpi_create_hpet(hpet);
-       acpi_add_table(rsdt,hpet);
-
-       /* If we want to use HPET Timers Linux wants an MADT */
-       printk_debug("ACPI:    * MADT\n");
-
-       madt = (acpi_madt_t *) current;
-       acpi_create_madt(madt);
-       current+=madt->header.length;
-       acpi_add_table(rsdt,madt);
-
-       printk_debug("ACPI:    * LNXB\n");
-       lnxb=(acpi_lnxb_t *)current;
-       current += sizeof(acpi_facs_t);
-       acpi_create_lnxb(lnxb);
-
-       printk_debug("ACPI:    * FACS\n");
-       facs = (acpi_facs_t *) current;
-       current += sizeof(acpi_facs_t);
-       acpi_create_facs(facs);
-
-       dsdt = (acpi_header_t *)current;
-       current += ((acpi_header_t *)AmlCode)->length;
-       memcpy((void *)dsdt,(void *)AmlCode, \
-                       ((acpi_header_t *)AmlCode)->length);
-
-       /* fix up dsdt */
-       ((u32 *)dsdt)[11]=((u32)lnxb)+sizeof(acpi_header_t);
-       
-       /* recalculate checksum */
-       dsdt->checksum = 0;
-       dsdt->checksum = acpi_checksum(dsdt,dsdt->length);
-       printk_debug("ACPI:    * DSDT @ %08x Length %x\n",dsdt,dsdt->length);
-       printk_debug("ACPI:    * FADT\n");
-       
-       fadt = (acpi_fadt_t *) current;
-       current += sizeof(acpi_fadt_t);
-
-       acpi_create_fadt(fadt,facs,dsdt);
-       acpi_add_table(rsdt,fadt);
-
-       printk_info("ACPI: done.\n");
-       return current;
-}
-

diff --git a/src/mainboard/agami/aruma/auto.c b/src/mainboard/agami/aruma/auto.c
deleted file mode 100644 (file)
index 51954a9..0000000
--- a/src/mainboard/agami/aruma/auto.c
+++ /dev/null
@@ -1,181 +0,0 @@
-#define ASSEMBLY 1
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <arch/romcc_io.h>
-#include <cpu/x86/lapic.h>
-#include <arch/cpu.h>
-#include <stdlib.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
-#include "ram/ramtest.c"
-#include "southbridge/amd/amd8111/amd8111_early_smbus.c"
-#include "northbridge/amd/amdk8/raminit.h"
-#include "cpu/amd/model_fxx/apic_timer.c"
-#include "lib/delay.c"
-#include "cpu/x86/lapic/boot_cpu.c"
-#include "northbridge/amd/amdk8/reset_test.c"
-#include "northbridge/amd/amdk8/debug.c"
-#include <cpu/amd/model_fxx_rev.h>
-#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c"
-#include "cpu/x86/bist.h"
-
-#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
-
-static void hard_reset(void)
-{
-       set_bios_reset();
-       // pci_write_config8(PCI_DEV(0, 0x04, 3), 0x41, 0xf1);
-       // outb(0x0e, 0x0cf9);
-       outb(0x06, 0x0cf9); /* this value will assert RESET_L and LDTRST_L */
-}
-
-static void soft_reset(void)
-{
-       set_bios_reset();
-       pci_write_config8(PCI_DEV(0, 0x04, 0), 0x47, 1);
-}
-
-/*
- * GPIO28 of 8111 will control H0_MEMRESET_L
- * GPIO29 of 8111 will control H1_MEMRESET_L
- */
-static void memreset_setup(void)
-{
-       if (is_cpu_pre_c0()) {
-               /* Set the memreset low */
-               outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), 
-                               SMBUS_IO_BASE + 0xc0 + 28);
-               /* Ensure the BIOS has control of the memory lines */
-               outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0),
-                               SMBUS_IO_BASE + 0xc0 + 29);
-       } else {
-               /* Ensure the CPU has controll of the memory lines */
-               outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(1<<0),
-                               SMBUS_IO_BASE + 0xc0 + 29);
-       }
-}
-
-static void memreset(int controllers, const struct mem_controller *ctrl)
-{
-       if (is_cpu_pre_c0()) {
-               udelay(800);
-               /* Set memreset_high */
-               outb((0<<7)|(0<<6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), 
-                               SMBUS_IO_BASE + 0xc0 + 28);
-               udelay(90);
-       }
-}
-
-static inline void activate_spd_rom(const struct mem_controller *ctrl)
-{
-#define SMBUS_SWITCH1 0x71
-#define SMBUS_SWITCH2 0x73
-       /* Switch 1: pca 9545, Switch 2: pca 9543 */
-       unsigned device = (ctrl->channel0[0]) >> 8;
-       /* Disable all outputs on SMBus switch 1 */
-       smbus_send_byte(SMBUS_SWITCH1, 0x0);
-       /* Select SMBus switch 2 Channel 0/1 */
-       smbus_send_byte(SMBUS_SWITCH2, device);
-}
-
-static inline int spd_read_byte(unsigned device, unsigned address)
-{
-       return smbus_read_byte(device, address);
-}
-
-#include "northbridge/amd/amdk8/raminit.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
-#include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "cpu/amd/dualcore/dualcore.c"
-#include "sdram/generic_sdram.c"
-#include "resourcemap.c"
-
-#define CHAN0 0x100
-#define CHAN1 0x200
-
-#define NODE_RAM(x)                    \
-       .node_id = 0+x,                 \
-       .f0 = PCI_DEV(0, 0x18+x, 0),    \
-       .f1 = PCI_DEV(0, 0x18+x, 1),    \
-       .f2 = PCI_DEV(0, 0x18+x, 2),    \
-       .f3 = PCI_DEV(0, 0x18+x, 3)
-
-static void main(unsigned long bist)
-{
-       static const struct mem_controller cpu[] = {
-       {        NODE_RAM(0),
-               .channel0 = { (0xa0>>1)|CHAN0, (0xa4>>1)|CHAN0, 0, 0 },
-               .channel1 = { (0xa2>>1)|CHAN0, (0xa6>>1)|CHAN0, 0, 0 } 
-       },
-       {       NODE_RAM(1),
-               .channel0 = { (0xa8>>1)|CHAN0, (0xac>>1)|CHAN0, 0, 0 },
-               .channel1 = { (0xaa>>1)|CHAN0, (0xae>>1)|CHAN0, 0, 0 }
-       },
-       {       NODE_RAM(2),
-               .channel0 = { (0xa8>>1)|CHAN1, (0xac>>1)|CHAN1, 0, 0 },
-               .channel1 = { (0xaa>>1)|CHAN1, (0xae>>1)|CHAN1, 0, 0 }
-       },
-       {       NODE_RAM(3),
-               .channel0 = { (0xa0>>1)|CHAN1, (0xa4>>1)|CHAN1, 0, 0 },
-               .channel1 = { (0xa2>>1)|CHAN1, (0xa6>>1)|CHAN1, 0, 0 }
-       }
-       };
-
-       int needs_reset;
-
-       if (bist == 0) {
-               k8_init_and_stop_secondaries();
-       }
-       /* Setup the console */
-       w83627hf_enable_serial(SERIAL_DEV, TTYS0_BASE);
-       uart_init();
-       console_init();
-
-       /* Halt if there was a built in self test failure */
-       report_bist_failure(bist);
-
-       setup_aruma_resource_map();
-       needs_reset = setup_coherent_ht_domain();
-       needs_reset=ht_setup_chains_x();
-
-#if 0
-       dump_pci_devices();
-#endif
-#if 0
-        print_pci_devices();
-#endif
-       
-//#if (ALLOW_HT_OVERCLOCKING==1) && (USE_FALLBACK_IMAGE==0)
-//     if(read_option(CMOS_VSTART_amdk8_1GHz, CMOS_VLEN_amdk8_1GHz, 0)) 
-//     {
-//             print_debug("AMDK8 allowed at 1GHz\r\n");
-//     } else {
-//             print_debug("AMDK8 allowed at 800Hz only\r\n");
-//     }
-//     if(read_option(CMOS_VSTART_amd8131_800MHz, CMOS_VLEN_amd8131_800MHz, 0))
-//     {
-//             print_debug("AMD8131 allowed at 800MHz\r\n");
-//     } else {
-//             print_debug("AMD8131 allowed at 600Hz only\r\n");
-//     }
-//#endif
-       if (needs_reset) {
-               print_info("HyperT reset -\r\n");
-               soft_reset();
-       }
-
-       enable_smbus();
-
-       memreset_setup();
-       sdram_initialize(ARRAY_SIZE(cpu), cpu);
-
-#if 0
-       /* Check the first 1M */
-       ram_check(0x00000000, 0x000100000);
-#endif
-}

diff --git a/src/mainboard/agami/aruma/cache_as_ram_auto.c b/src/mainboard/agami/aruma/cache_as_ram_auto.c
deleted file mode 100644 (file)
index d49fab2..0000000
--- a/src/mainboard/agami/aruma/cache_as_ram_auto.c
+++ /dev/null
@@ -1,267 +0,0 @@
-#define ASSEMBLY 1
-#define ASM_CONSOLE_LOGLEVEL 3
-#define __ROMCC__
-
-#define RAMINIT_SYSINFO 0
-
-#if CONFIG_LOGICAL_CPUS==1
-        #define SET_NB_CFG_54 1
-#endif
-
-//use by raminit
-#define QRANK_DIMM_SUPPORT 1
-
-//used by incoherent_ht
-//#define K8_SCAN_PCI_BUS 1
-//#define K8_ALLOCATE_IO_RANGE 1
-
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <arch/romcc_io.h>
-#include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
-#include "ram/ramtest.c"
-
-
-#include <cpu/amd/model_fxx_rev.h>
-
-#include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "southbridge/amd/amd8111/amd8111_early_smbus.c"
-#include "northbridge/amd/amdk8/raminit.h"
-#include "cpu/amd/model_fxx/apic_timer.c"
-#include "lib/delay.c"
-
-#if CONFIG_USE_INIT == 0
-#include "lib/memcpy.c"
-#endif
-
-#include "cpu/x86/lapic/boot_cpu.c"
-#include "northbridge/amd/amdk8/reset_test.c"
-#include "northbridge/amd/amdk8/debug.c"
-#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
-
-#include "cpu/amd/mtrr/amd_earlymtrr.c"
-#include "cpu/x86/bist.h"
-
-#include "northbridge/amd/amdk8/setup_resource_map.c"
-
-#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
-
-static void hard_reset(void)
-{
-        set_bios_reset();
-        pci_write_config8(PCI_DEV(0, 0x04, 3), 0x41, 0xf1);
-        //outb(0x0e, 0x0cf9);
-       outb(0x06, 0x0cf9); /* this value will assert RESET_L and LDTRST_L */
-}
-
-static void soft_reset(void)
-{
-        set_bios_reset();
-        pci_write_config8(PCI_DEV(0, 0x04, 0), 0x47, 1);
-        //outb(0x0e, 0x0cf9);
-       outb(0x06, 0x0cf9); /* this value will assert RESET_L and LDTRST_L */
-}
-
-/*
- * GPIO28 of 8111 will control H0_MEMRESET_L
- * GPIO29 of 8111 will control H1_MEMRESET_L
- */
-static void memreset_setup(void)
-{
-       /* Ensure the CPU has controll of the memory lines */
-       outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(1<<0),
-                       SMBUS_IO_BASE + 0xc0 + 29);
-}
-
-static void memreset(int controllers, const struct mem_controller *ctrl)
-{
-       if (is_cpu_pre_c0()) {
-               udelay(800);
-               /* Set memreset_high */
-               outb((0<<7)|(0<<6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), 
-                               SMBUS_IO_BASE + 0xc0 + 28);
-               udelay(90);
-       }
-}
-
-static inline void activate_spd_rom(const struct mem_controller *ctrl)
-{
-#define SMBUS_SWITCH1 0x71
-#define SMBUS_SWITCH2 0x73
-        /* Switch 1: pca 9545, Switch 2: pca 9543 */
-        unsigned device = (ctrl->channel0[0]) >> 8;
-        /* Disable all outputs on SMBus switch 1 */
-        smbus_send_byte(SMBUS_SWITCH1, 0x0);
-        /* Select SMBus switch 2 Channel 0/1 */
-        smbus_send_byte(SMBUS_SWITCH2, device);
-
-}
-
-static inline int spd_read_byte(unsigned device, unsigned address)
-{
-        return smbus_read_byte(device, address);
-}
-
-
-#include "northbridge/amd/amdk8/raminit.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
-#include "sdram/generic_sdram.c"
-
- /* tyan does not want the default */
-#include "resourcemap.c" 
-
-#include "cpu/amd/dualcore/dualcore.c"
-
-#define CHAN0 0x100
-#define CHAN1 0x200
-
-#include "cpu/amd/car/copy_and_run.c"
-#include "cpu/amd/car/post_cache_as_ram.c"
-
-#include "cpu/amd/model_fxx/init_cpus.c"
-
-#if USE_FALLBACK_IMAGE == 1
-
-#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
-#include "northbridge/amd/amdk8/early_ht.c"
-
-void failover_process(unsigned long bist, unsigned long cpu_init_detectedx)
-{
-
-        unsigned last_boot_normal_x = last_boot_normal();
-
-        /* Is this a cpu only reset? or Is this a secondary cpu? */
-        if ((cpu_init_detectedx) || (!boot_cpu())) {
-                if (last_boot_normal_x) {
-                        goto normal_image;
-                } else {
-                        goto fallback_image;
-                }
-        }
-
-        /* Nothing special needs to be done to find bus 0 */
-        /* Allow the HT devices to be found */
-
-        enumerate_ht_chain();
-
-        /* Setup the flash access */
-        amd8111_enable_rom();
-
-        /* Is this a deliberate reset by the bios */
-        if (bios_reset_detected() && last_boot_normal_x) {
-                goto normal_image;
-        }
-        /* This is the primary cpu how should I boot? */
-        else if (do_normal_boot()) {
-                goto normal_image;
-        }
-        else {
-                goto fallback_image;
-        }
- normal_image:
-        __asm__ volatile ("jmp __normal_image"
-                : /* outputs */
-                : "a" (bist), "b" (cpu_init_detectedx) /* inputs */
-                );
-
- fallback_image:
-       ;
-}
-#endif
-
-void real_main(unsigned long bist, unsigned long cpu_init_detectedx);
-
-void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
-{
-
-#if USE_FALLBACK_IMAGE == 1
-        failover_process(bist, cpu_init_detectedx);
-#endif
-        real_main(bist, cpu_init_detectedx);
-
-}
-
-
-void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
-{
-       static const uint16_t spd_addr [] = {
-               // node 0
-                 (0xa0>>1)|CHAN0, (0xa4>>1)|CHAN0, 0, 0,
-                 (0xa2>>1)|CHAN0, (0xa6>>1)|CHAN0, 0, 0,
-#if CONFIG_MAX_PHYSICAL_CPUS > 1
-               // node 1
-                 (0xa8>>1)|CHAN0, (0xac>>1)|CHAN0, 0, 0,
-                 (0xaa>>1)|CHAN0, (0xae>>1)|CHAN0, 0, 0,
-#endif
-#if CONFIG_MAX_PHYSICAL_CPUS > 2
-               // node 2
-                 (0xa8>>1)|CHAN1, (0xac>>1)|CHAN1, 0, 0,
-                 (0xaa>>1)|CHAN1, (0xae>>1)|CHAN1, 0, 0,
-               // node 3
-                 (0xa0>>1)|CHAN1, (0xa4>>1)|CHAN1, 0, 0,
-                 (0xa2>>1)|CHAN1, (0xa6>>1)|CHAN1, 0, 0,
-#endif
-       };
-
-        int needs_reset;
-       unsigned bsp_apicid = 0;
-       struct mem_controller ctrl[8];
-       unsigned nodes;
-
-        if (bist == 0) {
-               bsp_apicid = init_cpus(cpu_init_detectedx);
-        }
-
-       w83627hf_enable_serial(SERIAL_DEV, TTYS0_BASE);
-        uart_init();
-        console_init();
-
-       
-       /* Halt if there was a built in self test failure */
-       report_bist_failure(bist);
-
-       setup_aruma_resource_map();     
-
-       needs_reset = setup_coherent_ht_domain();
-
-#if CONFIG_LOGICAL_CPUS==1
-         /* here need to make sure last core0 is started, esp for two way system,
-         * (there may be apic id conflicts in that case)
-         */
-        wait_all_core0_started();
-        start_other_cores();
-#endif
-       
-       wait_all_aps_started(bsp_apicid);
-               
-        needs_reset |= ht_setup_chains_x();
-
-               if (needs_reset) {
-                       print_info("ht reset -\r\n");
-                       soft_reset();
-               }
-
-       allow_all_aps_stop(bsp_apicid);
-
-       nodes = get_nodes();
-        //It's the time to set ctrl now;
-        fill_mem_ctrl(nodes, ctrl, spd_addr);
-
-       enable_smbus();
-
-       memreset_setup();
-       sdram_initialize(nodes, ctrl);
-
-       /* Reset SMBus switches to access the ADM1026 */
-        smbus_send_byte(SMBUS_SWITCH1, 0x0);
-        smbus_send_byte(SMBUS_SWITCH2, 0x0);
-
-       post_cache_as_ram();
-
-}

diff --git a/src/mainboard/agami/aruma/chip.h b/src/mainboard/agami/aruma/chip.h
deleted file mode 100644 (file)
index 59ba671..0000000
--- a/src/mainboard/agami/aruma/chip.h
+++ /dev/null
@@ -1,4 +0,0 @@
-extern struct chip_operations mainboard_agami_aruma_ops;
-
-struct mainboard_agami_aruma_config {
-};

diff --git a/src/mainboard/agami/aruma/cmos.layout b/src/mainboard/agami/aruma/cmos.layout
deleted file mode 100644 (file)
index 13d6938..0000000
--- a/src/mainboard/agami/aruma/cmos.layout
+++ /dev/null
@@ -1,103 +0,0 @@
-entries
-
-#start-bit length  config config-ID    name
-#0            8       r       0        seconds
-#8            8       r       0        alarm_seconds
-#16           8       r       0        minutes
-#24           8       r       0        alarm_minutes
-#32           8       r       0        hours
-#40           8       r       0        alarm_hours
-#48           8       r       0        day_of_week
-#56           8       r       0        day_of_month
-#64           8       r       0        month
-#72           8       r       0        year
-#80           4       r       0        rate_select
-#84           3       r       0        REF_Clock
-#87           1       r       0        UIP
-#88           1       r       0        auto_switch_DST
-#89           1       r       0        24_hour_mode
-#90           1       r       0        binary_values_enable
-#91           1       r       0        square-wave_out_enable
-#92           1       r       0        update_finished_enable
-#93           1       r       0        alarm_interrupt_enable
-#94           1       r       0        periodic_interrupt_enable
-#95           1       r       0        disable_clock_updates
-#96         288       r       0        temporary_filler
-0          384       r       0        reserved_memory
-384          1       e       4        boot_option
-385          1       e       4        last_boot
-386          1       e       1        ECC_memory
-388          4       r       0        reboot_bits
-392          3       e       5        baud_rate
-395          1       e       1        hw_scrubber
-396          1       e       1        interleave_chip_selects
-397          2       e       8        max_mem_clock
-399         1       e       2        dual_core
-400          1       e       1        power_on_after_fail
-412          4       e       6        debug_level
-416          4       e       7        boot_first
-420          4       e       7        boot_second
-424          4       e       7        boot_third
-428          4       h       0        boot_index
-432         8       h       0        boot_countdown
-440          4       e       9        slow_cpu
-444          1       e       1        nmi
-445          1       e       1        iommu
-728        256       h       0        user_data
-984         16       h       0        check_sum
-# Reserve the extended AMD configuration registers
-1000        24       r       0        reserved_memory
-
-
-
-enumerations
-
-#ID value   text
-1     0     Disable
-1     1     Enable
-2     0     Enable
-2     1     Disable
-4     0     Fallback
-4     1     Normal
-5     0     115200
-5     1     57600
-5     2     38400
-5     3     19200
-5     4     9600
-5     5     4800
-5     6     2400
-5     7     1200
-6     1     Emergency
-6     2     Alert
-6     3     Critical
-6     4     Error
-6     5     Warning
-6     6     Notice
-6     7     Info
-6     8     Debug
-6     9     Spew
-7     0     Network
-7     1     HDD
-7     2     Floppy
-7     8     Fallback_Network
-7     9     Fallback_HDD
-7     10    Fallback_Floppy
-#7     3    ROM
-8     0     DDR400
-8     1     DDR333
-8     2     DDR266
-8     3     DDR200
-9     0     off
-9     1     87.5%
-9     2     75.0%
-9     3     62.5%
-9     4     50.0%
-9     5     37.5%
-9     6     25.0%
-9     7     12.5%
-
-checksums
-
-checksum 392 983 984
-
-

diff --git a/src/mainboard/agami/aruma/dsdt.c b/src/mainboard/agami/aruma/dsdt.c
deleted file mode 100644 (file)
index 9769c79..0000000
--- a/src/mainboard/agami/aruma/dsdt.c
+++ /dev/null
@@ -1,1980 +0,0 @@
-/*\r
- * \r
- * Intel ACPI Component Architecture\r
- * ASL Optimizing Compiler / AML Disassembler version 20050309 [Mar  9 2005]\r
- * Copyright (C) 2000 - 2005 Intel Corporation\r
- * Supports ACPI Specification Revision 3.0\r
- * \r
- * Compilation of "dsdt_PCI0fix.dsl" - Fri Apr 28 14:06:53 2006\r
- * \r
- * C source code output\r
- *\r
- */\r
-unsigned char AmlCode[] = \r
-{\r
-    0x44,0x53,0x44,0x54,0x64,0x3D,0x00,0x00,  /* 00000000    "DSDTd=.." */\r
-    0x01,0x4E,0x4C,0x58,0x42,0x49,0x4F,0x53,  /* 00000008    ".NLXBIOS" */\r
-    0x4C,0x58,0x42,0x49,0x4F,0x53,0x00,0x00,  /* 00000010    "LXBIOS.." */\r
-    0x17,0x00,0x00,0x00,0x49,0x4E,0x54,0x4C,  /* 00000018    "....INTL" */\r
-    0x09,0x03,0x05,0x20,0x5B,0x80,0x42,0x49,  /* 00000020    "... [.BI" */\r
-    0x4F,0x53,0x00,0x0C,0x78,0x56,0x34,0x12,  /* 00000028    "OS..xV4." */\r
-    0x0A,0xFF,0x5B,0x81,0x38,0x42,0x49,0x4F,  /* 00000030    "..[.8BIO" */\r
-    0x53,0x01,0x53,0x45,0x42,0x31,0x08,0x53,  /* 00000038    "S.SEB1.S" */\r
-    0x55,0x42,0x31,0x08,0x53,0x45,0x42,0x32,  /* 00000040    "UB1.SEB2" */\r
-    0x08,0x53,0x55,0x42,0x32,0x08,0x53,0x45,  /* 00000048    ".SUB2.SE" */\r
-    0x42,0x33,0x08,0x53,0x55,0x42,0x33,0x08,  /* 00000050    "B3.SUB3." */\r
-    0x53,0x45,0x42,0x34,0x08,0x53,0x55,0x42,  /* 00000058    "SEB4.SUB" */\r
-    0x34,0x08,0x53,0x45,0x42,0x35,0x08,0x53,  /* 00000060    "4.SEB5.S" */\r
-    0x55,0x42,0x35,0x08,0x08,0x53,0x53,0x31,  /* 00000068    "UB5..SS1" */\r
-    0x5F,0x01,0x08,0x53,0x53,0x32,0x5F,0x00,  /* 00000070    "_..SS2_." */\r
-    0x08,0x53,0x53,0x33,0x5F,0x00,0x08,0x53,  /* 00000078    ".SS3_..S" */\r
-    0x53,0x34,0x5F,0x01,0x08,0x4D,0x47,0x31,  /* 00000080    "S4_..MG1" */\r
-    0x42,0x00,0x08,0x4D,0x47,0x31,0x4C,0x00,  /* 00000088    "B..MG1L." */\r
-    0x08,0x4D,0x47,0x32,0x42,0x0C,0x00,0x00,  /* 00000090    ".MG2B..." */\r
-    0x00,0xAE,0x08,0x4D,0x47,0x32,0x4C,0x0C,  /* 00000098    "...MG2L." */\r
-    0x00,0x00,0x00,0x52,0x08,0x4D,0x47,0x33,  /* 000000A0    "...R.MG3" */\r
-    0x42,0x0C,0x00,0x00,0x00,0xB1,0x08,0x4D,  /* 000000A8    "B......M" */\r
-    0x47,0x33,0x4C,0x0C,0x00,0x00,0xC0,0x00,  /* 000000B0    "G3L....." */\r
-    0x08,0x4D,0x47,0x34,0x42,0x0C,0x00,0x00,  /* 000000B8    ".MG4B..." */\r
-    0xC0,0xB1,0x08,0x4D,0x47,0x34,0x4C,0x0C,  /* 000000C0    "...MG4L." */\r
-    0x00,0x00,0x80,0x02,0x08,0x4D,0x47,0x35,  /* 000000C8    ".....MG5" */\r
-    0x42,0x0C,0x00,0x00,0x40,0xB4,0x08,0x4D,  /* 000000D0    "B...@..M" */\r
-    0x47,0x35,0x4C,0x0C,0x00,0x00,0x80,0x4A,  /* 000000D8    "G5L....J" */\r
-    0x08,0x56,0x47,0x41,0x4F,0x00,0x08,0x49,  /* 000000E0    ".VGAO..I" */\r
-    0x4F,0x42,0x30,0x0B,0x00,0xA0,0x08,0x49,  /* 000000E8    "OB0....I" */\r
-    0x4F,0x4C,0x30,0x0B,0x00,0x10,0x08,0x49,  /* 000000F0    "OL0....I" */\r
-    0x4F,0x42,0x31,0x0B,0x00,0xB0,0x08,0x49,  /* 000000F8    "OB1....I" */\r
-    0x4F,0x4C,0x31,0x0B,0x00,0x20,0x08,0x49,  /* 00000100    "OL1.. .I" */\r
-    0x4F,0x42,0x32,0x00,0x08,0x49,0x4F,0x4C,  /* 00000108    "OB2..IOL" */\r
-    0x32,0x00,0x08,0x49,0x4F,0x42,0x33,0x00,  /* 00000110    "2..IOB3." */\r
-    0x08,0x49,0x4F,0x4C,0x33,0x00,0x08,0x49,  /* 00000118    ".IOL3..I" */\r
-    0x4F,0x53,0x54,0x0A,0x0B,0x08,0x52,0x4F,  /* 00000120    "OST...RO" */\r
-    0x4D,0x53,0x0C,0x00,0x00,0xF8,0xFF,0x08,  /* 00000128    "MS......" */\r
-    0x53,0x50,0x49,0x4F,0x0A,0x2E,0x08,0x49,  /* 00000130    "SPIO...I" */\r
-    0x4F,0x31,0x42,0x0B,0x80,0x06,0x08,0x49,  /* 00000138    "O1B....I" */\r
-    0x4F,0x31,0x4C,0x0A,0x80,0x08,0x50,0x4D,  /* 00000140    "O1L...PM" */\r
-    0x42,0x53,0x0B,0x00,0x50,0x08,0x50,0x4D,  /* 00000148    "BS..P.PM" */\r
-    0x4C,0x4E,0x0A,0xC0,0x08,0x47,0x50,0x42,  /* 00000150    "LN...GPB" */\r
-    0x53,0x0B,0xC0,0x50,0x08,0x47,0x50,0x4C,  /* 00000158    "S..P.GPL" */\r
-    0x4E,0x0A,0x20,0x08,0x53,0x4D,0x42,0x53,  /* 00000160    "N. .SMBS" */\r
-    0x0B,0xE0,0x50,0x08,0x53,0x4D,0x42,0x4C,  /* 00000168    "..P.SMBL" */\r
-    0x0A,0x20,0x08,0x41,0x50,0x43,0x42,0x0C,  /* 00000170    ". .APCB." */\r
-    0x00,0x00,0xC0,0xFE,0x08,0x41,0x50,0x43,  /* 00000178    ".....APC" */\r
-    0x4C,0x0B,0x00,0x10,0x14,0x0F,0x52,0x52,  /* 00000180    "L.....RR" */\r
-    0x49,0x4F,0x04,0x70,0x0D,0x52,0x52,0x49,  /* 00000188    "IO.p.RRI" */\r
-    0x4F,0x00,0x5B,0x31,0x14,0x0F,0x52,0x44,  /* 00000190    "O.[1..RD" */\r
-    0x4D,0x41,0x03,0x70,0x0D,0x72,0x44,0x4D,  /* 00000198    "MA.p.rDM" */\r
-    0x41,0x00,0x5B,0x31,0x08,0x50,0x49,0x43,  /* 000001A0    "A.[1.PIC" */\r
-    0x4D,0x00,0x14,0x48,0x04,0x5F,0x50,0x49,  /* 000001A8    "M..H._PI" */\r
-    0x43,0x01,0xA0,0x09,0x68,0x70,0x0A,0xAA,  /* 000001B0    "C...hp.." */\r
-    0x44,0x42,0x47,0x38,0xA1,0x08,0x70,0x0A,  /* 000001B8    "DBG8..p." */\r
-    0x55,0x44,0x42,0x47,0x38,0x5C,0x2F,0x04,  /* 000001C0    "UDBG8\/." */\r
-    0x5F,0x53,0x42,0x5F,0x50,0x43,0x49,0x41,  /* 000001C8    "_SB_PCIA" */\r
-    0x47,0x4F,0x4C,0x41,0x50,0x43,0x4D,0x5F,  /* 000001D0    "GOLAPCM_" */\r
-    0x68,0x5C,0x2F,0x04,0x5F,0x53,0x42,0x5F,  /* 000001D8    "h\/._SB_" */\r
-    0x50,0x43,0x49,0x41,0x47,0x4F,0x4C,0x42,  /* 000001E0    "PCIAGOLB" */\r
-    0x50,0x43,0x4D,0x5F,0x68,0x70,0x68,0x50,  /* 000001E8    "PCM_hphP" */\r
-    0x49,0x43,0x4D,0x08,0x4F,0x53,0x56,0x52,  /* 000001F0    "ICM.OSVR" */\r
-    0xFF,0x14,0x1F,0x4F,0x53,0x46,0x4C,0x00,  /* 000001F8    "...OSFL." */\r
-    0xA0,0x0D,0x92,0x93,0x4F,0x53,0x56,0x52,  /* 00000200    "....OSVR" */\r
-    0xFF,0xA4,0x4F,0x53,0x56,0x52,0x70,0x01,  /* 00000208    "..OSVRp." */\r
-    0x4F,0x53,0x56,0x52,0xA4,0x4F,0x53,0x56,  /* 00000210    "OSVR.OSV" */\r
-    0x52,0x14,0x4E,0x04,0x4D,0x43,0x54,0x48,  /* 00000218    "R.N.MCTH" */\r
-    0x02,0xA0,0x08,0x95,0x87,0x68,0x87,0x69,  /* 00000220    ".....h.i" */\r
-    0xA4,0x00,0x72,0x87,0x68,0x01,0x60,0x08,  /* 00000228    "..r.h.`." */\r
-    0x42,0x55,0x46,0x30,0x11,0x02,0x60,0x08,  /* 00000230    "BUF0..`." */\r
-    0x42,0x55,0x46,0x31,0x11,0x02,0x60,0x70,  /* 00000238    "BUF1..`p" */\r
-    0x68,0x42,0x55,0x46,0x30,0x70,0x69,0x42,  /* 00000240    "hBUF0piB" */\r
-    0x55,0x46,0x31,0xA2,0x1A,0x60,0x76,0x60,  /* 00000248    "UF1..`v`" */\r
-    0xA0,0x15,0x92,0x93,0x83,0x88,0x42,0x55,  /* 00000250    "......BU" */\r
-    0x46,0x30,0x60,0x00,0x83,0x88,0x42,0x55,  /* 00000258    "F0`...BU" */\r
-    0x46,0x31,0x60,0x00,0xA4,0x00,0xA4,0x01,  /* 00000260    "F1`....." */\r
-    0x14,0x49,0x08,0x47,0x50,0x52,0x57,0x02,  /* 00000268    ".I.GPRW." */\r
-    0x08,0x50,0x52,0x57,0x50,0x12,0x04,0x02,  /* 00000270    ".PRWP..." */\r
-    0x00,0x00,0x70,0x68,0x88,0x50,0x52,0x57,  /* 00000278    "..ph.PRW" */\r
-    0x50,0x00,0x00,0x70,0x69,0x88,0x50,0x52,  /* 00000280    "P..pi.PR" */\r
-    0x57,0x50,0x01,0x00,0x70,0x00,0x60,0x7D,  /* 00000288    "WP..p.`}" */\r
-    0x60,0x79,0x53,0x53,0x31,0x5F,0x01,0x00,  /* 00000290    "`ySS1_.." */\r
-    0x60,0x7D,0x60,0x79,0x53,0x53,0x32,0x5F,  /* 00000298    "`}`ySS2_" */\r
-    0x0A,0x02,0x00,0x60,0x7D,0x60,0x79,0x53,  /* 000002A0    "...`}`yS" */\r
-    0x53,0x33,0x5F,0x0A,0x03,0x00,0x60,0x7D,  /* 000002A8    "S3_...`}" */\r
-    0x60,0x79,0x53,0x53,0x34,0x5F,0x0A,0x04,  /* 000002B0    "`ySS4_.." */\r
-    0x00,0x60,0xA0,0x08,0x7B,0x79,0x01,0x69,  /* 000002B8    ".`..{y.i" */\r
-    0x00,0x60,0x00,0xA1,0x29,0x7A,0x60,0x01,  /* 000002C0    ".`..)z`." */\r
-    0x60,0xA0,0x18,0x91,0x93,0x4F,0x53,0x46,  /* 000002C8    "`....OSF" */\r
-    0x4C,0x01,0x93,0x4F,0x53,0x46,0x4C,0x0A,  /* 000002D0    "L..OSFL." */\r
-    0x02,0x81,0x60,0x88,0x50,0x52,0x57,0x50,  /* 000002D8    "..`.PRWP" */\r
-    0x01,0x00,0xA1,0x0A,0x82,0x60,0x88,0x50,  /* 000002E0    ".....`.P" */\r
-    0x52,0x57,0x50,0x01,0x00,0xA4,0x50,0x52,  /* 000002E8    "RWP...PR" */\r
-    0x57,0x50,0x08,0x57,0x41,0x4B,0x50,0x12,  /* 000002F0    "WP.WAKP." */\r
-    0x04,0x02,0x00,0x00,0x5B,0x80,0x44,0x45,  /* 000002F8    "....[.DE" */\r
-    0x42,0x30,0x01,0x0A,0x80,0x01,0x5B,0x81,  /* 00000300    "B0....[." */\r
-    0x0B,0x44,0x45,0x42,0x30,0x01,0x44,0x42,  /* 00000308    ".DEB0.DB" */\r
-    0x47,0x38,0x08,0x5B,0x80,0x44,0x45,0x42,  /* 00000310    "G8.[.DEB" */\r
-    0x31,0x01,0x0A,0x90,0x0A,0x02,0x5B,0x81,  /* 00000318    "1.....[." */\r
-    0x0B,0x44,0x45,0x42,0x31,0x02,0x44,0x42,  /* 00000320    ".DEB1.DB" */\r
-    0x47,0x39,0x10,0x10,0x39,0x5F,0x50,0x52,  /* 00000328    "G9..9_PR" */\r
-    0x5F,0x5B,0x83,0x0B,0x43,0x50,0x55,0x31,  /* 00000330    "_[..CPU1" */\r
-    0x01,0x00,0x00,0x00,0x00,0x00,0x5B,0x83,  /* 00000338    "......[." */\r
-    0x0B,0x43,0x50,0x55,0x32,0x02,0x00,0x00,  /* 00000340    ".CPU2..." */\r
-    0x00,0x00,0x00,0x5B,0x83,0x0B,0x43,0x50,  /* 00000348    "...[..CP" */\r
-    0x55,0x33,0x03,0x00,0x00,0x00,0x00,0x00,  /* 00000350    "U3......" */\r
-    0x5B,0x83,0x0B,0x43,0x50,0x55,0x34,0x04,  /* 00000358    "[..CPU4." */\r
-    0x00,0x00,0x00,0x00,0x00,0x10,0x89,0x79,  /* 00000360    ".......y" */\r
-    0x02,0x5F,0x53,0x42,0x5F,0x08,0x50,0x52,  /* 00000368    "._SB_.PR" */\r
-    0x30,0x30,0x12,0x3C,0x04,0x12,0x0D,0x04,  /* 00000370    "00.<...." */\r
-    0x0C,0xFF,0xFF,0x07,0x00,0x00,0x4C,0x4E,  /* 00000378    "......LN" */\r
-    0x4B,0x41,0x00,0x12,0x0D,0x04,0x0C,0xFF,  /* 00000380    "KA......" */\r
-    0xFF,0x07,0x00,0x01,0x4C,0x4E,0x4B,0x42,  /* 00000388    "....LNKB" */\r
-    0x00,0x12,0x0E,0x04,0x0C,0xFF,0xFF,0x07,  /* 00000390    "........" */\r
-    0x00,0x0A,0x02,0x4C,0x4E,0x4B,0x43,0x00,  /* 00000398    "...LNKC." */\r
-    0x12,0x0E,0x04,0x0C,0xFF,0xFF,0x07,0x00,  /* 000003A0    "........" */\r
-    0x0A,0x03,0x4C,0x4E,0x4B,0x44,0x00,0x08,  /* 000003A8    "..LNKD.." */\r
-    0x41,0x52,0x30,0x30,0x12,0x34,0x04,0x12,  /* 000003B0    "AR00.4.." */\r
-    0x0B,0x04,0x0C,0xFF,0xFF,0x07,0x00,0x00,  /* 000003B8    "........" */\r
-    0x00,0x0A,0x10,0x12,0x0B,0x04,0x0C,0xFF,  /* 000003C0    "........" */\r
-    0xFF,0x07,0x00,0x01,0x00,0x0A,0x11,0x12,  /* 000003C8    "........" */\r
-    0x0C,0x04,0x0C,0xFF,0xFF,0x07,0x00,0x0A,  /* 000003D0    "........" */\r
-    0x02,0x00,0x0A,0x12,0x12,0x0C,0x04,0x0C,  /* 000003D8    "........" */\r
-    0xFF,0xFF,0x07,0x00,0x0A,0x03,0x00,0x0A,  /* 000003E0    "........" */\r
-    0x13,0x08,0x50,0x52,0x30,0x31,0x12,0x2B,  /* 000003E8    "..PR01.+" */\r
-    0x03,0x12,0x0C,0x04,0x0B,0xFF,0xFF,0x0A,  /* 000003F0    "........" */\r
-    0x03,0x4C,0x4E,0x4B,0x44,0x00,0x12,0x0D,  /* 000003F8    ".LNKD..." */\r
-    0x04,0x0C,0xFF,0xFF,0x04,0x00,0x00,0x4C,  /* 00000400    ".......L" */\r
-    0x4E,0x4B,0x41,0x00,0x12,0x0D,0x04,0x0C,  /* 00000408    "NKA....." */\r
-    0xFF,0xFF,0x05,0x00,0x00,0x4C,0x4E,0x4B,  /* 00000410    ".....LNK" */\r
-    0x42,0x00,0x08,0x41,0x52,0x30,0x31,0x12,  /* 00000418    "B..AR01." */\r
-    0x25,0x03,0x12,0x0A,0x04,0x0B,0xFF,0xFF,  /* 00000420    "%......." */\r
-    0x0A,0x03,0x00,0x0A,0x13,0x12,0x0B,0x04,  /* 00000428    "........" */\r
-    0x0C,0xFF,0xFF,0x04,0x00,0x00,0x00,0x0A,  /* 00000430    "........" */\r
-    0x10,0x12,0x0B,0x04,0x0C,0xFF,0xFF,0x05,  /* 00000438    "........" */\r
-    0x00,0x00,0x00,0x0A,0x11,0x08,0x50,0x52,  /* 00000440    "......PR" */\r
-    0x35,0x32,0x12,0x49,0x05,0x06,0x12,0x0D,  /* 00000448    "52.I...." */\r
-    0x04,0x0C,0xFF,0xFF,0x01,0x00,0x00,0x4C,  /* 00000450    ".......L" */\r
-    0x4E,0x4B,0x42,0x00,0x12,0x0D,0x04,0x0C,  /* 00000458    "NKB....." */\r
-    0xFF,0xFF,0x01,0x00,0x01,0x4C,0x4E,0x4B,  /* 00000460    ".....LNK" */\r
-    0x43,0x00,0x12,0x0E,0x04,0x0C,0xFF,0xFF,  /* 00000468    "C......." */\r
-    0x01,0x00,0x0A,0x02,0x4C,0x4E,0x4B,0x44,  /* 00000470    "....LNKD" */\r
-    0x00,0x12,0x0E,0x04,0x0C,0xFF,0xFF,0x01,  /* 00000478    "........" */\r
-    0x00,0x0A,0x03,0x4C,0x4E,0x4B,0x41,0x00,  /* 00000480    "...LNKA." */\r
-    0x12,0x0D,0x04,0x0C,0xFF,0xFF,0x02,0x00,  /* 00000488    "........" */\r
-    0x00,0x4C,0x4E,0x4B,0x43,0x00,0x12,0x0D,  /* 00000490    ".LNKC..." */\r
-    0x04,0x0C,0xFF,0xFF,0x02,0x00,0x01,0x4C,  /* 00000498    ".......L" */\r
-    0x4E,0x4B,0x44,0x00,0x08,0x41,0x52,0x35,  /* 000004A0    "NKD..AR5" */\r
-    0x32,0x12,0x4D,0x04,0x06,0x12,0x0B,0x04,  /* 000004A8    "2.M....." */\r
-    0x0C,0xFF,0xFF,0x01,0x00,0x00,0x00,0x0A,  /* 000004B0    "........" */\r
-    0x21,0x12,0x0B,0x04,0x0C,0xFF,0xFF,0x01,  /* 000004B8    "!......." */\r
-    0x00,0x01,0x00,0x0A,0x22,0x12,0x0C,0x04,  /* 000004C0    "...."..." */\r
-    0x0C,0xFF,0xFF,0x01,0x00,0x0A,0x02,0x00,  /* 000004C8    "........" */\r
-    0x0A,0x23,0x12,0x0C,0x04,0x0C,0xFF,0xFF,  /* 000004D0    ".#......" */\r
-    0x01,0x00,0x0A,0x03,0x00,0x0A,0x20,0x12,  /* 000004D8    "...... ." */\r
-    0x0B,0x04,0x0C,0xFF,0xFF,0x02,0x00,0x00,  /* 000004E0    "........" */\r
-    0x00,0x0A,0x22,0x12,0x0B,0x04,0x0C,0xFF,  /* 000004E8    ".."....." */\r
-    0xFF,0x02,0x00,0x01,0x00,0x0A,0x23,0x08,  /* 000004F0    "......#." */\r
-    0x50,0x52,0x35,0x33,0x12,0x49,0x05,0x06,  /* 000004F8    "PR53.I.." */\r
-    0x12,0x0D,0x04,0x0C,0xFF,0xFF,0x01,0x00,  /* 00000500    "........" */\r
-    0x00,0x4C,0x4E,0x4B,0x42,0x00,0x12,0x0D,  /* 00000508    ".LNKB..." */\r
-    0x04,0x0C,0xFF,0xFF,0x01,0x00,0x01,0x4C,  /* 00000510    ".......L" */\r
-    0x4E,0x4B,0x43,0x00,0x12,0x0E,0x04,0x0C,  /* 00000518    "NKC....." */\r
-    0xFF,0xFF,0x01,0x00,0x0A,0x02,0x4C,0x4E,  /* 00000520    "......LN" */\r
-    0x4B,0x44,0x00,0x12,0x0E,0x04,0x0C,0xFF,  /* 00000528    "KD......" */\r
-    0xFF,0x01,0x00,0x0A,0x03,0x4C,0x4E,0x4B,  /* 00000530    ".....LNK" */\r
-    0x41,0x00,0x12,0x0D,0x04,0x0C,0xFF,0xFF,  /* 00000538    "A......." */\r
-    0x02,0x00,0x00,0x4C,0x4E,0x4B,0x43,0x00,  /* 00000540    "...LNKC." */\r
-    0x12,0x0D,0x04,0x0C,0xFF,0xFF,0x02,0x00,  /* 00000548    "........" */\r
-    0x01,0x4C,0x4E,0x4B,0x44,0x00,0x08,0x41,  /* 00000550    ".LNKD..A" */\r
-    0x52,0x35,0x33,0x12,0x4D,0x04,0x06,0x12,  /* 00000558    "R53.M..." */\r
-    0x0B,0x04,0x0C,0xFF,0xFF,0x01,0x00,0x00,  /* 00000560    "........" */\r
-    0x00,0x0A,0x25,0x12,0x0B,0x04,0x0C,0xFF,  /* 00000568    "..%....." */\r
-    0xFF,0x01,0x00,0x01,0x00,0x0A,0x26,0x12,  /* 00000570    "......&." */\r
-    0x0C,0x04,0x0C,0xFF,0xFF,0x01,0x00,0x0A,  /* 00000578    "........" */\r
-    0x02,0x00,0x0A,0x27,0x12,0x0C,0x04,0x0C,  /* 00000580    "...'...." */\r
-    0xFF,0xFF,0x01,0x00,0x0A,0x03,0x00,0x0A,  /* 00000588    "........" */\r
-    0x24,0x12,0x0B,0x04,0x0C,0xFF,0xFF,0x02,  /* 00000590    "$......." */\r
-    0x00,0x00,0x00,0x0A,0x26,0x12,0x0B,0x04,  /* 00000598    "....&..." */\r
-    0x0C,0xFF,0xFF,0x02,0x00,0x01,0x00,0x0A,  /* 000005A0    "........" */\r
-    0x27,0x08,0x50,0x52,0x35,0x34,0x12,0x49,  /* 000005A8    "'.PR54.I" */\r
-    0x05,0x06,0x12,0x0D,0x04,0x0C,0xFF,0xFF,  /* 000005B0    "........" */\r
-    0x01,0x00,0x00,0x4C,0x4E,0x4B,0x42,0x00,  /* 000005B8    "...LNKB." */\r
-    0x12,0x0D,0x04,0x0C,0xFF,0xFF,0x01,0x00,  /* 000005C0    "........" */\r
-    0x01,0x4C,0x4E,0x4B,0x43,0x00,0x12,0x0E,  /* 000005C8    ".LNKC..." */\r
-    0x04,0x0C,0xFF,0xFF,0x01,0x00,0x0A,0x02,  /* 000005D0    "........" */\r
-    0x4C,0x4E,0x4B,0x44,0x00,0x12,0x0E,0x04,  /* 000005D8    "LNKD...." */\r
-    0x0C,0xFF,0xFF,0x01,0x00,0x0A,0x03,0x4C,  /* 000005E0    ".......L" */\r
-    0x4E,0x4B,0x41,0x00,0x12,0x0D,0x04,0x0C,  /* 000005E8    "NKA....." */\r
-    0xFF,0xFF,0x02,0x00,0x00,0x4C,0x4E,0x4B,  /* 000005F0    ".....LNK" */\r
-    0x43,0x00,0x12,0x0D,0x04,0x0C,0xFF,0xFF,  /* 000005F8    "C......." */\r
-    0x02,0x00,0x01,0x4C,0x4E,0x4B,0x44,0x00,  /* 00000600    "...LNKD." */\r
-    0x08,0x41,0x52,0x35,0x34,0x12,0x4D,0x04,  /* 00000608    ".AR54.M." */\r
-    0x06,0x12,0x0B,0x04,0x0C,0xFF,0xFF,0x01,  /* 00000610    "........" */\r
-    0x00,0x00,0x00,0x0A,0x29,0x12,0x0B,0x04,  /* 00000618    "....)..." */\r
-    0x0C,0xFF,0xFF,0x01,0x00,0x01,0x00,0x0A,  /* 00000620    "........" */\r
-    0x2A,0x12,0x0C,0x04,0x0C,0xFF,0xFF,0x01,  /* 00000628    "*......." */\r
-    0x00,0x0A,0x02,0x00,0x0A,0x2B,0x12,0x0C,  /* 00000630    ".....+.." */\r
-    0x04,0x0C,0xFF,0xFF,0x01,0x00,0x0A,0x03,  /* 00000638    "........" */\r
-    0x00,0x0A,0x28,0x12,0x0B,0x04,0x0C,0xFF,  /* 00000640    "..(....." */\r
-    0xFF,0x02,0x00,0x00,0x00,0x0A,0x2A,0x12,  /* 00000648    "......*." */\r
-    0x0B,0x04,0x0C,0xFF,0xFF,0x02,0x00,0x01,  /* 00000650    "........" */\r
-    0x00,0x0A,0x2B,0x08,0x50,0x52,0x35,0x35,  /* 00000658    "..+.PR55" */\r
-    0x12,0x49,0x05,0x06,0x12,0x0D,0x04,0x0C,  /* 00000660    ".I......" */\r
-    0xFF,0xFF,0x01,0x00,0x00,0x4C,0x4E,0x4B,  /* 00000668    ".....LNK" */\r
-    0x42,0x00,0x12,0x0D,0x04,0x0C,0xFF,0xFF,  /* 00000670    "B......." */\r
-    0x01,0x00,0x01,0x4C,0x4E,0x4B,0x43,0x00,  /* 00000678    "...LNKC." */\r
-    0x12,0x0E,0x04,0x0C,0xFF,0xFF,0x01,0x00,  /* 00000680    "........" */\r
-    0x0A,0x02,0x4C,0x4E,0x4B,0x44,0x00,0x12,  /* 00000688    "..LNKD.." */\r
-    0x0E,0x04,0x0C,0xFF,0xFF,0x01,0x00,0x0A,  /* 00000690    "........" */\r
-    0x03,0x4C,0x4E,0x4B,0x41,0x00,0x12,0x0D,  /* 00000698    ".LNKA..." */\r
-    0x04,0x0C,0xFF,0xFF,0x02,0x00,0x00,0x4C,  /* 000006A0    ".......L" */\r
-    0x4E,0x4B,0x43,0x00,0x12,0x0D,0x04,0x0C,  /* 000006A8    "NKC....." */\r
-    0xFF,0xFF,0x02,0x00,0x01,0x4C,0x4E,0x4B,  /* 000006B0    ".....LNK" */\r
-    0x44,0x00,0x08,0x41,0x52,0x35,0x35,0x12,  /* 000006B8    "D..AR55." */\r
-    0x4D,0x04,0x06,0x12,0x0B,0x04,0x0C,0xFF,  /* 000006C0    "M......." */\r
-    0xFF,0x01,0x00,0x00,0x00,0x0A,0x2D,0x12,  /* 000006C8    "......-." */\r
-    0x0B,0x04,0x0C,0xFF,0xFF,0x01,0x00,0x01,  /* 000006D0    "........" */\r
-    0x00,0x0A,0x2E,0x12,0x0C,0x04,0x0C,0xFF,  /* 000006D8    "........" */\r
-    0xFF,0x01,0x00,0x0A,0x02,0x00,0x0A,0x2F,  /* 000006E0    "......./" */\r
-    0x12,0x0C,0x04,0x0C,0xFF,0xFF,0x01,0x00,  /* 000006E8    "........" */\r
-    0x0A,0x03,0x00,0x0A,0x2C,0x12,0x0B,0x04,  /* 000006F0    "....,..." */\r
-    0x0C,0xFF,0xFF,0x02,0x00,0x00,0x00,0x0A,  /* 000006F8    "........" */\r
-    0x2E,0x12,0x0B,0x04,0x0C,0xFF,0xFF,0x02,  /* 00000700    "........" */\r
-    0x00,0x01,0x00,0x0A,0x2F,0x08,0x50,0x52,  /* 00000708    "..../.PR" */\r
-    0x35,0x36,0x12,0x1E,0x02,0x12,0x0D,0x04,  /* 00000710    "56......" */\r
-    0x0C,0xFF,0xFF,0x01,0x00,0x00,0x4C,0x4E,  /* 00000718    "......LN" */\r
-    0x4B,0x41,0x00,0x12,0x0D,0x04,0x0C,0xFF,  /* 00000720    "KA......" */\r
-    0xFF,0x02,0x00,0x00,0x4C,0x4E,0x4B,0x42,  /* 00000728    "....LNKB" */\r
-    0x00,0x08,0x41,0x52,0x35,0x36,0x12,0x1A,  /* 00000730    "..AR56.." */\r
-    0x02,0x12,0x0B,0x04,0x0C,0xFF,0xFF,0x01,  /* 00000738    "........" */\r
-    0x00,0x00,0x00,0x0A,0x30,0x12,0x0B,0x04,  /* 00000740    "....0..." */\r
-    0x0C,0xFF,0xFF,0x02,0x00,0x00,0x00,0x0A,  /* 00000748    "........" */\r
-    0x31,0x08,0x50,0x52,0x35,0x37,0x12,0x3C,  /* 00000750    "1.PR57.<" */\r
-    0x04,0x12,0x0D,0x04,0x0C,0xFF,0xFF,0x01,  /* 00000758    "........" */\r
-    0x00,0x00,0x4C,0x4E,0x4B,0x41,0x00,0x12,  /* 00000760    "..LNKA.." */\r
-    0x0D,0x04,0x0C,0xFF,0xFF,0x01,0x00,0x01,  /* 00000768    "........" */\r
-    0x4C,0x4E,0x4B,0x42,0x00,0x12,0x0E,0x04,  /* 00000770    "LNKB...." */\r
-    0x0C,0xFF,0xFF,0x01,0x00,0x0A,0x02,0x4C,  /* 00000778    ".......L" */\r
-    0x4E,0x4B,0x43,0x00,0x12,0x0E,0x04,0x0C,  /* 00000780    "NKC....." */\r
-    0xFF,0xFF,0x01,0x00,0x0A,0x03,0x4C,0x4E,  /* 00000788    "......LN" */\r
-    0x4B,0x44,0x00,0x08,0x41,0x52,0x35,0x37,  /* 00000790    "KD..AR57" */\r
-    0x12,0x34,0x04,0x12,0x0B,0x04,0x0C,0xFF,  /* 00000798    ".4......" */\r
-    0xFF,0x01,0x00,0x00,0x00,0x0A,0x34,0x12,  /* 000007A0    "......4." */\r
-    0x0B,0x04,0x0C,0xFF,0xFF,0x01,0x00,0x01,  /* 000007A8    "........" */\r
-    0x00,0x0A,0x35,0x12,0x0C,0x04,0x0C,0xFF,  /* 000007B0    "..5....." */\r
-    0xFF,0x01,0x00,0x0A,0x02,0x00,0x0A,0x36,  /* 000007B8    ".......6" */\r
-    0x12,0x0C,0x04,0x0C,0xFF,0xFF,0x01,0x00,  /* 000007C0    "........" */\r
-    0x0A,0x03,0x00,0x0A,0x37,0x08,0x50,0x52,  /* 000007C8    "....7.PR" */\r
-    0x35,0x38,0x12,0x10,0x01,0x12,0x0D,0x04,  /* 000007D0    "58......" */\r
-    0x0C,0xFF,0xFF,0x01,0x00,0x00,0x4C,0x4E,  /* 000007D8    "......LN" */\r
-    0x4B,0x41,0x00,0x08,0x41,0x52,0x35,0x38,  /* 000007E0    "KA..AR58" */\r
-    0x12,0x0E,0x01,0x12,0x0B,0x04,0x0C,0xFF,  /* 000007E8    "........" */\r
-    0xFF,0x01,0x00,0x00,0x00,0x0A,0x38,0x08,  /* 000007F0    "......8." */\r
-    0x50,0x52,0x35,0x39,0x12,0x3C,0x04,0x12,  /* 000007F8    "PR59.<.." */\r
-    0x0D,0x04,0x0C,0xFF,0xFF,0x01,0x00,0x00,  /* 00000800    "........" */\r
-    0x4C,0x4E,0x4B,0x41,0x00,0x12,0x0D,0x04,  /* 00000808    "LNKA...." */\r
-    0x0C,0xFF,0xFF,0x01,0x00,0x01,0x4C,0x4E,  /* 00000810    "......LN" */\r
-    0x4B,0x42,0x00,0x12,0x0E,0x04,0x0C,0xFF,  /* 00000818    "KB......" */\r
-    0xFF,0x01,0x00,0x0A,0x02,0x4C,0x4E,0x4B,  /* 00000820    ".....LNK" */\r
-    0x43,0x00,0x12,0x0E,0x04,0x0C,0xFF,0xFF,  /* 00000828    "C......." */\r
-    0x01,0x00,0x0A,0x03,0x4C,0x4E,0x4B,0x44,  /* 00000830    "....LNKD" */\r
-    0x00,0x08,0x41,0x52,0x35,0x39,0x12,0x34,  /* 00000838    "..AR59.4" */\r
-    0x04,0x12,0x0B,0x04,0x0C,0xFF,0xFF,0x01,  /* 00000840    "........" */\r
-    0x00,0x00,0x00,0x0A,0x3C,0x12,0x0B,0x04,  /* 00000848    "....<..." */\r
-    0x0C,0xFF,0xFF,0x01,0x00,0x01,0x00,0x0A,  /* 00000850    "........" */\r
-    0x3D,0x12,0x0C,0x04,0x0C,0xFF,0xFF,0x01,  /* 00000858    "=......." */\r
-    0x00,0x0A,0x02,0x00,0x0A,0x3E,0x12,0x0C,  /* 00000860    ".....>.." */\r
-    0x04,0x0C,0xFF,0xFF,0x01,0x00,0x0A,0x03,  /* 00000868    "........" */\r
-    0x00,0x0A,0x3F,0x08,0x50,0x52,0x35,0x41,  /* 00000870    "..?.PR5A" */\r
-    0x12,0x1E,0x02,0x12,0x0D,0x04,0x0C,0xFF,  /* 00000878    "........" */\r
-    0xFF,0x01,0x00,0x00,0x4C,0x4E,0x4B,0x41,  /* 00000880    "....LNKA" */\r
-    0x00,0x12,0x0D,0x04,0x0C,0xFF,0xFF,0x02,  /* 00000888    "........" */\r
-    0x00,0x00,0x4C,0x4E,0x4B,0x42,0x00,0x08,  /* 00000890    "..LNKB.." */\r
-    0x41,0x52,0x35,0x41,0x12,0x1A,0x02,0x12,  /* 00000898    "AR5A...." */\r
-    0x0B,0x04,0x0C,0xFF,0xFF,0x01,0x00,0x00,  /* 000008A0    "........" */\r
-    0x00,0x0A,0x40,0x12,0x0B,0x04,0x0C,0xFF,  /* 000008A8    "..@....." */\r
-    0xFF,0x02,0x00,0x00,0x00,0x0A,0x41,0x08,  /* 000008B0    "......A." */\r
-    0x50,0x52,0x35,0x42,0x12,0x3C,0x04,0x12,  /* 000008B8    "PR5B.<.." */\r
-    0x0D,0x04,0x0C,0xFF,0xFF,0x01,0x00,0x00,  /* 000008C0    "........" */\r
-    0x4C,0x4E,0x4B,0x41,0x00,0x12,0x0D,0x04,  /* 000008C8    "LNKA...." */\r
-    0x0C,0xFF,0xFF,0x01,0x00,0x01,0x4C,0x4E,  /* 000008D0    "......LN" */\r
-    0x4B,0x42,0x00,0x12,0x0E,0x04,0x0C,0xFF,  /* 000008D8    "KB......" */\r
-    0xFF,0x01,0x00,0x0A,0x02,0x4C,0x4E,0x4B,  /* 000008E0    ".....LNK" */\r
-    0x43,0x00,0x12,0x0E,0x04,0x0C,0xFF,0xFF,  /* 000008E8    "C......." */\r
-    0x01,0x00,0x0A,0x03,0x4C,0x4E,0x4B,0x44,  /* 000008F0    "....LNKD" */\r
-    0x00,0x08,0x41,0x52,0x35,0x42,0x12,0x34,  /* 000008F8    "..AR5B.4" */\r
-    0x04,0x12,0x0B,0x04,0x0C,0xFF,0xFF,0x01,  /* 00000900    "........" */\r
-    0x00,0x00,0x00,0x0A,0x44,0x12,0x0B,0x04,  /* 00000908    "....D..." */\r
-    0x0C,0xFF,0xFF,0x01,0x00,0x01,0x00,0x0A,  /* 00000910    "........" */\r
-    0x45,0x12,0x0C,0x04,0x0C,0xFF,0xFF,0x01,  /* 00000918    "E......." */\r
-    0x00,0x0A,0x02,0x00,0x0A,0x46,0x12,0x0C,  /* 00000920    ".....F.." */\r
-    0x04,0x0C,0xFF,0xFF,0x01,0x00,0x0A,0x03,  /* 00000928    "........" */\r
-    0x00,0x0A,0x47,0x08,0x50,0x52,0x35,0x43,  /* 00000930    "..G.PR5C" */\r
-    0x12,0x10,0x01,0x12,0x0D,0x04,0x0C,0xFF,  /* 00000938    "........" */\r
-    0xFF,0x01,0x00,0x00,0x4C,0x4E,0x4B,0x41,  /* 00000940    "....LNKA" */\r
-    0x00,0x08,0x41,0x52,0x35,0x43,0x12,0x0E,  /* 00000948    "..AR5C.." */\r
-    0x01,0x12,0x0B,0x04,0x0C,0xFF,0xFF,0x01,  /* 00000950    "........" */\r
-    0x00,0x00,0x00,0x0A,0x48,0x08,0x50,0x52,  /* 00000958    "....H.PR" */\r
-    0x35,0x44,0x12,0x3C,0x04,0x12,0x0D,0x04,  /* 00000960    "5D.<...." */\r
-    0x0C,0xFF,0xFF,0x01,0x00,0x00,0x4C,0x4E,  /* 00000968    "......LN" */\r
-    0x4B,0x41,0x00,0x12,0x0D,0x04,0x0C,0xFF,  /* 00000970    "KA......" */\r
-    0xFF,0x01,0x00,0x01,0x4C,0x4E,0x4B,0x42,  /* 00000978    "....LNKB" */\r
-    0x00,0x12,0x0E,0x04,0x0C,0xFF,0xFF,0x01,  /* 00000980    "........" */\r
-    0x00,0x0A,0x02,0x4C,0x4E,0x4B,0x43,0x00,  /* 00000988    "...LNKC." */\r
-    0x12,0x0E,0x04,0x0C,0xFF,0xFF,0x01,0x00,  /* 00000990    "........" */\r
-    0x0A,0x03,0x4C,0x4E,0x4B,0x44,0x00,0x08,  /* 00000998    "..LNKD.." */\r
-    0x41,0x52,0x35,0x44,0x12,0x34,0x04,0x12,  /* 000009A0    "AR5D.4.." */\r
-    0x0B,0x04,0x0C,0xFF,0xFF,0x01,0x00,0x00,  /* 000009A8    "........" */\r
-    0x00,0x0A,0x4C,0x12,0x0B,0x04,0x0C,0xFF,  /* 000009B0    "..L....." */\r
-    0xFF,0x01,0x00,0x01,0x00,0x0A,0x4D,0x12,  /* 000009B8    "......M." */\r
-    0x0C,0x04,0x0C,0xFF,0xFF,0x01,0x00,0x0A,  /* 000009C0    "........" */\r
-    0x02,0x00,0x0A,0x4E,0x12,0x0C,0x04,0x0C,  /* 000009C8    "...N...." */\r
-    0xFF,0xFF,0x01,0x00,0x0A,0x03,0x00,0x0A,  /* 000009D0    "........" */\r
-    0x4F,0x08,0x50,0x52,0x53,0x41,0x11,0x09,  /* 000009D8    "O.PRSA.." */\r
-    0x0A,0x06,0x23,0xF8,0xDE,0x18,0x79,0x00,  /* 000009E0    "..#...y." */\r
-    0x06,0x50,0x52,0x53,0x41,0x50,0x52,0x53,  /* 000009E8    ".PRSAPRS" */\r
-    0x42,0x06,0x50,0x52,0x53,0x41,0x50,0x52,  /* 000009F0    "B.PRSAPR" */\r
-    0x53,0x43,0x06,0x50,0x52,0x53,0x41,0x50,  /* 000009F8    "SC.PRSAP" */\r
-    0x52,0x53,0x44,0x5B,0x82,0x2B,0x50,0x43,  /* 00000A00    "RSD[.+PC" */\r
-    0x49,0x30,0x08,0x5F,0x48,0x49,0x44,0x0C,  /* 00000A08    "I0._HID." */\r
-    0x41,0xD0,0x0A,0x03,0x14,0x09,0x5E,0x42,  /* 00000A10    "A.....^B" */\r
-    0x4E,0x30,0x30,0x00,0xA4,0x00,0x14,0x0B,  /* 00000A18    "N00....." */\r
-    0x5F,0x42,0x42,0x4E,0x00,0xA4,0x42,0x4E,  /* 00000A20    "_BBN..BN" */\r
-    0x30,0x30,0x08,0x5F,0x55,0x49,0x44,0x00,  /* 00000A28    "00._UID." */\r
-    0x5B,0x82,0x8F,0xA5,0x01,0x50,0x43,0x49,  /* 00000A30    "[....PCI" */\r
-    0x41,0x08,0x5F,0x48,0x49,0x44,0x0C,0x41,  /* 00000A38    "A._HID.A" */\r
-    0xD0,0x0A,0x03,0x08,0x5F,0x41,0x44,0x52,  /* 00000A40    "...._ADR" */\r
-    0x0C,0x01,0x00,0x18,0x00,0x14,0x09,0x5E,  /* 00000A48    ".......^" */\r
-    0x42,0x4E,0x30,0x31,0x00,0xA4,0x01,0x14,  /* 00000A50    "BN01...." */\r
-    0x0B,0x5F,0x42,0x42,0x4E,0x00,0xA4,0x42,  /* 00000A58    "._BBN..B" */\r
-    0x4E,0x30,0x31,0x08,0x5F,0x55,0x49,0x44,  /* 00000A60    "N01._UID" */\r
-    0x00,0x14,0x16,0x5F,0x50,0x52,0x54,0x00,  /* 00000A68    "..._PRT." */\r
-    0xA0,0x0A,0x50,0x49,0x43,0x4D,0xA4,0x41,  /* 00000A70    "..PICM.A" */\r
-    0x52,0x30,0x30,0xA4,0x50,0x52,0x30,0x30,  /* 00000A78    "R00.PR00" */\r
-    0x5B,0x82,0x47,0x09,0x50,0x43,0x49,0x31,  /* 00000A80    "[.G.PCI1" */\r
-    0x08,0x5F,0x41,0x44,0x52,0x0C,0x00,0x00,  /* 00000A88    "._ADR..." */\r
-    0x03,0x00,0x14,0x0F,0x5F,0x50,0x52,0x57,  /* 00000A90    "...._PRW" */\r
-    0x00,0xA4,0x47,0x50,0x52,0x57,0x0A,0x08,  /* 00000A98    "..GPRW.." */\r
-    0x0A,0x04,0x14,0x16,0x5F,0x50,0x52,0x54,  /* 00000AA0    "...._PRT" */\r
-    0x00,0xA0,0x0A,0x50,0x49,0x43,0x4D,0xA4,  /* 00000AA8    "...PICM." */\r
-    0x41,0x52,0x30,0x31,0xA4,0x50,0x52,0x30,  /* 00000AB0    "AR01.PR0" */\r
-    0x31,0x5B,0x82,0x2E,0x55,0x53,0x42,0x30,  /* 00000AB8    "1[..USB0" */\r
-    0x08,0x5F,0x41,0x44,0x52,0x00,0x14,0x12,  /* 00000AC0    "._ADR..." */\r
-    0x5F,0x50,0x53,0x57,0x01,0x7B,0x47,0x4E,  /* 00000AC8    "_PSW.{GN" */\r
-    0x42,0x4C,0x0B,0xFF,0x7F,0x47,0x4E,0x42,  /* 00000AD0    "BL...GNB" */\r
-    0x4C,0x14,0x0F,0x5F,0x50,0x52,0x57,0x00,  /* 00000AD8    "L.._PRW." */\r
-    0xA4,0x47,0x50,0x52,0x57,0x0A,0x0F,0x0A,  /* 00000AE0    ".GPRW..." */\r
-    0x04,0x5B,0x82,0x2E,0x55,0x53,0x42,0x31,  /* 00000AE8    ".[..USB1" */\r
-    0x08,0x5F,0x41,0x44,0x52,0x01,0x14,0x12,  /* 00000AF0    "._ADR..." */\r
-    0x5F,0x50,0x53,0x57,0x01,0x7B,0x47,0x4E,  /* 00000AF8    "_PSW.{GN" */\r
-    0x42,0x4C,0x0B,0xFF,0x7F,0x47,0x4E,0x42,  /* 00000B00    "BL...GNB" */\r
-    0x4C,0x14,0x0F,0x5F,0x50,0x52,0x57,0x00,  /* 00000B08    "L.._PRW." */\r
-    0xA4,0x47,0x50,0x52,0x57,0x0A,0x0F,0x0A,  /* 00000B10    ".GPRW..." */\r
-    0x04,0x5B,0x82,0x42,0xF8,0x53,0x42,0x52,  /* 00000B18    ".[.B.SBR" */\r
-    0x47,0x08,0x5F,0x41,0x44,0x52,0x0C,0x00,  /* 00000B20    "G._ADR.." */\r
-    0x00,0x04,0x00,0x5B,0x82,0x2B,0x50,0x49,  /* 00000B28    "...[.+PI" */\r
-    0x43,0x5F,0x08,0x5F,0x48,0x49,0x44,0x0B,  /* 00000B30    "C_._HID." */\r
-    0x41,0xD0,0x08,0x5F,0x43,0x52,0x53,0x11,  /* 00000B38    "A.._CRS." */\r
-    0x18,0x0A,0x15,0x47,0x01,0x20,0x00,0x20,  /* 00000B40    "...G. . " */\r
-    0x00,0x00,0x02,0x47,0x01,0xA0,0x00,0xA0,  /* 00000B48    "...G...." */\r
-    0x00,0x00,0x02,0x22,0x04,0x00,0x79,0x00,  /* 00000B50    "..."..y." */\r
-    0x5B,0x82,0x4E,0x04,0x44,0x4D,0x41,0x44,  /* 00000B58    "[.N.DMAD" */\r
-    0x08,0x5F,0x48,0x49,0x44,0x0C,0x41,0xD0,  /* 00000B60    "._HID.A." */\r
-    0x02,0x00,0x08,0x5F,0x43,0x52,0x53,0x11,  /* 00000B68    "..._CRS." */\r
-    0x38,0x0A,0x35,0x2A,0x10,0x04,0x47,0x01,  /* 00000B70    "8.5*..G." */\r
-    0x00,0x00,0x00,0x00,0x00,0x10,0x47,0x01,  /* 00000B78    "......G." */\r
-    0x81,0x00,0x81,0x00,0x00,0x03,0x47,0x01,  /* 00000B80    "......G." */\r
-    0x87,0x00,0x87,0x00,0x00,0x01,0x47,0x01,  /* 00000B88    "......G." */\r
-    0x89,0x00,0x89,0x00,0x00,0x03,0x47,0x01,  /* 00000B90    "......G." */\r
-    0x8F,0x00,0x8F,0x00,0x00,0x01,0x47,0x01,  /* 00000B98    "......G." */\r
-    0xC0,0x00,0xC0,0x00,0x00,0x20,0x79,0x00,  /* 00000BA0    "..... y." */\r
-    0x5B,0x82,0x47,0x05,0x54,0x4D,0x52,0x5F,  /* 00000BA8    "[.G.TMR_" */\r
-    0x08,0x5F,0x48,0x49,0x44,0x0C,0x41,0xD0,  /* 00000BB0    "._HID.A." */\r
-    0x01,0x00,0x08,0x43,0x52,0x53,0x5F,0x11,  /* 00000BB8    "...CRS_." */\r
-    0x10,0x0A,0x0D,0x47,0x01,0x40,0x00,0x40,  /* 00000BC0    "...G.@.@" */\r
-    0x00,0x00,0x04,0x22,0x01,0x00,0x79,0x00,  /* 00000BC8    "..."..y." */\r
-    0x08,0x43,0x52,0x53,0x31,0x11,0x0D,0x0A,  /* 00000BD0    ".CRS1..." */\r
-    0x0A,0x47,0x01,0x40,0x00,0x40,0x00,0x00,  /* 00000BD8    ".G.@.@.." */\r
-    0x04,0x79,0x00,0x14,0x1D,0x5F,0x43,0x52,  /* 00000BE0    ".y..._CR" */\r
-    0x53,0x00,0xA0,0x11,0x5E,0x5E,0x2E,0x48,  /* 00000BE8    "S...^^.H" */\r
-    0x50,0x45,0x54,0x5F,0x53,0x54,0x41,0xA4,  /* 00000BF0    "PET_STA." */\r
-    0x43,0x52,0x53,0x31,0xA4,0x43,0x52,0x53,  /* 00000BF8    "CRS1.CRS" */\r
-    0x5F,0x5B,0x82,0x47,0x05,0x52,0x54,0x43,  /* 00000C00    "_[.G.RTC" */\r
-    0x30,0x08,0x5F,0x48,0x49,0x44,0x0C,0x41,  /* 00000C08    "0._HID.A" */\r
-    0xD0,0x0B,0x00,0x08,0x43,0x52,0x53,0x5F,  /* 00000C10    "....CRS_" */\r
-    0x11,0x10,0x0A,0x0D,0x47,0x01,0x70,0x00,  /* 00000C18    "....G.p." */\r
-    0x70,0x00,0x00,0x02,0x22,0x00,0x01,0x79,  /* 00000C20    "p..."..y" */\r
-    0x00,0x08,0x43,0x52,0x53,0x31,0x11,0x0D,  /* 00000C28    "..CRS1.." */\r
-    0x0A,0x0A,0x47,0x01,0x70,0x00,0x70,0x00,  /* 00000C30    "..G.p.p." */\r
-    0x00,0x02,0x79,0x00,0x14,0x1D,0x5F,0x43,  /* 00000C38    "..y..._C" */\r
-    0x52,0x53,0x00,0xA0,0x11,0x5E,0x5E,0x2E,  /* 00000C40    "RS...^^." */\r
-    0x48,0x50,0x45,0x54,0x5F,0x53,0x54,0x41,  /* 00000C48    "HPET_STA" */\r
-    0xA4,0x43,0x52,0x53,0x31,0xA4,0x43,0x52,  /* 00000C50    ".CRS1.CR" */\r
-    0x53,0x5F,0x5B,0x82,0x42,0x05,0x50,0x53,  /* 00000C58    "S_[.B.PS" */\r
-    0x32,0x4B,0x08,0x5F,0x48,0x49,0x44,0x0C,  /* 00000C60    "2K._HID." */\r
-    0x41,0xD0,0x03,0x03,0x08,0x5F,0x43,0x49,  /* 00000C68    "A...._CI" */\r
-    0x44,0x0C,0x41,0xD0,0x03,0x0B,0x14,0x19,  /* 00000C70    "D.A....." */\r
-    0x5F,0x53,0x54,0x41,0x00,0x79,0x01,0x0A,  /* 00000C78    "_STA.y.." */\r
-    0x0A,0x60,0xA0,0x0B,0x7B,0x49,0x4F,0x53,  /* 00000C80    ".`..{IOS" */\r
-    0x54,0x60,0x00,0xA4,0x0A,0x0F,0xA4,0x00,  /* 00000C88    "T`......" */\r
-    0x08,0x5F,0x43,0x52,0x53,0x11,0x18,0x0A,  /* 00000C90    "._CRS..." */\r
-    0x15,0x47,0x01,0x60,0x00,0x60,0x00,0x00,  /* 00000C98    ".G.`.`.." */\r
-    0x01,0x47,0x01,0x64,0x00,0x64,0x00,0x00,  /* 00000CA0    ".G.d.d.." */\r
-    0x01,0x22,0x02,0x00,0x79,0x00,0x14,0x14,  /* 00000CA8    "."..y..." */\r
-    0x2E,0x50,0x53,0x32,0x4B,0x5F,0x50,0x52,  /* 00000CB0    ".PS2K_PR" */\r
-    0x57,0x00,0xA4,0x47,0x50,0x52,0x57,0x0A,  /* 00000CB8    "W..GPRW." */\r
-    0x08,0x0A,0x03,0x5B,0x82,0x41,0x08,0x50,  /* 00000CC0    "...[.A.P" */\r
-    0x53,0x32,0x4D,0x08,0x5F,0x48,0x49,0x44,  /* 00000CC8    "S2M._HID" */\r
-    0x0C,0x41,0xD0,0x0F,0x03,0x08,0x5F,0x43,  /* 00000CD0    ".A...._C" */\r
-    0x49,0x44,0x0C,0x41,0xD0,0x0F,0x13,0x14,  /* 00000CD8    "ID.A...." */\r
-    0x19,0x5F,0x53,0x54,0x41,0x00,0x79,0x01,  /* 00000CE0    "._STA.y." */\r
-    0x0A,0x0C,0x60,0xA0,0x0B,0x7B,0x49,0x4F,  /* 00000CE8    "..`..{IO" */\r
-    0x53,0x54,0x60,0x00,0xA4,0x0A,0x0F,0xA4,  /* 00000CF0    "ST`....." */\r
-    0x00,0x08,0x43,0x52,0x53,0x31,0x11,0x08,  /* 00000CF8    "..CRS1.." */\r
-    0x0A,0x05,0x22,0x00,0x10,0x79,0x00,0x08,  /* 00000D00    ".."..y.." */\r
-    0x43,0x52,0x53,0x32,0x11,0x18,0x0A,0x15,  /* 00000D08    "CRS2...." */\r
-    0x47,0x01,0x60,0x00,0x60,0x00,0x00,0x01,  /* 00000D10    "G.`.`..." */\r
-    0x47,0x01,0x64,0x00,0x64,0x00,0x00,0x01,  /* 00000D18    "G.d.d..." */\r
-    0x22,0x00,0x10,0x79,0x00,0x14,0x20,0x5F,  /* 00000D20    ""..y.. _" */\r
-    0x43,0x52,0x53,0x00,0x79,0x01,0x0A,0x0A,  /* 00000D28    "CRS.y..." */\r
-    0x60,0xA0,0x0D,0x7B,0x49,0x4F,0x53,0x54,  /* 00000D30    "`..{IOST" */\r
-    0x60,0x00,0xA4,0x43,0x52,0x53,0x31,0xA1,  /* 00000D38    "`..CRS1." */\r
-    0x06,0xA4,0x43,0x52,0x53,0x32,0x14,0x14,  /* 00000D40    "..CRS2.." */\r
-    0x2E,0x50,0x53,0x32,0x4D,0x5F,0x50,0x52,  /* 00000D48    ".PS2M_PR" */\r
-    0x57,0x00,0xA4,0x47,0x50,0x52,0x57,0x0A,  /* 00000D50    "W..GPRW." */\r
-    0x08,0x0A,0x03,0x5B,0x82,0x22,0x53,0x50,  /* 00000D58    "...[."SP" */\r
-    0x4B,0x52,0x08,0x5F,0x48,0x49,0x44,0x0C,  /* 00000D60    "KR._HID." */\r
-    0x41,0xD0,0x08,0x00,0x08,0x5F,0x43,0x52,  /* 00000D68    "A...._CR" */\r
-    0x53,0x11,0x0D,0x0A,0x0A,0x47,0x01,0x61,  /* 00000D70    "S....G.a" */\r
-    0x00,0x61,0x00,0x00,0x01,0x79,0x00,0x5B,  /* 00000D78    ".a...y.[" */\r
-    0x82,0x25,0x43,0x4F,0x50,0x52,0x08,0x5F,  /* 00000D80    ".%COPR._" */\r
-    0x48,0x49,0x44,0x0C,0x41,0xD0,0x0C,0x04,  /* 00000D88    "HID.A..." */\r
-    0x08,0x5F,0x43,0x52,0x53,0x11,0x10,0x0A,  /* 00000D90    "._CRS..." */\r
-    0x0D,0x47,0x01,0xF0,0x00,0xF0,0x00,0x00,  /* 00000D98    ".G......" */\r
-    0x10,0x22,0x00,0x20,0x79,0x00,0x5B,0x82,  /* 00000DA0    ".". y.[." */\r
-    0x40,0x0B,0x55,0x41,0x52,0x31,0x08,0x5F,  /* 00000DA8    "@.UAR1._" */\r
-    0x55,0x49,0x44,0x01,0x08,0x5F,0x48,0x49,  /* 00000DB0    "UID.._HI" */\r
-    0x44,0x0C,0x41,0xD0,0x05,0x01,0x14,0x0C,  /* 00000DB8    "D.A....." */\r
-    0x5F,0x53,0x54,0x41,0x00,0xA4,0x44,0x53,  /* 00000DC0    "_STA..DS" */\r
-    0x54,0x41,0x00,0x14,0x0C,0x5F,0x44,0x49,  /* 00000DC8    "TA..._DI" */\r
-    0x53,0x00,0x44,0x43,0x4E,0x54,0x00,0x00,  /* 00000DD0    "S.DCNT.." */\r
-    0x14,0x0D,0x5F,0x43,0x52,0x53,0x00,0xA4,  /* 00000DD8    ".._CRS.." */\r
-    0x44,0x43,0x52,0x53,0x00,0x00,0x14,0x0C,  /* 00000DE0    "DCRS...." */\r
-    0x5F,0x53,0x52,0x53,0x01,0x44,0x53,0x52,  /* 00000DE8    "_SRS.DSR" */\r
-    0x53,0x68,0x00,0x14,0x0B,0x5F,0x50,0x52,  /* 00000DF0    "Sh..._PR" */\r
-    0x53,0x00,0xA4,0x43,0x4D,0x50,0x52,0x08,  /* 00000DF8    "S..CMPR." */\r
-    0x43,0x4D,0x50,0x52,0x11,0x43,0x05,0x0A,  /* 00000E00    "CMPR.C.." */\r
-    0x4F,0x31,0x00,0x47,0x01,0xF8,0x03,0xF8,  /* 00000E08    "O1.G...." */\r
-    0x03,0x01,0x08,0x22,0x10,0x00,0x2A,0x00,  /* 00000E10    "..."..*." */\r
-    0x00,0x30,0x47,0x01,0xF8,0x03,0xF8,0x03,  /* 00000E18    ".0G....." */\r
-    0x01,0x08,0x22,0xF8,0x1C,0x2A,0x00,0x00,  /* 00000E20    ".."..*.." */\r
-    0x30,0x47,0x01,0xF8,0x02,0xF8,0x02,0x01,  /* 00000E28    "0G......" */\r
-    0x08,0x22,0xF8,0x1C,0x2A,0x00,0x00,0x30,  /* 00000E30    "."..*..0" */\r
-    0x47,0x01,0xE8,0x03,0xE8,0x03,0x01,0x08,  /* 00000E38    "G......." */\r
-    0x22,0xF8,0x1C,0x2A,0x00,0x00,0x30,0x47,  /* 00000E40    ""..*..0G" */\r
-    0x01,0xE8,0x02,0xE8,0x02,0x01,0x08,0x22,  /* 00000E48    "......."" */\r
-    0xF8,0x1C,0x2A,0x00,0x00,0x38,0x79,0x00,  /* 00000E50    "..*..8y." */\r
-    0x5B,0x82,0x40,0x0F,0x55,0x41,0x52,0x32,  /* 00000E58    "[.@.UAR2" */\r
-    0x08,0x5F,0x55,0x49,0x44,0x0A,0x02,0x14,  /* 00000E60    "._UID..." */\r
-    0x0C,0x5F,0x48,0x49,0x44,0x00,0xA4,0x55,  /* 00000E68    "._HID..U" */\r
-    0x48,0x49,0x44,0x01,0x14,0x0C,0x5F,0x53,  /* 00000E70    "HID..._S" */\r
-    0x54,0x41,0x00,0xA4,0x44,0x53,0x54,0x41,  /* 00000E78    "TA..DSTA" */\r
-    0x01,0x14,0x0C,0x5F,0x44,0x49,0x53,0x00,  /* 00000E80    "..._DIS." */\r
-    0x44,0x43,0x4E,0x54,0x01,0x00,0x14,0x0D,  /* 00000E88    "DCNT...." */\r
-    0x5F,0x43,0x52,0x53,0x00,0xA4,0x44,0x43,  /* 00000E90    "_CRS..DC" */\r
-    0x52,0x53,0x01,0x01,0x14,0x0C,0x5F,0x53,  /* 00000E98    "RS...._S" */\r
-    0x52,0x53,0x01,0x44,0x53,0x52,0x53,0x68,  /* 00000EA0    "RS.DSRSh" */\r
-    0x01,0x14,0x0B,0x5F,0x50,0x52,0x53,0x00,  /* 00000EA8    "..._PRS." */\r
-    0xA4,0x43,0x4D,0x50,0x52,0x08,0x43,0x4D,  /* 00000EB0    ".CMPR.CM" */\r
-    0x50,0x52,0x11,0x4F,0x08,0x0A,0x8B,0x31,  /* 00000EB8    "PR.O...1" */\r
-    0x00,0x47,0x01,0xF8,0x02,0xF8,0x02,0x01,  /* 00000EC0    ".G......" */\r
-    0x08,0x22,0x08,0x00,0x2A,0x00,0x00,0x30,  /* 00000EC8    "."..*..0" */\r
-    0x47,0x01,0xF8,0x03,0xF8,0x03,0x01,0x08,  /* 00000ED0    "G......." */\r
-    0x22,0xF8,0x1C,0x2A,0x00,0x00,0x30,0x47,  /* 00000ED8    ""..*..0G" */\r
-    0x01,0xF8,0x02,0xF8,0x02,0x01,0x08,0x22,  /* 00000EE0    "......."" */\r
-    0xF8,0x1C,0x2A,0x00,0x00,0x30,0x47,0x01,  /* 00000EE8    "..*..0G." */\r
-    0xE8,0x03,0xE8,0x03,0x01,0x08,0x22,0xF8,  /* 00000EF0    "......"." */\r
-    0x1C,0x2A,0x00,0x00,0x30,0x47,0x01,0xE8,  /* 00000EF8    ".*..0G.." */\r
-    0x02,0xE8,0x02,0x01,0x08,0x22,0xF8,0x1C,  /* 00000F00    ".....".." */\r
-    0x2A,0x00,0x00,0x30,0x47,0x01,0xF8,0x03,  /* 00000F08    "*..0G..." */\r
-    0xF8,0x03,0x01,0x08,0x22,0xF8,0x1C,0x2A,  /* 00000F10    "...."..*" */\r
-    0x0F,0x00,0x30,0x47,0x01,0xF8,0x02,0xF8,  /* 00000F18    "..0G...." */\r
-    0x02,0x01,0x08,0x22,0xF8,0x1C,0x2A,0x0F,  /* 00000F20    "..."..*." */\r
-    0x00,0x30,0x47,0x01,0xE8,0x03,0xE8,0x03,  /* 00000F28    ".0G....." */\r
-    0x01,0x08,0x22,0xF8,0x1C,0x2A,0x0F,0x00,  /* 00000F30    ".."..*.." */\r
-    0x30,0x47,0x01,0xE8,0x02,0xE8,0x02,0x01,  /* 00000F38    "0G......" */\r
-    0x08,0x22,0xF8,0x1C,0x2A,0x0F,0x00,0x38,  /* 00000F40    "."..*..8" */\r
-    0x79,0x00,0x5B,0x82,0x47,0x16,0x46,0x44,  /* 00000F48    "y.[.G.FD" */\r
-    0x43,0x5F,0x08,0x5F,0x48,0x49,0x44,0x0C,  /* 00000F50    "C_._HID." */\r
-    0x41,0xD0,0x07,0x00,0x14,0x2A,0x5F,0x46,  /* 00000F58    "A....*_F" */\r
-    0x44,0x45,0x00,0x08,0x46,0x44,0x45,0x50,  /* 00000F60    "DE..FDEP" */\r
-    0x12,0x0A,0x05,0x00,0x00,0x0A,0x02,0x0A,  /* 00000F68    "........" */\r
-    0x02,0x0A,0x02,0xA0,0x0E,0x5F,0x53,0x54,  /* 00000F70    "....._ST" */\r
-    0x41,0x70,0x01,0x88,0x46,0x44,0x45,0x50,  /* 00000F78    "Ap..FDEP" */\r
-    0x00,0x00,0xA4,0x46,0x44,0x45,0x50,0x14,  /* 00000F80    "...FDEP." */\r
-    0x0D,0x5F,0x53,0x54,0x41,0x00,0xA4,0x44,  /* 00000F88    "._STA..D" */\r
-    0x53,0x54,0x41,0x0A,0x03,0x14,0x0D,0x5F,  /* 00000F90    "STA...._" */\r
-    0x44,0x49,0x53,0x00,0x44,0x43,0x4E,0x54,  /* 00000F98    "DIS.DCNT" */\r
-    0x0A,0x03,0x00,0x14,0x48,0x05,0x5F,0x43,  /* 00000FA0    "....H._C" */\r
-    0x52,0x53,0x00,0x44,0x43,0x52,0x53,0x0A,  /* 00000FA8    "RS.DCRS." */\r
-    0x03,0x01,0x70,0x49,0x52,0x51,0x4D,0x49,  /* 00000FB0    "..pIRQMI" */\r
-    0x52,0x51,0x45,0x70,0x44,0x4D,0x41,0x4D,  /* 00000FB8    "RQEpDMAM" */\r
-    0x44,0x4D,0x41,0x45,0x70,0x49,0x4F,0x31,  /* 00000FC0    "DMAEpIO1" */\r
-    0x31,0x49,0x4F,0x32,0x31,0x70,0x49,0x4F,  /* 00000FC8    "1IO21pIO" */\r
-    0x31,0x32,0x49,0x4F,0x32,0x32,0x70,0x0A,  /* 00000FD0    "12IO22p." */\r
-    0x06,0x4C,0x45,0x4E,0x32,0x72,0x49,0x4F,  /* 00000FD8    ".LEN2rIO" */\r
-    0x32,0x31,0x0A,0x07,0x49,0x4F,0x33,0x31,  /* 00000FE0    "21..IO31" */\r
-    0x70,0x49,0x4F,0x33,0x31,0x49,0x4F,0x33,  /* 00000FE8    "pIO31IO3" */\r
-    0x32,0x70,0x01,0x4C,0x45,0x4E,0x33,0xA4,  /* 00000FF0    "2p.LEN3." */\r
-    0x43,0x52,0x53,0x32,0x14,0x43,0x06,0x5F,  /* 00000FF8    "CRS2.C._" */\r
-    0x53,0x52,0x53,0x01,0x44,0x53,0x52,0x53,  /* 00001000    "SRS.DSRS" */\r
-    0x68,0x0A,0x03,0x8B,0x68,0x0A,0x11,0x49,  /* 00001008    "h...h..I" */\r
-    0x52,0x51,0x45,0x8C,0x68,0x0A,0x14,0x44,  /* 00001010    "RQE.h..D" */\r
-    0x4D,0x41,0x45,0x45,0x4E,0x46,0x47,0x43,  /* 00001018    "MAEENFGC" */\r
-    0x47,0x4C,0x44,0x0A,0x03,0xA0,0x12,0x49,  /* 00001020    "GLD....I" */\r
-    0x52,0x51,0x45,0x82,0x49,0x52,0x51,0x45,  /* 00001028    "RQE.IRQE" */\r
-    0x60,0x74,0x60,0x01,0x49,0x4E,0x54,0x52,  /* 00001030    "`t`.INTR" */\r
-    0xA1,0x07,0x70,0x00,0x49,0x4E,0x54,0x52,  /* 00001038    "..p.INTR" */\r
-    0xA0,0x12,0x44,0x4D,0x41,0x45,0x82,0x44,  /* 00001040    "..DMAE.D" */\r
-    0x4D,0x41,0x45,0x60,0x74,0x60,0x01,0x44,  /* 00001048    "MAE`t`.D" */\r
-    0x4D,0x43,0x48,0xA1,0x08,0x70,0x0A,0x04,  /* 00001050    "MCH..p.." */\r
-    0x44,0x4D,0x43,0x48,0x45,0x58,0x46,0x47,  /* 00001058    "DMCHEXFG" */\r
-    0x08,0x5F,0x50,0x52,0x53,0x11,0x4D,0x04,  /* 00001060    "._PRS.M." */\r
-    0x0A,0x49,0x31,0x00,0x47,0x01,0xF0,0x03,  /* 00001068    ".I1.G..." */\r
-    0xF0,0x03,0x01,0x06,0x47,0x01,0xF7,0x03,  /* 00001070    "....G..." */\r
-    0xF7,0x03,0x01,0x01,0x22,0x40,0x00,0x2A,  /* 00001078    "...."@.*" */\r
-    0x04,0x00,0x30,0x47,0x01,0xF0,0x03,0xF0,  /* 00001080    "..0G...." */\r
-    0x03,0x01,0x06,0x47,0x01,0xF7,0x03,0xF7,  /* 00001088    "...G...." */\r
-    0x03,0x01,0x01,0x22,0xF8,0x1C,0x2A,0x0F,  /* 00001090    "..."..*." */\r
-    0x00,0x30,0x47,0x01,0x70,0x03,0x70,0x03,  /* 00001098    ".0G.p.p." */\r
-    0x01,0x06,0x47,0x01,0x77,0x03,0x77,0x03,  /* 000010A0    "..G.w.w." */\r
-    0x01,0x01,0x22,0xF8,0x1C,0x2A,0x0F,0x00,  /* 000010A8    ".."..*.." */\r
-    0x38,0x79,0x00,0x5B,0x82,0x4D,0x0D,0x53,  /* 000010B0    "8y.[.M.S" */\r
-    0x49,0x4F,0x52,0x08,0x5F,0x48,0x49,0x44,  /* 000010B8    "IOR._HID" */\r
-    0x0C,0x41,0xD0,0x0C,0x02,0x14,0x0B,0x5F,  /* 000010C0    ".A....._" */\r
-    0x55,0x49,0x44,0x00,0xA4,0x53,0x50,0x49,  /* 000010C8    "UID..SPI" */\r
-    0x4F,0x08,0x43,0x52,0x53,0x5F,0x11,0x1D,  /* 000010D0    "O.CRS_.." */\r
-    0x0A,0x1A,0x47,0x01,0x00,0x00,0x00,0x00,  /* 000010D8    "..G....." */\r
-    0x00,0x00,0x47,0x01,0x00,0x00,0x00,0x00,  /* 000010E0    "..G....." */\r
-    0x00,0x00,0x47,0x01,0x95,0x02,0x95,0x02,  /* 000010E8    "..G....." */\r
-    0x00,0x02,0x79,0x00,0x14,0x4D,0x09,0x5F,  /* 000010F0    "..y..M._" */\r
-    0x43,0x52,0x53,0x00,0xA0,0x4D,0x04,0x90,  /* 000010F8    "CRS..M.." */\r
-    0x92,0x93,0x53,0x50,0x49,0x4F,0x0B,0xF0,  /* 00001100    "..SPIO.." */\r
-    0x03,0x94,0x53,0x50,0x49,0x4F,0x0A,0xF0,  /* 00001108    "..SPIO.." */\r
-    0x8B,0x43,0x52,0x53,0x5F,0x0A,0x02,0x47,  /* 00001110    ".CRS_..G" */\r
-    0x50,0x31,0x30,0x8B,0x43,0x52,0x53,0x5F,  /* 00001118    "P10.CRS_" */\r
-    0x0A,0x04,0x47,0x50,0x31,0x31,0x8C,0x43,  /* 00001120    "..GP11.C" */\r
-    0x52,0x53,0x5F,0x0A,0x07,0x47,0x50,0x4C,  /* 00001128    "RS_..GPL" */\r
-    0x31,0x70,0x53,0x50,0x49,0x4F,0x47,0x50,  /* 00001130    "1pSPIOGP" */\r
-    0x31,0x30,0x70,0x53,0x50,0x49,0x4F,0x47,  /* 00001138    "10pSPIOG" */\r
-    0x50,0x31,0x31,0x70,0x0A,0x02,0x47,0x50,  /* 00001140    "P11p..GP" */\r
-    0x4C,0x31,0xA0,0x42,0x04,0x49,0x4F,0x31,  /* 00001148    "L1.B.IO1" */\r
-    0x42,0x8B,0x43,0x52,0x53,0x5F,0x0A,0x0A,  /* 00001150    "B.CRS_.." */\r
-    0x47,0x50,0x32,0x30,0x8B,0x43,0x52,0x53,  /* 00001158    "GP20.CRS" */\r
-    0x5F,0x0A,0x0C,0x47,0x50,0x32,0x31,0x8C,  /* 00001160    "_..GP21." */\r
-    0x43,0x52,0x53,0x5F,0x0A,0x0F,0x47,0x50,  /* 00001168    "CRS_..GP" */\r
-    0x4C,0x32,0x70,0x49,0x4F,0x31,0x42,0x47,  /* 00001170    "L2pIO1BG" */\r
-    0x50,0x32,0x30,0x70,0x49,0x4F,0x31,0x42,  /* 00001178    "P20pIO1B" */\r
-    0x47,0x50,0x32,0x31,0x70,0x49,0x4F,0x31,  /* 00001180    "GP21pIO1" */\r
-    0x4C,0x47,0x50,0x4C,0x32,0xA4,0x43,0x52,  /* 00001188    "LGPL2.CR" */\r
-    0x53,0x5F,0x08,0x44,0x43,0x41,0x54,0x12,  /* 00001190    "S_.DCAT." */\r
-    0x2A,0x15,0x0A,0x02,0x0A,0x03,0x01,0x00,  /* 00001198    "*......." */\r
-    0x0A,0xFF,0x0A,0x07,0x0A,0xFF,0x0A,0xFF,  /* 000011A0    "........" */\r
-    0x0A,0x07,0x0A,0xFF,0x0A,0xFF,0x0A,0xFF,  /* 000011A8    "........" */\r
-    0x0A,0xFF,0x0A,0xFF,0x0A,0xFF,0x0A,0xFF,  /* 000011B0    "........" */\r
-    0x0A,0x06,0x0A,0x08,0x0A,0x09,0x0A,0xFF,  /* 000011B8    "........" */\r
-    0x0A,0xFF,0x14,0x1A,0x45,0x4E,0x46,0x47,  /* 000011C0    "....ENFG" */\r
-    0x01,0x70,0x0A,0x87,0x49,0x4E,0x44,0x58,  /* 000011C8    ".p..INDX" */\r
-    0x70,0x0A,0x87,0x49,0x4E,0x44,0x58,0x70,  /* 000011D0    "p..INDXp" */\r
-    0x68,0x4C,0x44,0x4E,0x5F,0x14,0x0D,0x45,  /* 000011D8    "hLDN_..E" */\r
-    0x58,0x46,0x47,0x00,0x70,0x0A,0xAA,0x49,  /* 000011E0    "XFG.p..I" */\r
-    0x4E,0x44,0x58,0x14,0x1D,0x4C,0x50,0x54,  /* 000011E8    "NDX..LPT" */\r
-    0x4D,0x01,0x45,0x4E,0x46,0x47,0x43,0x47,  /* 000011F0    "M.ENFGCG" */\r
-    0x4C,0x44,0x68,0x7B,0x4F,0x50,0x54,0x30,  /* 000011F8    "LDh{OPT0" */\r
-    0x0A,0x02,0x60,0x45,0x58,0x46,0x47,0xA4,  /* 00001200    "..`EXFG." */\r
-    0x60,0x14,0x2F,0x55,0x48,0x49,0x44,0x01,  /* 00001208    "`./UHID." */\r
-    0xA0,0x22,0x93,0x68,0x01,0x45,0x4E,0x46,  /* 00001210    ".".h.ENF" */\r
-    0x47,0x43,0x47,0x4C,0x44,0x68,0x7B,0x4F,  /* 00001218    "GCGLDh{O" */\r
-    0x50,0x54,0x31,0x0A,0x38,0x60,0x45,0x58,  /* 00001220    "PT1.8`EX" */\r
-    0x46,0x47,0xA0,0x08,0x60,0xA4,0x0C,0x41,  /* 00001228    "FG..`..A" */\r
-    0xD0,0x05,0x10,0xA4,0x0C,0x41,0xD0,0x05,  /* 00001230    ".....A.." */\r
-    0x01,0x14,0x3E,0x53,0x49,0x4F,0x4B,0x01,  /* 00001238    "..>SIOK." */\r
-    0x45,0x4E,0x46,0x47,0x0A,0x0A,0x7B,0x0A,  /* 00001240    "ENFG..{." */\r
-    0xFF,0x4F,0x50,0x54,0x33,0x4F,0x50,0x54,  /* 00001248    ".OPT3OPT" */\r
-    0x33,0x7B,0x68,0x0A,0x05,0x60,0x7B,0x4F,  /* 00001250    "3{h..`{O" */\r
-    0x50,0x54,0x39,0x0A,0xFA,0x4F,0x50,0x54,  /* 00001258    "PT9..OPT" */\r
-    0x39,0x7D,0x4F,0x50,0x54,0x39,0x60,0x4F,  /* 00001260    "9}OPT9`O" */\r
-    0x50,0x54,0x39,0x70,0x7B,0x68,0x01,0x00,  /* 00001268    "PT9p{h.." */\r
-    0x41,0x43,0x54,0x52,0x45,0x58,0x46,0x47,  /* 00001270    "ACTREXFG" */\r
-    0x14,0x2E,0x2E,0x50,0x53,0x32,0x4B,0x5F,  /* 00001278    "...PS2K_" */\r
-    0x50,0x53,0x57,0x01,0x45,0x4E,0x46,0x47,  /* 00001280    "PSW.ENFG" */\r
-    0x0A,0x0A,0x7B,0x4F,0x50,0x54,0x36,0x0A,  /* 00001288    "..{OPT6." */\r
-    0xEF,0x4F,0x50,0x54,0x36,0xA0,0x0D,0x68,  /* 00001290    ".OPT6..h" */\r
-    0x7D,0x4F,0x50,0x54,0x36,0x0A,0x10,0x4F,  /* 00001298    "}OPT6..O" */\r
-    0x50,0x54,0x36,0x45,0x58,0x46,0x47,0x14,  /* 000012A0    "PT6EXFG." */\r
-    0x2E,0x2E,0x50,0x53,0x32,0x4D,0x5F,0x50,  /* 000012A8    "..PS2M_P" */\r
-    0x53,0x57,0x01,0x45,0x4E,0x46,0x47,0x0A,  /* 000012B0    "SW.ENFG." */\r
-    0x0A,0x7B,0x4F,0x50,0x54,0x36,0x0A,0xDF,  /* 000012B8    ".{OPT6.." */\r
-    0x4F,0x50,0x54,0x36,0xA0,0x0D,0x68,0x7D,  /* 000012C0    "OPT6..h}" */\r
-    0x4F,0x50,0x54,0x36,0x0A,0x20,0x4F,0x50,  /* 000012C8    "OPT6. OP" */\r
-    0x54,0x36,0x45,0x58,0x46,0x47,0x14,0x14,  /* 000012D0    "T6EXFG.." */\r
-    0x53,0x49,0x4F,0x53,0x01,0x70,0x0D,0x53,  /* 000012D8    "SIOS.p.S" */\r
-    0x49,0x4F,0x53,0x00,0x5B,0x31,0x53,0x49,  /* 000012E0    "IOS.[1SI" */\r
-    0x4F,0x4B,0xFF,0x14,0x14,0x53,0x49,0x4F,  /* 000012E8    "OK...SIO" */\r
-    0x57,0x01,0x70,0x0D,0x53,0x49,0x4F,0x57,  /* 000012F0    "W.p.SIOW" */\r
-    0x00,0x5B,0x31,0x53,0x49,0x4F,0x4B,0x00,  /* 000012F8    ".[1SIOK." */\r
-    0x14,0x3C,0x53,0x49,0x4F,0x48,0x00,0x70,  /* 00001300    ".<SIOH.p" */\r
-    0x0D,0x53,0x49,0x4F,0x48,0x00,0x5B,0x31,  /* 00001308    ".SIOH.[1" */\r
-    0x45,0x4E,0x46,0x47,0x0A,0x0A,0xA0,0x10,  /* 00001310    "ENFG...." */\r
-    0x7B,0x4F,0x50,0x54,0x33,0x0A,0x10,0x00,  /* 00001318    "{OPT3..." */\r
-    0x86,0x50,0x53,0x32,0x4B,0x0A,0x02,0xA0,  /* 00001320    ".PS2K..." */\r
-    0x10,0x7B,0x4F,0x50,0x54,0x33,0x0A,0x20,  /* 00001328    ".{OPT3. " */\r
-    0x00,0x86,0x50,0x53,0x32,0x4D,0x0A,0x02,  /* 00001330    "..PS2M.." */\r
-    0x53,0x49,0x4F,0x4B,0x00,0x5B,0x80,0x49,  /* 00001338    "SIOK.[.I" */\r
-    0x4F,0x49,0x44,0x01,0x53,0x50,0x49,0x4F,  /* 00001340    "OID.SPIO" */\r
-    0x0A,0x02,0x5B,0x81,0x10,0x49,0x4F,0x49,  /* 00001348    "..[..IOI" */\r
-    0x44,0x01,0x49,0x4E,0x44,0x58,0x08,0x44,  /* 00001350    "D.INDX.D" */\r
-    0x41,0x54,0x41,0x08,0x5B,0x86,0x4A,0x09,  /* 00001358    "ATA.[.J." */\r
-    0x49,0x4E,0x44,0x58,0x44,0x41,0x54,0x41,  /* 00001360    "INDXDATA" */\r
-    0x01,0x00,0x38,0x4C,0x44,0x4E,0x5F,0x08,  /* 00001368    "..8LDN_." */\r
-    0x00,0x40,0x0D,0x46,0x44,0x43,0x50,0x01,  /* 00001370    ".@.FDCP." */\r
-    0x00,0x02,0x4C,0x50,0x54,0x50,0x01,0x55,  /* 00001378    "..LPTP.U" */\r
-    0x52,0x41,0x50,0x01,0x55,0x52,0x42,0x50,  /* 00001380    "RAP.URBP" */\r
-    0x01,0x00,0x4A,0x06,0x41,0x43,0x54,0x52,  /* 00001388    "..J.ACTR" */\r
-    0x08,0x00,0x48,0x17,0x49,0x4F,0x41,0x48,  /* 00001390    "..H.IOAH" */\r
-    0x08,0x49,0x4F,0x41,0x4C,0x08,0x49,0x4F,  /* 00001398    ".IOAL.IO" */\r
-    0x48,0x32,0x08,0x49,0x4F,0x4C,0x32,0x08,  /* 000013A0    "H2.IOL2." */\r
-    0x00,0x40,0x06,0x49,0x4E,0x54,0x52,0x08,  /* 000013A8    ".@.INTR." */\r
-    0x00,0x18,0x44,0x4D,0x43,0x48,0x08,0x00,  /* 000013B0    "..DMCH.." */\r
-    0x48,0x35,0x43,0x52,0x45,0x30,0x08,0x43,  /* 000013B8    "H5CRE0.C" */\r
-    0x52,0x45,0x31,0x08,0x43,0x52,0x45,0x32,  /* 000013C0    "RE1.CRE2" */\r
-    0x08,0x43,0x52,0x45,0x33,0x08,0x43,0x52,  /* 000013C8    ".CRE3.CR" */\r
-    0x45,0x34,0x08,0x00,0x48,0x05,0x4F,0x50,  /* 000013D0    "E4..H.OP" */\r
-    0x54,0x30,0x08,0x4F,0x50,0x54,0x31,0x08,  /* 000013D8    "T0.OPT1." */\r
-    0x4F,0x50,0x54,0x32,0x08,0x4F,0x50,0x54,  /* 000013E0    "OPT2.OPT" */\r
-    0x33,0x08,0x00,0x10,0x4F,0x50,0x54,0x36,  /* 000013E8    "3...OPT6" */\r
-    0x08,0x00,0x10,0x4F,0x50,0x54,0x39,0x08,  /* 000013F0    "...OPT9." */\r
-    0x14,0x0F,0x43,0x47,0x4C,0x44,0x01,0xA4,  /* 000013F8    "..CGLD.." */\r
-    0x83,0x88,0x44,0x43,0x41,0x54,0x68,0x00,  /* 00001400    "..DCATh." */\r
-    0x14,0x4E,0x04,0x44,0x53,0x54,0x41,0x01,  /* 00001408    ".N.DSTA." */\r
-    0x45,0x4E,0x46,0x47,0x43,0x47,0x4C,0x44,  /* 00001410    "ENFGCGLD" */\r
-    0x68,0x70,0x41,0x43,0x54,0x52,0x60,0x45,  /* 00001418    "hpACTR`E" */\r
-    0x58,0x46,0x47,0xA0,0x07,0x93,0x60,0x0A,  /* 00001420    "XFG...`." */\r
-    0xFF,0xA4,0x00,0x7B,0x60,0x01,0x60,0x7D,  /* 00001428    "...{`.`}" */\r
-    0x49,0x4F,0x53,0x54,0x79,0x60,0x68,0x00,  /* 00001430    "IOSTy`h." */\r
-    0x49,0x4F,0x53,0x54,0xA0,0x05,0x60,0xA4,  /* 00001438    "IOST..`." */\r
-    0x0A,0x0F,0xA1,0x14,0xA0,0x0E,0x7B,0x79,  /* 00001440    "......{y" */\r
-    0x01,0x68,0x00,0x49,0x4F,0x53,0x54,0x00,  /* 00001448    ".h.IOST." */\r
-    0xA4,0x0A,0x0D,0xA1,0x03,0xA4,0x00,0x14,  /* 00001450    "........" */\r
-    0x4F,0x04,0x44,0x43,0x4E,0x54,0x02,0x45,  /* 00001458    "O.DCNT.E" */\r
-    0x4E,0x46,0x47,0x43,0x47,0x4C,0x44,0x68,  /* 00001460    "NFGCGLDh" */\r
-    0x79,0x49,0x4F,0x41,0x48,0x0A,0x08,0x61,  /* 00001468    "yIOAH..a" */\r
-    0x7D,0x49,0x4F,0x41,0x4C,0x61,0x61,0x52,  /* 00001470    "}IOALaaR" */\r
-    0x52,0x49,0x4F,0x68,0x69,0x61,0x0A,0x08,  /* 00001478    "RIOhia.." */\r
-    0xA0,0x1C,0x90,0x95,0x44,0x4D,0x43,0x48,  /* 00001480    "....DMCH" */\r
-    0x0A,0x04,0x92,0x93,0x7B,0x44,0x4D,0x43,  /* 00001488    "....{DMC" */\r
-    0x48,0x0A,0x03,0x61,0x00,0x52,0x44,0x4D,  /* 00001490    "H..a.RDM" */\r
-    0x41,0x68,0x69,0x75,0x61,0x70,0x69,0x41,  /* 00001498    "AhiuapiA" */\r
-    0x43,0x54,0x52,0x45,0x58,0x46,0x47,0x08,  /* 000014A0    "CTREXFG." */\r
-    0x43,0x52,0x53,0x31,0x11,0x13,0x0A,0x10,  /* 000014A8    "CRS1...." */\r
-    0x47,0x01,0x00,0x00,0x00,0x00,0x01,0x00,  /* 000014B0    "G......." */\r
-    0x22,0x00,0x00,0x2A,0x00,0x00,0x79,0x00,  /* 000014B8    ""..*..y." */\r
-    0x8B,0x43,0x52,0x53,0x31,0x0A,0x09,0x49,  /* 000014C0    ".CRS1..I" */\r
-    0x52,0x51,0x4D,0x8C,0x43,0x52,0x53,0x31,  /* 000014C8    "RQM.CRS1" */\r
-    0x0A,0x0C,0x44,0x4D,0x41,0x4D,0x8B,0x43,  /* 000014D0    "..DMAM.C" */\r
-    0x52,0x53,0x31,0x0A,0x02,0x49,0x4F,0x31,  /* 000014D8    "RS1..IO1" */\r
-    0x31,0x8B,0x43,0x52,0x53,0x31,0x0A,0x04,  /* 000014E0    "1.CRS1.." */\r
-    0x49,0x4F,0x31,0x32,0x8C,0x43,0x52,0x53,  /* 000014E8    "IO12.CRS" */\r
-    0x31,0x0A,0x07,0x4C,0x45,0x4E,0x31,0x08,  /* 000014F0    "1..LEN1." */\r
-    0x43,0x52,0x53,0x32,0x11,0x1B,0x0A,0x18,  /* 000014F8    "CRS2...." */\r
-    0x47,0x01,0x00,0x00,0x00,0x00,0x01,0x00,  /* 00001500    "G......." */\r
-    0x47,0x01,0x00,0x00,0x00,0x00,0x01,0x00,  /* 00001508    "G......." */\r
-    0x22,0x40,0x00,0x2A,0x04,0x00,0x79,0x00,  /* 00001510    ""@.*..y." */\r
-    0x8B,0x43,0x52,0x53,0x32,0x0A,0x11,0x49,  /* 00001518    ".CRS2..I" */\r
-    0x52,0x51,0x45,0x8C,0x43,0x52,0x53,0x32,  /* 00001520    "RQE.CRS2" */\r
-    0x0A,0x14,0x44,0x4D,0x41,0x45,0x8B,0x43,  /* 00001528    "..DMAE.C" */\r
-    0x52,0x53,0x32,0x0A,0x02,0x49,0x4F,0x32,  /* 00001530    "RS2..IO2" */\r
-    0x31,0x8B,0x43,0x52,0x53,0x32,0x0A,0x04,  /* 00001538    "1.CRS2.." */\r
-    0x49,0x4F,0x32,0x32,0x8C,0x43,0x52,0x53,  /* 00001540    "IO22.CRS" */\r
-    0x32,0x0A,0x07,0x4C,0x45,0x4E,0x32,0x8B,  /* 00001548    "2..LEN2." */\r
-    0x43,0x52,0x53,0x32,0x0A,0x0A,0x49,0x4F,  /* 00001550    "CRS2..IO" */\r
-    0x33,0x31,0x8B,0x43,0x52,0x53,0x32,0x0A,  /* 00001558    "31.CRS2." */\r
-    0x0C,0x49,0x4F,0x33,0x32,0x8C,0x43,0x52,  /* 00001560    ".IO32.CR" */\r
-    0x53,0x32,0x0A,0x0F,0x4C,0x45,0x4E,0x33,  /* 00001568    "S2..LEN3" */\r
-    0x14,0x46,0x08,0x44,0x43,0x52,0x53,0x02,  /* 00001570    ".F.DCRS." */\r
-    0x45,0x4E,0x46,0x47,0x43,0x47,0x4C,0x44,  /* 00001578    "ENFGCGLD" */\r
-    0x68,0x79,0x49,0x4F,0x41,0x48,0x0A,0x08,  /* 00001580    "hyIOAH.." */\r
-    0x49,0x4F,0x31,0x31,0x7D,0x49,0x4F,0x41,  /* 00001588    "IO11}IOA" */\r
-    0x4C,0x49,0x4F,0x31,0x31,0x49,0x4F,0x31,  /* 00001590    "LIO11IO1" */\r
-    0x31,0x70,0x49,0x4F,0x31,0x31,0x49,0x4F,  /* 00001598    "1pIO11IO" */\r
-    0x31,0x32,0x74,0x82,0x49,0x4F,0x31,0x31,  /* 000015A0    "12t.IO11" */\r
-    0x00,0x01,0x60,0x79,0x01,0x60,0x4C,0x45,  /* 000015A8    "..`y.`LE" */\r
-    0x4E,0x31,0xA0,0x0F,0x49,0x4E,0x54,0x52,  /* 000015B0    "N1..INTR" */\r
-    0x79,0x01,0x49,0x4E,0x54,0x52,0x49,0x52,  /* 000015B8    "y.INTRIR" */\r
-    0x51,0x4D,0xA1,0x07,0x70,0x00,0x49,0x52,  /* 000015C0    "QM..p.IR" */\r
-    0x51,0x4D,0xA0,0x12,0x91,0x94,0x44,0x4D,  /* 000015C8    "QM....DM" */\r
-    0x43,0x48,0x0A,0x03,0x93,0x69,0x00,0x70,  /* 000015D0    "CH...i.p" */\r
-    0x00,0x44,0x4D,0x41,0x4D,0xA1,0x10,0x7B,  /* 000015D8    ".DMAM..{" */\r
-    0x44,0x4D,0x43,0x48,0x0A,0x03,0x61,0x79,  /* 000015E0    "DMCH..ay" */\r
-    0x01,0x61,0x44,0x4D,0x41,0x4D,0x45,0x58,  /* 000015E8    ".aDMAMEX" */\r
-    0x46,0x47,0xA4,0x43,0x52,0x53,0x31,0x14,  /* 000015F0    "FG.CRS1." */\r
-    0x4F,0x07,0x44,0x53,0x52,0x53,0x02,0x8B,  /* 000015F8    "O.DSRS.." */\r
-    0x68,0x0A,0x09,0x49,0x52,0x51,0x4D,0x8C,  /* 00001600    "h..IRQM." */\r
-    0x68,0x0A,0x0C,0x44,0x4D,0x41,0x4D,0x8B,  /* 00001608    "h..DMAM." */\r
-    0x68,0x0A,0x02,0x49,0x4F,0x31,0x31,0x45,  /* 00001610    "h..IO11E" */\r
-    0x4E,0x46,0x47,0x43,0x47,0x4C,0x44,0x69,  /* 00001618    "NFGCGLDi" */\r
-    0x7B,0x49,0x4F,0x31,0x31,0x0A,0xFF,0x49,  /* 00001620    "{IO11..I" */\r
-    0x4F,0x41,0x4C,0x7A,0x49,0x4F,0x31,0x31,  /* 00001628    "OALzIO11" */\r
-    0x0A,0x08,0x49,0x4F,0x41,0x48,0xA0,0x12,  /* 00001630    "..IOAH.." */\r
-    0x49,0x52,0x51,0x4D,0x82,0x49,0x52,0x51,  /* 00001638    "IRQM.IRQ" */\r
-    0x4D,0x60,0x74,0x60,0x01,0x49,0x4E,0x54,  /* 00001640    "M`t`.INT" */\r
-    0x52,0xA1,0x07,0x70,0x00,0x49,0x4E,0x54,  /* 00001648    "R..p.INT" */\r
-    0x52,0xA0,0x12,0x44,0x4D,0x41,0x4D,0x82,  /* 00001650    "R..DMAM." */\r
-    0x44,0x4D,0x41,0x4D,0x60,0x74,0x60,0x01,  /* 00001658    "DMAM`t`." */\r
-    0x44,0x4D,0x43,0x48,0xA1,0x08,0x70,0x0A,  /* 00001660    "DMCH..p." */\r
-    0x04,0x44,0x4D,0x43,0x48,0x45,0x58,0x46,  /* 00001668    ".DMCHEXF" */\r
-    0x47,0x44,0x43,0x4E,0x54,0x69,0x01,0x5B,  /* 00001670    "GDCNTi.[" */\r
-    0x82,0x4A,0x18,0x52,0x4D,0x53,0x43,0x08,  /* 00001678    ".J.RMSC." */\r
-    0x5F,0x48,0x49,0x44,0x0C,0x41,0xD0,0x0C,  /* 00001680    "_HID.A.." */\r
-    0x02,0x08,0x5F,0x55,0x49,0x44,0x0A,0x10,  /* 00001688    ".._UID.." */\r
-    0x08,0x43,0x52,0x53,0x5F,0x11,0x4E,0x09,  /* 00001690    ".CRS_.N." */\r
-    0x0A,0x9A,0x47,0x01,0x10,0x00,0x10,0x00,  /* 00001698    "..G....." */\r
-    0x00,0x10,0x47,0x01,0x22,0x00,0x22,0x00,  /* 000016A0    "..G."."." */\r
-    0x00,0x1E,0x47,0x01,0x44,0x00,0x44,0x00,  /* 000016A8    "..G.D.D." */\r
-    0x00,0x1C,0x47,0x01,0x62,0x00,0x62,0x00,  /* 000016B0    "..G.b.b." */\r
-    0x00,0x02,0x47,0x01,0x65,0x00,0x65,0x00,  /* 000016B8    "..G.e.e." */\r
-    0x00,0x0B,0x47,0x01,0x72,0x00,0x72,0x00,  /* 000016C0    "..G.r.r." */\r
-    0x00,0x0E,0x47,0x01,0x80,0x00,0x80,0x00,  /* 000016C8    "..G....." */\r
-    0x00,0x01,0x47,0x01,0x84,0x00,0x84,0x00,  /* 000016D0    "..G....." */\r
-    0x00,0x03,0x47,0x01,0x88,0x00,0x88,0x00,  /* 000016D8    "..G....." */\r
-    0x00,0x01,0x47,0x01,0x8C,0x00,0x8C,0x00,  /* 000016E0    "..G....." */\r
-    0x00,0x03,0x47,0x01,0x90,0x00,0x90,0x00,  /* 000016E8    "..G....." */\r
-    0x00,0x10,0x47,0x01,0xA2,0x00,0xA2,0x00,  /* 000016F0    "..G....." */\r
-    0x00,0x1E,0x47,0x01,0xE0,0x00,0xE0,0x00,  /* 000016F8    "..G....." */\r
-    0x00,0x10,0x47,0x01,0xD0,0x04,0xD0,0x04,  /* 00001700    "..G....." */\r
-    0x00,0x02,0x47,0x01,0x00,0x00,0x00,0x00,  /* 00001708    "..G....." */\r
-    0x00,0x00,0x47,0x01,0x00,0x00,0x00,0x00,  /* 00001710    "..G....." */\r
-    0x00,0x00,0x47,0x01,0x00,0x00,0x00,0x00,  /* 00001718    "..G....." */\r
-    0x00,0x00,0x47,0x01,0x00,0xDE,0x00,0xDE,  /* 00001720    "..G....." */\r
-    0x00,0x80,0x47,0x01,0x80,0xDE,0x80,0xDE,  /* 00001728    "..G....." */\r
-    0x00,0x80,0x79,0x00,0x14,0x4E,0x0C,0x5F,  /* 00001730    "..y..N._" */\r
-    0x43,0x52,0x53,0x00,0x8B,0x43,0x52,0x53,  /* 00001738    "CRS..CRS" */\r
-    0x5F,0x0A,0x72,0x47,0x50,0x30,0x30,0x8B,  /* 00001740    "_.rGP00." */\r
-    0x43,0x52,0x53,0x5F,0x0A,0x74,0x47,0x50,  /* 00001748    "CRS_.tGP" */\r
-    0x30,0x31,0x8C,0x43,0x52,0x53,0x5F,0x0A,  /* 00001750    "01.CRS_." */\r
-    0x77,0x47,0x50,0x30,0x4C,0x70,0x50,0x4D,  /* 00001758    "wGP0LpPM" */\r
-    0x42,0x53,0x47,0x50,0x30,0x30,0x70,0x50,  /* 00001760    "BSGP00pP" */\r
-    0x4D,0x42,0x53,0x47,0x50,0x30,0x31,0x70,  /* 00001768    "MBSGP01p" */\r
-    0x50,0x4D,0x4C,0x4E,0x47,0x50,0x30,0x4C,  /* 00001770    "PMLNGP0L" */\r
-    0xA0,0x42,0x04,0x53,0x4D,0x42,0x53,0x8B,  /* 00001778    ".B.SMBS." */\r
-    0x43,0x52,0x53,0x5F,0x0A,0x7A,0x47,0x50,  /* 00001780    "CRS_.zGP" */\r
-    0x31,0x30,0x8B,0x43,0x52,0x53,0x5F,0x0A,  /* 00001788    "10.CRS_." */\r
-    0x7C,0x47,0x50,0x31,0x31,0x8C,0x43,0x52,  /* 00001790    "|GP11.CR" */\r
-    0x53,0x5F,0x0A,0x7F,0x47,0x50,0x31,0x4C,  /* 00001798    "S_..GP1L" */\r
-    0x70,0x53,0x4D,0x42,0x53,0x47,0x50,0x31,  /* 000017A0    "pSMBSGP1" */\r
-    0x30,0x70,0x53,0x4D,0x42,0x53,0x47,0x50,  /* 000017A8    "0pSMBSGP" */\r
-    0x31,0x31,0x70,0x53,0x4D,0x42,0x4C,0x47,  /* 000017B0    "11pSMBLG" */\r
-    0x50,0x31,0x4C,0xA0,0x42,0x04,0x47,0x50,  /* 000017B8    "P1L.B.GP" */\r
-    0x42,0x53,0x8B,0x43,0x52,0x53,0x5F,0x0A,  /* 000017C0    "BS.CRS_." */\r
-    0x82,0x47,0x50,0x32,0x30,0x8B,0x43,0x52,  /* 000017C8    ".GP20.CR" */\r
-    0x53,0x5F,0x0A,0x84,0x47,0x50,0x32,0x31,  /* 000017D0    "S_..GP21" */\r
-    0x8C,0x43,0x52,0x53,0x5F,0x0A,0x87,0x47,  /* 000017D8    ".CRS_..G" */\r
-    0x50,0x32,0x4C,0x70,0x47,0x50,0x42,0x53,  /* 000017E0    "P2LpGPBS" */\r
-    0x47,0x50,0x32,0x30,0x70,0x47,0x50,0x42,  /* 000017E8    "GP20pGPB" */\r
-    0x53,0x47,0x50,0x32,0x31,0x70,0x47,0x50,  /* 000017F0    "SGP21pGP" */\r
-    0x4C,0x4E,0x47,0x50,0x32,0x4C,0xA4,0x43,  /* 000017F8    "LNGP2L.C" */\r
-    0x52,0x53,0x5F,0x5B,0x82,0x47,0x05,0x48,  /* 00001800    "RS_[.G.H" */\r
-    0x50,0x45,0x54,0x08,0x5F,0x48,0x49,0x44,  /* 00001808    "PET._HID" */\r
-    0x0C,0x41,0xD0,0x01,0x03,0x08,0x5F,0x43,  /* 00001810    ".A...._C" */\r
-    0x52,0x53,0x11,0x17,0x0A,0x14,0x22,0x01,  /* 00001818    "RS...."." */\r
-    0x00,0x22,0x00,0x01,0x86,0x09,0x00,0x00,  /* 00001820    "."......" */\r
-    0x00,0x10,0xC0,0xFE,0x00,0x04,0x00,0x00,  /* 00001828    "........" */\r
-    0x79,0x00,0x5B,0x80,0x5E,0x4C,0x50,0x43,  /* 00001830    "y.[.^LPC" */\r
-    0x52,0x02,0x0A,0xA0,0x01,0x5B,0x81,0x0B,  /* 00001838    "R....[.." */\r
-    0x4C,0x50,0x43,0x52,0x01,0x48,0x50,0x54,  /* 00001840    "LPCR.HPT" */\r
-    0x45,0x01,0x14,0x11,0x5F,0x53,0x54,0x41,  /* 00001848    "E..._STA" */\r
-    0x00,0xA0,0x08,0x48,0x50,0x54,0x45,0xA4,  /* 00001850    "...HPTE." */\r
-    0x0A,0x0F,0xA4,0x00,0x5B,0x82,0x46,0x0F,  /* 00001858    "....[.F." */\r
-    0x4F,0x4D,0x53,0x43,0x08,0x5F,0x48,0x49,  /* 00001860    "OMSC._HI" */\r
-    0x44,0x0C,0x41,0xD0,0x0C,0x02,0x08,0x5F,  /* 00001868    "D.A...._" */\r
-    0x55,0x49,0x44,0x00,0x08,0x43,0x52,0x53,  /* 00001870    "UID..CRS" */\r
-    0x5F,0x11,0x46,0x04,0x0A,0x42,0x47,0x01,  /* 00001878    "_.F..BG." */\r
-    0x4E,0x00,0x4E,0x00,0x00,0x02,0x47,0x01,  /* 00001880    "N.N...G." */\r
-    0xA2,0x0C,0xA2,0x0C,0x00,0x02,0x86,0x09,  /* 00001888    "........" */\r
-    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00001890    "........" */\r
-    0x00,0x00,0x86,0x09,0x00,0x00,0x00,0x00,  /* 00001898    "........" */\r
-    0x00,0x00,0x00,0x00,0x00,0x00,0x86,0x09,  /* 000018A0    "........" */\r
-    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 000018A8    "........" */\r
-    0x00,0x00,0x86,0x09,0x00,0x00,0x00,0x00,  /* 000018B0    "........" */\r
-    0x78,0xFF,0x00,0x00,0x08,0x00,0x79,0x00,  /* 000018B8    "x.....y." */\r
-    0x08,0x42,0x4D,0x49,0x4F,0x0A,0x4E,0x14,  /* 000018C0    ".BMIO.N." */\r
-    0x4C,0x08,0x5F,0x43,0x52,0x53,0x00,0xA0,  /* 000018C8    "L._CRS.." */\r
-    0x4C,0x06,0x41,0x50,0x43,0x42,0x8A,0x43,  /* 000018D0    "L.APCB.C" */\r
-    0x52,0x53,0x5F,0x0A,0x18,0x4D,0x4C,0x30,  /* 000018D8    "RS_..ML0" */\r
-    0x31,0x8A,0x43,0x52,0x53,0x5F,0x0A,0x14,  /* 000018E0    "1.CRS_.." */\r
-    0x4D,0x42,0x30,0x31,0x8A,0x43,0x52,0x53,  /* 000018E8    "MB01.CRS" */\r
-    0x5F,0x0A,0x24,0x4D,0x4C,0x30,0x32,0x8A,  /* 000018F0    "_.$ML02." */\r
-    0x43,0x52,0x53,0x5F,0x0A,0x20,0x4D,0x42,  /* 000018F8    "CRS_. MB" */\r
-    0x30,0x32,0x8A,0x43,0x52,0x53,0x5F,0x0A,  /* 00001900    "02.CRS_." */\r
-    0x30,0x4D,0x4C,0x30,0x33,0x8A,0x43,0x52,  /* 00001908    "0ML03.CR" */\r
-    0x53,0x5F,0x0A,0x2C,0x4D,0x42,0x30,0x33,  /* 00001910    "S_.,MB03" */\r
-    0x70,0x41,0x50,0x43,0x42,0x4D,0x42,0x30,  /* 00001918    "pAPCBMB0" */\r
-    0x31,0x70,0x41,0x50,0x43,0x4C,0x4D,0x4C,  /* 00001920    "1pAPCLML" */\r
-    0x30,0x31,0x70,0x0C,0x00,0x00,0xE0,0xFE,  /* 00001928    "01p....." */\r
-    0x4D,0x42,0x30,0x32,0x70,0x0B,0x00,0x10,  /* 00001930    "MB02p..." */\r
-    0x4D,0x4C,0x30,0x32,0x70,0x52,0x4F,0x4D,  /* 00001938    "ML02pROM" */\r
-    0x53,0x4D,0x42,0x30,0x33,0x74,0x00,0x52,  /* 00001940    "SMB03t.R" */\r
-    0x4F,0x4D,0x53,0x4D,0x4C,0x30,0x33,0xA4,  /* 00001948    "OMSML03." */\r
-    0x43,0x52,0x53,0x5F,0x5B,0x82,0x47,0x14,  /* 00001950    "CRS_[.G." */\r
-    0x5E,0x5E,0x52,0x4D,0x45,0x4D,0x08,0x5F,  /* 00001958    "^^RMEM._" */\r
-    0x48,0x49,0x44,0x0C,0x41,0xD0,0x0C,0x01,  /* 00001960    "HID.A..." */\r
-    0x08,0x5F,0x55,0x49,0x44,0x01,0x08,0x43,  /* 00001968    "._UID..C" */\r
-    0x52,0x53,0x5F,0x11,0x42,0x04,0x0A,0x3E,  /* 00001970    "RS_.B..>" */\r
-    0x86,0x09,0x00,0x01,0x00,0x00,0x00,0x00,  /* 00001978    "........" */\r
-    0x00,0x00,0x0A,0x00,0x86,0x09,0x00,0x00,  /* 00001980    "........" */\r
-    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00001988    "........" */\r
-    0x86,0x09,0x00,0x00,0x00,0x00,0x0E,0x00,  /* 00001990    "........" */\r
-    0x00,0x00,0x02,0x00,0x86,0x09,0x00,0x01,  /* 00001998    "........" */\r
-    0x00,0x00,0x10,0x00,0x00,0x00,0x00,0x00,  /* 000019A0    "........" */\r
-    0x86,0x09,0x00,0x00,0x00,0x00,0x00,0x00,  /* 000019A8    "........" */\r
-    0x00,0x00,0x00,0x00,0x79,0x00,0x14,0x46,  /* 000019B0    "....y..F" */\r
-    0x0E,0x5F,0x43,0x52,0x53,0x00,0x8A,0x43,  /* 000019B8    "._CRS..C" */\r
-    0x52,0x53,0x5F,0x0A,0x10,0x42,0x41,0x53,  /* 000019C0    "RS_..BAS" */\r
-    0x31,0x8A,0x43,0x52,0x53,0x5F,0x0A,0x14,  /* 000019C8    "1.CRS_.." */\r
-    0x4C,0x45,0x4E,0x31,0x8A,0x43,0x52,0x53,  /* 000019D0    "LEN1.CRS" */\r
-    0x5F,0x0A,0x1C,0x42,0x41,0x53,0x32,0x8A,  /* 000019D8    "_..BAS2." */\r
-    0x43,0x52,0x53,0x5F,0x0A,0x20,0x4C,0x45,  /* 000019E0    "CRS_. LE" */\r
-    0x4E,0x32,0x8A,0x43,0x52,0x53,0x5F,0x0A,  /* 000019E8    "N2.CRS_." */\r
-    0x2C,0x4C,0x45,0x4E,0x33,0x8A,0x43,0x52,  /* 000019F0    ",LEN3.CR" */\r
-    0x53,0x5F,0x0A,0x34,0x42,0x41,0x53,0x34,  /* 000019F8    "S_.4BAS4" */\r
-    0x8A,0x43,0x52,0x53,0x5F,0x0A,0x38,0x4C,  /* 00001A00    ".CRS_.8L" */\r
-    0x45,0x4E,0x34,0xA0,0x05,0x4F,0x53,0x46,  /* 00001A08    "EN4..OSF" */\r
-    0x4C,0xA1,0x41,0x06,0xA0,0x28,0x4D,0x47,  /* 00001A10    "L.A..(MG" */\r
-    0x31,0x42,0xA0,0x22,0x94,0x4D,0x47,0x31,  /* 00001A18    "1B.".MG1" */\r
-    0x42,0x0C,0x00,0x00,0x0C,0x00,0x70,0x0C,  /* 00001A20    "B.....p." */\r
-    0x00,0x00,0x0C,0x00,0x42,0x41,0x53,0x31,  /* 00001A28    "....BAS1" */\r
-    0x74,0x4D,0x47,0x31,0x42,0x42,0x41,0x53,  /* 00001A30    "tMG1BBAS" */\r
-    0x31,0x4C,0x45,0x4E,0x31,0xA1,0x15,0x70,  /* 00001A38    "1LEN1..p" */\r
-    0x0C,0x00,0x00,0x0C,0x00,0x42,0x41,0x53,  /* 00001A40    ".....BAS" */\r
-    0x31,0x70,0x0C,0x00,0x00,0x02,0x00,0x4C,  /* 00001A48    "1p.....L" */\r
-    0x45,0x4E,0x31,0xA0,0x1F,0x72,0x4D,0x47,  /* 00001A50    "EN1..rMG" */\r
-    0x31,0x42,0x4D,0x47,0x31,0x4C,0x60,0x70,  /* 00001A58    "1BMG1L`p" */\r
-    0x60,0x42,0x41,0x53,0x32,0x74,0x0C,0x00,  /* 00001A60    "`BAS2t.." */\r
-    0x00,0x10,0x00,0x42,0x41,0x53,0x32,0x4C,  /* 00001A68    "...BAS2L" */\r
-    0x45,0x4E,0x32,0x74,0x4D,0x47,0x32,0x42,  /* 00001A70    "EN2tMG2B" */\r
-    0x0C,0x00,0x00,0x10,0x00,0x4C,0x45,0x4E,  /* 00001A78    ".....LEN" */\r
-    0x33,0x72,0x4D,0x47,0x32,0x42,0x4D,0x47,  /* 00001A80    "3rMG2BMG" */\r
-    0x32,0x4C,0x42,0x41,0x53,0x34,0x74,0x00,  /* 00001A88    "2LBAS4t." */\r
-    0x42,0x41,0x53,0x34,0x4C,0x45,0x4E,0x34,  /* 00001A90    "BAS4LEN4" */\r
-    0xA4,0x43,0x52,0x53,0x5F,0x5B,0x82,0x43,  /* 00001A98    ".CRS_[.C" */\r
-    0x05,0x47,0x4F,0x4C,0x41,0x08,0x5F,0x41,  /* 00001AA0    ".GOLA._A" */\r
-    0x44,0x52,0x0C,0x00,0x00,0x01,0x00,0x5B,  /* 00001AA8    "DR.....[" */\r
-    0x80,0x42,0x41,0x52,0x30,0x02,0x00,0x0A,  /* 00001AB0    ".BAR0..." */\r
-    0x50,0x5B,0x81,0x16,0x42,0x41,0x52,0x30,  /* 00001AB8    "P[..BAR0" */\r
-    0x01,0x00,0x40,0x04,0x52,0x49,0x44,0x5F,  /* 00001AC0    "..@.RID_" */\r
-    0x08,0x00,0x48,0x1B,0x4E,0x41,0x50,0x43,  /* 00001AC8    "..H.NAPC" */\r
-    0x01,0x14,0x20,0x50,0x43,0x4D,0x5F,0x01,  /* 00001AD0    ".. PCM_." */\r
-    0xA0,0x19,0x95,0x52,0x49,0x44,0x5F,0x0A,  /* 00001AD8    "...RID_." */\r
-    0x12,0xA0,0x08,0x68,0x70,0x00,0x4E,0x41,  /* 00001AE0    "...hp.NA" */\r
-    0x50,0x43,0xA1,0x07,0x70,0x01,0x4E,0x41,  /* 00001AE8    "PC..p.NA" */\r
-    0x50,0x43,0x5B,0x82,0x43,0x05,0x47,0x4F,  /* 00001AF0    "PC[.C.GO" */\r
-    0x4C,0x42,0x08,0x5F,0x41,0x44,0x52,0x0C,  /* 00001AF8    "LB._ADR." */\r
-    0x00,0x00,0x02,0x00,0x5B,0x80,0x42,0x41,  /* 00001B00    "....[.BA" */\r
-    0x52,0x30,0x02,0x00,0x0A,0x50,0x5B,0x81,  /* 00001B08    "R0...P[." */\r
-    0x16,0x42,0x41,0x52,0x30,0x01,0x00,0x40,  /* 00001B10    ".BAR0..@" */\r
-    0x04,0x52,0x49,0x44,0x5F,0x08,0x00,0x48,  /* 00001B18    ".RID_..H" */\r
-    0x1B,0x4E,0x41,0x50,0x43,0x01,0x14,0x20,  /* 00001B20    ".NAPC.. " */\r
-    0x50,0x43,0x4D,0x5F,0x01,0xA0,0x19,0x95,  /* 00001B28    "PCM_...." */\r
-    0x52,0x49,0x44,0x5F,0x0A,0x12,0xA0,0x08,  /* 00001B30    "RID_...." */\r
-    0x68,0x70,0x00,0x4E,0x41,0x50,0x43,0xA1,  /* 00001B38    "hp.NAPC." */\r
-    0x07,0x70,0x01,0x4E,0x41,0x50,0x43,0x5B,  /* 00001B40    ".p.NAPC[" */\r
-    0x82,0x19,0x50,0x4D,0x46,0x5F,0x08,0x5F,  /* 00001B48    "..PMF_._" */\r
-    0x41,0x44,0x52,0x0C,0x03,0x00,0x04,0x00,  /* 00001B50    "ADR....." */\r
-    0x5B,0x80,0x42,0x41,0x52,0x30,0x02,0x00,  /* 00001B58    "[.BAR0.." */\r
-    0x0A,0xFF,0x5B,0x82,0x4D,0x92,0x49,0x44,  /* 00001B60    "..[.M.ID" */\r
-    0x45,0x30,0x08,0x5F,0x41,0x44,0x52,0x0C,  /* 00001B68    "E0._ADR." */\r
-    0x01,0x00,0x04,0x00,0x08,0x52,0x45,0x47,  /* 00001B70    ".....REG" */\r
-    0x46,0x01,0x14,0x12,0x5F,0x52,0x45,0x47,  /* 00001B78    "F..._REG" */\r
-    0x02,0xA0,0x0B,0x93,0x68,0x0A,0x02,0x70,  /* 00001B80    "....h..p" */\r
-    0x69,0x52,0x45,0x47,0x46,0x5B,0x80,0x42,  /* 00001B88    "iREGF[.B" */\r
-    0x41,0x52,0x30,0x02,0x00,0x0A,0x60,0x5B,  /* 00001B90    "AR0...`[" */\r
-    0x81,0x4C,0x0B,0x42,0x41,0x52,0x30,0x01,  /* 00001B98    ".L.BAR0." */\r
-    0x00,0x40,0x20,0x53,0x43,0x45,0x4E,0x01,  /* 00001BA0    ".@ SCEN." */\r
-    0x50,0x43,0x45,0x4E,0x01,0x00,0x0A,0x53,  /* 00001BA8    "PCEN...S" */\r
-    0x50,0x57,0x42,0x01,0x53,0x52,0x50,0x42,  /* 00001BB0    "PWB.SRPB" */\r
-    0x01,0x50,0x50,0x57,0x42,0x01,0x50,0x52,  /* 00001BB8    ".PPWB.PR" */\r
-    0x50,0x42,0x01,0x50,0x4D,0x38,0x30,0x01,  /* 00001BC0    "PB.PM80." */\r
-    0x50,0x53,0x38,0x30,0x01,0x53,0x4D,0x38,  /* 00001BC8    "PS80.SM8" */\r
-    0x30,0x01,0x53,0x53,0x38,0x30,0x01,0x00,  /* 00001BD0    "0.SS80.." */\r
-    0x2C,0x53,0x53,0x52,0x54,0x04,0x53,0x53,  /* 00001BD8    ",SSRT.SS" */\r
-    0x50,0x57,0x04,0x53,0x4D,0x52,0x54,0x04,  /* 00001BE0    "PW.SMRT." */\r
-    0x53,0x4D,0x50,0x57,0x04,0x50,0x53,0x52,  /* 00001BE8    "SMPW.PSR" */\r
-    0x54,0x04,0x50,0x53,0x50,0x57,0x04,0x50,  /* 00001BF0    "T.PSPW.P" */\r
-    0x4D,0x52,0x54,0x04,0x50,0x4D,0x50,0x57,  /* 00001BF8    "MRT.PMPW" */\r
-    0x04,0x53,0x53,0x41,0x44,0x02,0x53,0x4D,  /* 00001C00    ".SSAD.SM" */\r
-    0x41,0x44,0x02,0x50,0x53,0x41,0x44,0x02,  /* 00001C08    "AD.PSAD." */\r
-    0x50,0x4D,0x41,0x44,0x02,0x00,0x08,0x53,  /* 00001C10    "PMAD...S" */\r
-    0x58,0x52,0x54,0x04,0x53,0x58,0x50,0x57,  /* 00001C18    "XRT.SXPW" */\r
-    0x04,0x50,0x58,0x52,0x54,0x04,0x50,0x58,  /* 00001C20    ".PXRT.PX" */\r
-    0x50,0x57,0x04,0x53,0x53,0x55,0x44,0x08,  /* 00001C28    "PW.SSUD." */\r
-    0x53,0x4D,0x55,0x44,0x08,0x50,0x53,0x55,  /* 00001C30    "SMUD.PSU" */\r
-    0x44,0x08,0x50,0x4D,0x55,0x44,0x08,0x50,  /* 00001C38    "D.PMUD.P" */\r
-    0x50,0x44,0x4E,0x01,0x50,0x50,0x44,0x53,  /* 00001C40    "PDN.PPDS" */\r
-    0x01,0x00,0x02,0x53,0x50,0x44,0x4E,0x01,  /* 00001C48    "...SPDN." */\r
-    0x53,0x50,0x44,0x53,0x01,0x08,0x54,0x49,  /* 00001C50    "SPDS..TI" */\r
-    0x4D,0x30,0x12,0x46,0x05,0x06,0x12,0x0E,  /* 00001C58    "M0.F...." */\r
-    0x05,0x0A,0x78,0x0A,0xB4,0x0A,0xF0,0x0B,  /* 00001C60    "..x....." */\r
-    0x86,0x01,0x0B,0x58,0x02,0x12,0x10,0x07,  /* 00001C68    "...X...." */\r
-    0x0A,0x78,0x0A,0x5A,0x0A,0x3C,0x0A,0x2D,  /* 00001C70    ".x.Z.<.-" */\r
-    0x0A,0x1E,0x0A,0x14,0x0A,0x0F,0x12,0x0D,  /* 00001C78    "........" */\r
-    0x08,0x0A,0x04,0x0A,0x03,0x0A,0x02,0x01,  /* 00001C80    "........" */\r
-    0x00,0x00,0x00,0x00,0x12,0x06,0x03,0x0A,  /* 00001C88    "........" */\r
-    0x02,0x01,0x00,0x12,0x0C,0x05,0x0A,0x20,  /* 00001C90    "....... " */\r
-    0x0A,0x22,0x0A,0x42,0x0A,0x65,0x0A,0xA8,  /* 00001C98    ".".B.e.." */\r
-    0x12,0x10,0x07,0x0A,0xC2,0x0A,0xC1,0x0A,  /* 00001CA0    "........" */\r
-    0xC0,0x0A,0xC4,0x0A,0xC5,0x0A,0xC6,0x0A,  /* 00001CA8    "........" */\r
-    0xC7,0x08,0x54,0x4D,0x44,0x30,0x11,0x03,  /* 00001CB0    "..TMD0.." */\r
-    0x0A,0x14,0x8A,0x54,0x4D,0x44,0x30,0x00,  /* 00001CB8    "...TMD0." */\r
-    0x50,0x49,0x4F,0x30,0x8A,0x54,0x4D,0x44,  /* 00001CC0    "PIO0.TMD" */\r
-    0x30,0x0A,0x04,0x44,0x4D,0x41,0x30,0x8A,  /* 00001CC8    "0..DMA0." */\r
-    0x54,0x4D,0x44,0x30,0x0A,0x08,0x50,0x49,  /* 00001CD0    "TMD0..PI" */\r
-    0x4F,0x31,0x8A,0x54,0x4D,0x44,0x30,0x0A,  /* 00001CD8    "O1.TMD0." */\r
-    0x0C,0x44,0x4D,0x41,0x31,0x8A,0x54,0x4D,  /* 00001CE0    ".DMA1.TM" */\r
-    0x44,0x30,0x0A,0x10,0x43,0x48,0x4E,0x46,  /* 00001CE8    "D0..CHNF" */\r
-    0x5B,0x82,0x42,0x0F,0x43,0x48,0x4E,0x30,  /* 00001CF0    "[.B.CHN0" */\r
-    0x08,0x5F,0x41,0x44,0x52,0x00,0x14,0x14,  /* 00001CF8    "._ADR..." */\r
-    0x5F,0x53,0x54,0x41,0x00,0xA0,0x08,0x50,  /* 00001D00    "_STA...P" */\r
-    0x43,0x45,0x4E,0xA4,0x0A,0x0F,0xA1,0x04,  /* 00001D08    "CEN....." */\r
-    0xA4,0x0A,0x09,0x14,0x23,0x5F,0x47,0x54,  /* 00001D10    "....#_GT" */\r
-    0x4D,0x00,0xA4,0x47,0x54,0x4D,0x5F,0x50,  /* 00001D18    "M..GTM_P" */\r
-    0x4D,0x50,0x57,0x50,0x4D,0x52,0x54,0x50,  /* 00001D20    "MPWPMRTP" */\r
-    0x53,0x50,0x57,0x50,0x53,0x52,0x54,0x50,  /* 00001D28    "SPWPSRTP" */\r
-    0x4D,0x55,0x44,0x50,0x53,0x55,0x44,0x14,  /* 00001D30    "MUDPSUD." */\r
-    0x42,0x07,0x5F,0x53,0x54,0x4D,0x03,0x70,  /* 00001D38    "B._STM.p" */\r
-    0x68,0x54,0x4D,0x44,0x30,0x70,0x53,0x54,  /* 00001D40    "hTMD0pST" */\r
-    0x4D,0x5F,0x60,0x7B,0x60,0x0A,0xFF,0x50,  /* 00001D48    "M_`{`..P" */\r
-    0x53,0x55,0x44,0x7A,0x60,0x0A,0x08,0x60,  /* 00001D50    "SUDz`..`" */\r
-    0x7B,0x60,0x0A,0xFF,0x50,0x4D,0x55,0x44,  /* 00001D58    "{`..PMUD" */\r
-    0x7A,0x60,0x0A,0x08,0x60,0x7B,0x60,0x0A,  /* 00001D60    "z`..`{`." */\r
-    0x0F,0x50,0x53,0x52,0x54,0x7A,0x60,0x0A,  /* 00001D68    ".PSRTz`." */\r
-    0x04,0x60,0x7B,0x60,0x0A,0x0F,0x50,0x53,  /* 00001D70    ".`{`..PS" */\r
-    0x50,0x57,0x7A,0x60,0x0A,0x04,0x60,0x7B,  /* 00001D78    "PWz`..`{" */\r
-    0x60,0x0A,0x0F,0x50,0x4D,0x52,0x54,0x7A,  /* 00001D80    "`..PMRTz" */\r
-    0x60,0x0A,0x04,0x60,0x7B,0x60,0x0A,0x0F,  /* 00001D88    "`..`{`.." */\r
-    0x50,0x4D,0x50,0x57,0x70,0x47,0x54,0x46,  /* 00001D90    "PMPWpGTF" */\r
-    0x5F,0x00,0x69,0x41,0x54,0x41,0x30,0x70,  /* 00001D98    "_.iATA0p" */\r
-    0x47,0x54,0x46,0x5F,0x01,0x6A,0x41,0x54,  /* 00001DA0    "GTF_.jAT" */\r
-    0x41,0x31,0x5B,0x82,0x1B,0x44,0x52,0x56,  /* 00001DA8    "A1[..DRV" */\r
-    0x30,0x08,0x5F,0x41,0x44,0x52,0x00,0x14,  /* 00001DB0    "0._ADR.." */\r
-    0x0F,0x5F,0x47,0x54,0x46,0x00,0xA4,0x52,  /* 00001DB8    "._GTF..R" */\r
-    0x41,0x54,0x41,0x41,0x54,0x41,0x30,0x5B,  /* 00001DC0    "ATAATA0[" */\r
-    0x82,0x1B,0x44,0x52,0x56,0x31,0x08,0x5F,  /* 00001DC8    "..DRV1._" */\r
-    0x41,0x44,0x52,0x01,0x14,0x0F,0x5F,0x47,  /* 00001DD0    "ADR..._G" */\r
-    0x54,0x46,0x00,0xA4,0x52,0x41,0x54,0x41,  /* 00001DD8    "TF..RATA" */\r
-    0x41,0x54,0x41,0x31,0x5B,0x82,0x42,0x0F,  /* 00001DE0    "ATA1[.B." */\r
-    0x43,0x48,0x4E,0x31,0x08,0x5F,0x41,0x44,  /* 00001DE8    "CHN1._AD" */\r
-    0x52,0x01,0x14,0x14,0x5F,0x53,0x54,0x41,  /* 00001DF0    "R..._STA" */\r
-    0x00,0xA0,0x08,0x53,0x43,0x45,0x4E,0xA4,  /* 00001DF8    "...SCEN." */\r
-    0x0A,0x0F,0xA1,0x04,0xA4,0x0A,0x09,0x14,  /* 00001E00    "........" */\r
-    0x23,0x5F,0x47,0x54,0x4D,0x00,0xA4,0x47,  /* 00001E08    "#_GTM..G" */\r
-    0x54,0x4D,0x5F,0x53,0x4D,0x50,0x57,0x53,  /* 00001E10    "TM_SMPWS" */\r
-    0x4D,0x52,0x54,0x53,0x53,0x50,0x57,0x53,  /* 00001E18    "MRTSSPWS" */\r
-    0x53,0x52,0x54,0x53,0x4D,0x55,0x44,0x53,  /* 00001E20    "SRTSMUDS" */\r
-    0x53,0x55,0x44,0x14,0x42,0x07,0x5F,0x53,  /* 00001E28    "SUD.B._S" */\r
-    0x54,0x4D,0x03,0x70,0x68,0x54,0x4D,0x44,  /* 00001E30    "TM.phTMD" */\r
-    0x30,0x70,0x53,0x54,0x4D,0x5F,0x60,0x7B,  /* 00001E38    "0pSTM_`{" */\r
-    0x60,0x0A,0xFF,0x53,0x53,0x55,0x44,0x7A,  /* 00001E40    "`..SSUDz" */\r
-    0x60,0x0A,0x08,0x60,0x7B,0x60,0x0A,0xFF,  /* 00001E48    "`..`{`.." */\r
-    0x53,0x4D,0x55,0x44,0x7A,0x60,0x0A,0x08,  /* 00001E50    "SMUDz`.." */\r
-    0x60,0x7B,0x60,0x0A,0x0F,0x53,0x53,0x52,  /* 00001E58    "`{`..SSR" */\r
-    0x54,0x7A,0x60,0x0A,0x04,0x60,0x7B,0x60,  /* 00001E60    "Tz`..`{`" */\r
-    0x0A,0x0F,0x53,0x53,0x50,0x57,0x7A,0x60,  /* 00001E68    "..SSPWz`" */\r
-    0x0A,0x04,0x60,0x7B,0x60,0x0A,0x0F,0x53,  /* 00001E70    "..`{`..S" */\r
-    0x4D,0x52,0x54,0x7A,0x60,0x0A,0x04,0x60,  /* 00001E78    "MRTz`..`" */\r
-    0x7B,0x60,0x0A,0x0F,0x53,0x4D,0x50,0x57,  /* 00001E80    "{`..SMPW" */\r
-    0x70,0x47,0x54,0x46,0x5F,0x00,0x69,0x41,  /* 00001E88    "pGTF_.iA" */\r
-    0x54,0x41,0x32,0x70,0x47,0x54,0x46,0x5F,  /* 00001E90    "TA2pGTF_" */\r
-    0x01,0x6A,0x41,0x54,0x41,0x33,0x5B,0x82,  /* 00001E98    ".jATA3[." */\r
-    0x1B,0x44,0x52,0x56,0x30,0x08,0x5F,0x41,  /* 00001EA0    ".DRV0._A" */\r
-    0x44,0x52,0x00,0x14,0x0F,0x5F,0x47,0x54,  /* 00001EA8    "DR..._GT" */\r
-    0x46,0x00,0xA4,0x52,0x41,0x54,0x41,0x41,  /* 00001EB0    "F..RATAA" */\r
-    0x54,0x41,0x32,0x5B,0x82,0x1B,0x44,0x52,  /* 00001EB8    "TA2[..DR" */\r
-    0x56,0x31,0x08,0x5F,0x41,0x44,0x52,0x01,  /* 00001EC0    "V1._ADR." */\r
-    0x14,0x0F,0x5F,0x47,0x54,0x46,0x00,0xA4,  /* 00001EC8    ".._GTF.." */\r
-    0x52,0x41,0x54,0x41,0x41,0x54,0x41,0x33,  /* 00001ED0    "RATAATA3" */\r
-    0x14,0x45,0x15,0x47,0x54,0x4D,0x5F,0x0E,  /* 00001ED8    ".E.GTM_." */\r
-    0x70,0xFF,0x50,0x49,0x4F,0x30,0x70,0xFF,  /* 00001EE0    "p.PIO0p." */\r
-    0x50,0x49,0x4F,0x31,0x70,0xFF,0x44,0x4D,  /* 00001EE8    "PIO1p.DM" */\r
-    0x41,0x30,0x70,0xFF,0x44,0x4D,0x41,0x31,  /* 00001EF0    "A0p.DMA1" */\r
-    0x70,0x0A,0x1A,0x43,0x48,0x4E,0x46,0xA0,  /* 00001EF8    "p..CHNF." */\r
-    0x05,0x52,0x45,0x47,0x46,0xA1,0x06,0xA4,  /* 00001F00    ".REGF..." */\r
-    0x54,0x4D,0x44,0x30,0x72,0x68,0x69,0x60,  /* 00001F08    "TMD0rhi`" */\r
-    0x72,0x60,0x0A,0x02,0x60,0x77,0x60,0x0A,  /* 00001F10    "r`..`w`." */\r
-    0x1E,0x50,0x49,0x4F,0x30,0x72,0x6A,0x6B,  /* 00001F18    ".PIO0rjk" */\r
-    0x60,0x72,0x60,0x0A,0x02,0x60,0x77,0x60,  /* 00001F20    "`r`..`w`" */\r
-    0x0A,0x1E,0x50,0x49,0x4F,0x31,0xA0,0x41,  /* 00001F28    "..PIO1.A" */\r
-    0x07,0x7B,0x6C,0x0A,0x40,0x00,0x7D,0x43,  /* 00001F30    ".{l.@.}C" */\r
-    0x48,0x4E,0x46,0x01,0x43,0x48,0x4E,0x46,  /* 00001F38    "HNF.CHNF" */\r
-    0x7B,0x6C,0x0A,0x07,0x60,0xA0,0x12,0x95,  /* 00001F40    "{l..`..." */\r
-    0x60,0x0A,0x04,0x72,0x60,0x0A,0x02,0x60,  /* 00001F48    "`..r`..`" */\r
-    0x77,0x60,0x0A,0x1E,0x44,0x4D,0x41,0x30,  /* 00001F50    "w`..DMA0" */\r
-    0xA1,0x47,0x04,0xA0,0x0C,0x93,0x60,0x0A,  /* 00001F58    ".G....`." */\r
-    0x04,0x70,0x0A,0x2D,0x44,0x4D,0x41,0x30,  /* 00001F60    ".p.-DMA0" */\r
-    0xA1,0x37,0xA0,0x0C,0x93,0x60,0x0A,0x05,  /* 00001F68    ".7...`.." */\r
-    0x70,0x0A,0x1E,0x44,0x4D,0x41,0x30,0xA1,  /* 00001F70    "p..DMA0." */\r
-    0x28,0xA0,0x0C,0x93,0x60,0x0A,0x06,0x70,  /* 00001F78    "(...`..p" */\r
-    0x0A,0x14,0x44,0x4D,0x41,0x30,0xA1,0x19,  /* 00001F80    "..DMA0.." */\r
-    0xA0,0x0C,0x93,0x60,0x0A,0x07,0x70,0x0A,  /* 00001F88    "...`..p." */\r
-    0x0F,0x44,0x4D,0x41,0x30,0xA1,0x0A,0x70,  /* 00001F90    ".DMA0..p" */\r
-    0x50,0x49,0x4F,0x30,0x44,0x4D,0x41,0x30,  /* 00001F98    "PIO0DMA0" */\r
-    0xA1,0x0A,0x70,0x50,0x49,0x4F,0x30,0x44,  /* 00001FA0    "..pPIO0D" */\r
-    0x4D,0x41,0x30,0xA0,0x42,0x07,0x7B,0x6D,  /* 00001FA8    "MA0.B.{m" */\r
-    0x0A,0x40,0x00,0x7D,0x43,0x48,0x4E,0x46,  /* 00001FB0    ".@.}CHNF" */\r
-    0x0A,0x04,0x43,0x48,0x4E,0x46,0x7B,0x6D,  /* 00001FB8    "..CHNF{m" */\r
-    0x0A,0x07,0x60,0xA0,0x12,0x95,0x60,0x0A,  /* 00001FC0    "..`...`." */\r
-    0x04,0x72,0x60,0x0A,0x02,0x60,0x77,0x60,  /* 00001FC8    ".r`..`w`" */\r
-    0x0A,0x1E,0x44,0x4D,0x41,0x31,0xA1,0x47,  /* 00001FD0    "..DMA1.G" */\r
-    0x04,0xA0,0x0C,0x93,0x60,0x0A,0x04,0x70,  /* 00001FD8    "....`..p" */\r
-    0x0A,0x2D,0x44,0x4D,0x41,0x31,0xA1,0x37,  /* 00001FE0    ".-DMA1.7" */\r
-    0xA0,0x0C,0x93,0x60,0x0A,0x05,0x70,0x0A,  /* 00001FE8    "...`..p." */\r
-    0x1E,0x44,0x4D,0x41,0x31,0xA1,0x28,0xA0,  /* 00001FF0    ".DMA1.(." */\r
-    0x0C,0x93,0x60,0x0A,0x06,0x70,0x0A,0x14,  /* 00001FF8    "..`..p.." */\r
-    0x44,0x4D,0x41,0x31,0xA1,0x19,0xA0,0x0C,  /* 00002000    "DMA1...." */\r
-    0x93,0x60,0x0A,0x07,0x70,0x0A,0x0F,0x44,  /* 00002008    ".`..p..D" */\r
-    0x4D,0x41,0x30,0xA1,0x0A,0x70,0x50,0x49,  /* 00002010    "MA0..pPI" */\r
-    0x4F,0x31,0x44,0x4D,0x41,0x31,0xA1,0x0A,  /* 00002018    "O1DMA1.." */\r
-    0x70,0x50,0x49,0x4F,0x31,0x44,0x4D,0x41,  /* 00002020    "pPIO1DMA" */\r
-    0x31,0xA4,0x54,0x4D,0x44,0x30,0x14,0x41,  /* 00002028    "1.TMD0.A" */\r
-    0x11,0x53,0x54,0x4D,0x5F,0x08,0xA0,0x05,  /* 00002030    ".STM_..." */\r
-    0x52,0x45,0x47,0x46,0xA1,0x03,0xA4,0xFF,  /* 00002038    "REGF...." */\r
-    0xA0,0x0B,0x93,0x50,0x49,0x4F,0x30,0xFF,  /* 00002040    "...PIO0." */\r
-    0x70,0x0A,0xA8,0x61,0xA1,0x25,0x7B,0x89,  /* 00002048    "p..a.%{." */\r
-    0x83,0x88,0x54,0x49,0x4D,0x30,0x00,0x00,  /* 00002050    "..TIM0.." */\r
-    0x04,0x50,0x49,0x4F,0x30,0x00,0x00,0x00,  /* 00002058    ".PIO0..." */\r
-    0x0A,0x07,0x60,0x70,0x83,0x88,0x83,0x88,  /* 00002060    "..`p...." */\r
-    0x54,0x49,0x4D,0x30,0x0A,0x04,0x00,0x60,  /* 00002068    "TIM0...`" */\r
-    0x00,0x61,0x79,0x61,0x0A,0x08,0x61,0xA0,  /* 00002070    ".aya..a." */\r
-    0x0C,0x93,0x50,0x49,0x4F,0x31,0xFF,0x7D,  /* 00002078    "..PIO1.}" */\r
-    0x61,0x0A,0xA8,0x61,0xA1,0x26,0x7B,0x89,  /* 00002080    "a..a.&{." */\r
-    0x83,0x88,0x54,0x49,0x4D,0x30,0x00,0x00,  /* 00002088    "..TIM0.." */\r
-    0x04,0x50,0x49,0x4F,0x31,0x00,0x00,0x00,  /* 00002090    ".PIO1..." */\r
-    0x0A,0x07,0x60,0x7D,0x83,0x88,0x83,0x88,  /* 00002098    "..`}...." */\r
-    0x54,0x49,0x4D,0x30,0x0A,0x04,0x00,0x60,  /* 000020A0    "TIM0...`" */\r
-    0x00,0x61,0x61,0x79,0x61,0x0A,0x08,0x61,  /* 000020A8    ".aaya..a" */\r
-    0xA0,0x0C,0x93,0x44,0x4D,0x41,0x30,0xFF,  /* 000020B0    "...DMA0." */\r
-    0x7D,0x61,0x0A,0x03,0x61,0xA1,0x36,0xA0,  /* 000020B8    "}a..a.6." */\r
-    0x2D,0x7B,0x43,0x48,0x4E,0x46,0x01,0x00,  /* 000020C0    "-{CHNF.." */\r
-    0x7B,0x89,0x83,0x88,0x54,0x49,0x4D,0x30,  /* 000020C8    "{...TIM0" */\r
-    0x01,0x00,0x02,0x44,0x4D,0x41,0x30,0x00,  /* 000020D0    "...DMA0." */\r
-    0x00,0x00,0x0A,0x07,0x60,0x7D,0x83,0x88,  /* 000020D8    "....`}.." */\r
-    0x83,0x88,0x54,0x49,0x4D,0x30,0x0A,0x05,  /* 000020E0    "..TIM0.." */\r
-    0x00,0x60,0x00,0x61,0x61,0xA1,0x06,0x7D,  /* 000020E8    ".`.aa..}" */\r
-    0x61,0x0A,0x03,0x61,0x79,0x61,0x0A,0x08,  /* 000020F0    "a..aya.." */\r
-    0x61,0xA0,0x0C,0x93,0x44,0x4D,0x41,0x31,  /* 000020F8    "a...DMA1" */\r
-    0xFF,0x7D,0x61,0x0A,0x03,0x61,0xA1,0x37,  /* 00002100    ".}a..a.7" */\r
-    0xA0,0x2E,0x7B,0x43,0x48,0x4E,0x46,0x0A,  /* 00002108    "..{CHNF." */\r
-    0x04,0x00,0x7B,0x89,0x83,0x88,0x54,0x49,  /* 00002110    "..{...TI" */\r
-    0x4D,0x30,0x01,0x00,0x02,0x44,0x4D,0x41,  /* 00002118    "M0...DMA" */\r
-    0x31,0x00,0x00,0x00,0x0A,0x07,0x60,0x7D,  /* 00002120    "1.....`}" */\r
-    0x83,0x88,0x83,0x88,0x54,0x49,0x4D,0x30,  /* 00002128    "....TIM0" */\r
-    0x0A,0x05,0x00,0x60,0x00,0x61,0x61,0xA1,  /* 00002130    "...`.aa." */\r
-    0x06,0x7D,0x61,0x0A,0x03,0x61,0xA4,0x61,  /* 00002138    ".}a..a.a" */\r
-    0x08,0x41,0x54,0x30,0x31,0x11,0x0A,0x0A,  /* 00002140    ".AT01..." */\r
-    0x07,0x03,0x00,0x00,0x00,0x00,0x00,0xEF,  /* 00002148    "........" */\r
-    0x08,0x41,0x54,0x30,0x32,0x11,0x0A,0x0A,  /* 00002150    ".AT02..." */\r
-    0x07,0x00,0x00,0x00,0x00,0x00,0x00,0x90,  /* 00002158    "........" */\r
-    0x08,0x41,0x54,0x30,0x33,0x11,0x0A,0x0A,  /* 00002160    ".AT03..." */\r
-    0x07,0x00,0x00,0x00,0x00,0x00,0x00,0xC6,  /* 00002168    "........" */\r
-    0x08,0x41,0x54,0x30,0x34,0x11,0x0A,0x0A,  /* 00002170    ".AT04..." */\r
-    0x07,0x00,0x00,0x00,0x00,0x00,0x00,0x91,  /* 00002178    "........" */\r
-    0x08,0x41,0x54,0x41,0x30,0x11,0x03,0x0A,  /* 00002180    ".ATA0..." */\r
-    0x1D,0x08,0x41,0x54,0x41,0x31,0x11,0x03,  /* 00002188    "..ATA1.." */\r
-    0x0A,0x1D,0x08,0x41,0x54,0x41,0x32,0x11,  /* 00002190    "...ATA2." */\r
-    0x03,0x0A,0x1D,0x08,0x41,0x54,0x41,0x33,  /* 00002198    "....ATA3" */\r
-    0x11,0x03,0x0A,0x1D,0x08,0x41,0x54,0x41,  /* 000021A0    ".....ATA" */\r
-    0x42,0x11,0x03,0x0A,0x1D,0x8C,0x41,0x54,  /* 000021A8    "B.....AT" */\r
-    0x41,0x42,0x00,0x43,0x4D,0x44,0x43,0x14,  /* 000021B0    "AB.CMDC." */\r
-    0x4C,0x05,0x47,0x54,0x46,0x42,0x0B,0x77,  /* 000021B8    "L.GTFB.w" */\r
-    0x43,0x4D,0x44,0x43,0x0A,0x38,0x60,0x72,  /* 000021C0    "CMDC.8`r" */\r
-    0x60,0x0A,0x08,0x61,0x5B,0x13,0x41,0x54,  /* 000021C8    "`..a[.AT" */\r
-    0x41,0x42,0x61,0x0A,0x38,0x43,0x4D,0x44,  /* 000021D0    "ABa.8CMD" */\r
-    0x58,0x77,0x43,0x4D,0x44,0x43,0x0A,0x07,  /* 000021D8    "XwCMDC.." */\r
-    0x60,0x8C,0x41,0x54,0x41,0x42,0x72,0x60,  /* 000021E0    "`.ATABr`" */\r
-    0x0A,0x02,0x00,0x41,0x30,0x30,0x31,0x8C,  /* 000021E8    "...A001." */\r
-    0x41,0x54,0x41,0x42,0x72,0x60,0x0A,0x06,  /* 000021F0    "ATABr`.." */\r
-    0x00,0x41,0x30,0x30,0x35,0x70,0x68,0x43,  /* 000021F8    ".A005phC" */\r
-    0x4D,0x44,0x58,0x70,0x69,0x41,0x30,0x30,  /* 00002200    "MDXpiA00" */\r
-    0x31,0x70,0x6A,0x41,0x30,0x30,0x35,0x75,  /* 00002208    "1pjA005u" */\r
-    0x43,0x4D,0x44,0x43,0x14,0x40,0x25,0x47,  /* 00002210    "CMDC.@%G" */\r
-    0x54,0x46,0x5F,0x0A,0x70,0x69,0x5B,0x31,  /* 00002218    "TF_.pi[1" */\r
-    0x70,0x00,0x43,0x4D,0x44,0x43,0x08,0x49,  /* 00002220    "p.CMDC.I" */\r
-    0x44,0x34,0x39,0x0B,0x00,0x0C,0x08,0x49,  /* 00002228    "D49....I" */\r
-    0x44,0x35,0x39,0x00,0x08,0x49,0x44,0x35,  /* 00002230    "D59..ID5" */\r
-    0x33,0x0A,0x04,0x08,0x49,0x44,0x36,0x33,  /* 00002238    "3...ID63" */\r
-    0x0B,0x00,0x0F,0x08,0x49,0x44,0x38,0x38,  /* 00002240    "....ID88" */\r
-    0x0B,0x00,0x0F,0x08,0x49,0x52,0x44,0x59,  /* 00002248    "....IRDY" */\r
-    0x01,0x08,0x50,0x49,0x4F,0x54,0x00,0x08,  /* 00002250    "..PIOT.." */\r
-    0x44,0x4D,0x41,0x54,0x00,0xA0,0x4D,0x05,  /* 00002258    "DMAT..M." */\r
-    0x93,0x87,0x69,0x0B,0x00,0x02,0x8B,0x69,  /* 00002260    "..i....i" */\r
-    0x0A,0x62,0x49,0x57,0x34,0x39,0x70,0x49,  /* 00002268    ".bIW49pI" */\r
-    0x57,0x34,0x39,0x49,0x44,0x34,0x39,0x8B,  /* 00002270    "W49ID49." */\r
-    0x69,0x0A,0x6A,0x49,0x57,0x35,0x33,0x70,  /* 00002278    "i.jIW53p" */\r
-    0x49,0x57,0x35,0x33,0x49,0x44,0x35,0x33,  /* 00002280    "IW53ID53" */\r
-    0x8B,0x69,0x0A,0x7E,0x49,0x57,0x36,0x33,  /* 00002288    ".i.~IW63" */\r
-    0x70,0x49,0x57,0x36,0x33,0x49,0x44,0x36,  /* 00002290    "pIW63ID6" */\r
-    0x33,0x8B,0x69,0x0A,0x76,0x49,0x57,0x35,  /* 00002298    "3.i.vIW5" */\r
-    0x39,0x70,0x49,0x57,0x35,0x39,0x49,0x44,  /* 000022A0    "9pIW59ID" */\r
-    0x35,0x39,0x8B,0x69,0x0A,0xB0,0x49,0x57,  /* 000022A8    "59.i..IW" */\r
-    0x38,0x38,0x70,0x49,0x57,0x38,0x38,0x49,  /* 000022B0    "88pIW88I" */\r
-    0x44,0x38,0x38,0x70,0x0A,0xA0,0x67,0xA0,  /* 000022B8    "D88p..g." */\r
-    0x43,0x06,0x68,0x70,0x0A,0xB0,0x67,0x7B,  /* 000022C0    "C.hp..g{" */\r
-    0x43,0x48,0x4E,0x46,0x0A,0x08,0x49,0x52,  /* 000022C8    "CHNF..IR" */\r
-    0x44,0x59,0xA0,0x12,0x7B,0x43,0x48,0x4E,  /* 000022D0    "DY..{CHN" */\r
-    0x46,0x0A,0x10,0x00,0x70,0x50,0x49,0x4F,  /* 000022D8    "F...pPIO" */\r
-    0x31,0x50,0x49,0x4F,0x54,0xA1,0x0A,0x70,  /* 000022E0    "1PIOT..p" */\r
-    0x50,0x49,0x4F,0x30,0x50,0x49,0x4F,0x54,  /* 000022E8    "PIO0PIOT" */\r
-    0xA0,0x27,0x7B,0x43,0x48,0x4E,0x46,0x0A,  /* 000022F0    ".'{CHNF." */\r
-    0x04,0x00,0xA0,0x12,0x7B,0x43,0x48,0x4E,  /* 000022F8    "....{CHN" */\r
-    0x46,0x0A,0x10,0x00,0x70,0x44,0x4D,0x41,  /* 00002300    "F...pDMA" */\r
-    0x31,0x44,0x4D,0x41,0x54,0xA1,0x0A,0x70,  /* 00002308    "1DMAT..p" */\r
-    0x44,0x4D,0x41,0x30,0x44,0x4D,0x41,0x54,  /* 00002310    "DMA0DMAT" */\r
-    0xA1,0x0A,0x70,0x50,0x49,0x4F,0x31,0x44,  /* 00002318    "..pPIO1D" */\r
-    0x4D,0x41,0x54,0xA1,0x27,0x7B,0x43,0x48,  /* 00002320    "MAT.'{CH" */\r
-    0x4E,0x46,0x0A,0x02,0x49,0x52,0x44,0x59,  /* 00002328    "NF..IRDY" */\r
-    0x70,0x50,0x49,0x4F,0x30,0x50,0x49,0x4F,  /* 00002330    "pPIO0PIO" */\r
-    0x54,0xA0,0x11,0x7B,0x43,0x48,0x4E,0x46,  /* 00002338    "T..{CHNF" */\r
-    0x01,0x00,0x70,0x44,0x4D,0x41,0x30,0x44,  /* 00002340    "..pDMA0D" */\r
-    0x4D,0x41,0x54,0xA0,0x44,0x04,0x90,0x90,  /* 00002348    "MAT.D..." */\r
-    0x7B,0x49,0x44,0x35,0x33,0x0A,0x04,0x00,  /* 00002350    "{ID53..." */\r
-    0x7B,0x49,0x44,0x38,0x38,0x0B,0x00,0xFF,  /* 00002358    "{ID88..." */\r
-    0x00,0x44,0x4D,0x41,0x54,0x70,0x89,0x83,  /* 00002360    ".DMATp.." */\r
-    0x88,0x54,0x49,0x4D,0x30,0x01,0x00,0x02,  /* 00002368    ".TIM0..." */\r
-    0x44,0x4D,0x41,0x54,0x00,0x00,0x00,0x61,  /* 00002370    "DMAT...a" */\r
-    0xA0,0x09,0x94,0x61,0x0A,0x06,0x70,0x0A,  /* 00002378    "...a..p." */\r
-    0x06,0x61,0x47,0x54,0x46,0x42,0x41,0x54,  /* 00002380    ".aGTFBAT" */\r
-    0x30,0x31,0x7D,0x0A,0x40,0x61,0x00,0x67,  /* 00002388    "01}.@a.g" */\r
-    0xA1,0x46,0x05,0xA0,0x43,0x05,0x90,0x7B,  /* 00002390    ".F..C..{" */\r
-    0x49,0x44,0x36,0x33,0x0B,0x00,0xFF,0x00,  /* 00002398    "ID63...." */\r
-    0x50,0x49,0x4F,0x54,0x7B,0x89,0x83,0x88,  /* 000023A0    "PIOT{..." */\r
-    0x54,0x49,0x4D,0x30,0x00,0x00,0x04,0x50,  /* 000023A8    "TIM0...P" */\r
-    0x49,0x4F,0x54,0x00,0x00,0x00,0x0A,0x07,  /* 000023B0    "IOT....." */\r
-    0x60,0xA0,0x12,0x60,0xA0,0x0A,0x7B,0x60,  /* 000023B8    "`..`..{`" */\r
-    0x0A,0x04,0x00,0x70,0x0A,0x02,0x60,0xA1,  /* 000023C0    "...p..`." */\r
-    0x04,0x70,0x01,0x60,0x7D,0x0A,0x20,0x83,  /* 000023C8    ".p.`}. ." */\r
-    0x88,0x83,0x88,0x54,0x49,0x4D,0x30,0x0A,  /* 000023D0    "...TIM0." */\r
-    0x03,0x00,0x60,0x00,0x61,0x47,0x54,0x46,  /* 000023D8    "..`.aGTF" */\r
-    0x42,0x41,0x54,0x30,0x31,0x61,0x67,0xA0,  /* 000023E0    "BAT01ag." */\r
-    0x35,0x49,0x52,0x44,0x59,0x7B,0x89,0x83,  /* 000023E8    "5IRDY{.." */\r
-    0x88,0x54,0x49,0x4D,0x30,0x00,0x00,0x04,  /* 000023F0    ".TIM0..." */\r
-    0x50,0x49,0x4F,0x54,0x00,0x00,0x00,0x0A,  /* 000023F8    "PIOT...." */\r
-    0x07,0x60,0x7D,0x0A,0x08,0x83,0x88,0x83,  /* 00002400    ".`}....." */\r
-    0x88,0x54,0x49,0x4D,0x30,0x0A,0x02,0x00,  /* 00002408    ".TIM0..." */\r
-    0x60,0x00,0x61,0x47,0x54,0x46,0x42,0x41,  /* 00002410    "`.aGTFBA" */\r
-    0x54,0x30,0x31,0x61,0x67,0xA1,0x16,0xA0,  /* 00002418    "T01ag..." */\r
-    0x14,0x7B,0x49,0x44,0x34,0x39,0x0B,0x00,  /* 00002420    ".{ID49.." */\r
-    0x04,0x00,0x47,0x54,0x46,0x42,0x41,0x54,  /* 00002428    "..GTFBAT" */\r
-    0x30,0x31,0x01,0x67,0xA0,0x24,0x90,0x7B,  /* 00002430    "01.g.$.{" */\r
-    0x49,0x44,0x35,0x39,0x0B,0x00,0x01,0x00,  /* 00002438    "ID59...." */\r
-    0x7B,0x49,0x44,0x35,0x39,0x0A,0xFF,0x00,  /* 00002440    "{ID59..." */\r
-    0x47,0x54,0x46,0x42,0x41,0x54,0x30,0x33,  /* 00002448    "GTFBAT03" */\r
-    0x7B,0x49,0x44,0x35,0x39,0x0A,0xFF,0x00,  /* 00002450    "{ID59..." */\r
-    0x67,0x70,0x41,0x54,0x41,0x42,0x5B,0x31,  /* 00002458    "gpATAB[1" */\r
-    0xA4,0x41,0x54,0x41,0x42,0x14,0x2B,0x52,  /* 00002460    ".ATAB.+R" */\r
-    0x41,0x54,0x41,0x01,0x8C,0x68,0x00,0x43,  /* 00002468    "ATA..h.C" */\r
-    0x4D,0x44,0x4E,0x77,0x43,0x4D,0x44,0x4E,  /* 00002470    "MDNwCMDN" */\r
-    0x0A,0x38,0x60,0x5B,0x13,0x68,0x0A,0x08,  /* 00002478    ".8`[.h.." */\r
-    0x60,0x52,0x45,0x54,0x42,0x70,0x52,0x45,  /* 00002480    "`RETBpRE" */\r
-    0x54,0x42,0x5B,0x31,0xA4,0x52,0x45,0x54,  /* 00002488    "TB[1.RET" */\r
-    0x42,0x5B,0x82,0x48,0x1E,0x50,0x43,0x49,  /* 00002490    "B[.H.PCI" */\r
-    0x42,0x08,0x5F,0x48,0x49,0x44,0x0C,0x41,  /* 00002498    "B._HID.A" */\r
-    0xD0,0x0A,0x03,0x08,0x5F,0x41,0x44,0x52,  /* 000024A0    "...._ADR" */\r
-    0x0C,0x02,0x00,0x19,0x00,0x14,0x0A,0x5E,  /* 000024A8    ".......^" */\r
-    0x42,0x4E,0x30,0x42,0x00,0xA4,0x0A,0x05,  /* 000024B0    "BN0B...." */\r
-    0x14,0x0B,0x5F,0x42,0x42,0x4E,0x00,0xA4,  /* 000024B8    ".._BBN.." */\r
-    0x42,0x4E,0x30,0x42,0x08,0x5F,0x55,0x49,  /* 000024C0    "BN0B._UI" */\r
-    0x44,0x0A,0x0B,0x5B,0x82,0x4A,0x06,0x47,  /* 000024C8    "D..[.J.G" */\r
-    0x4F,0x4C,0x43,0x08,0x5F,0x41,0x44,0x52,  /* 000024D0    "OLC._ADR" */\r
-    0x0C,0x00,0x00,0x01,0x00,0x5B,0x80,0x42,  /* 000024D8    ".....[.B" */\r
-    0x41,0x52,0x30,0x02,0x00,0x0A,0x50,0x5B,  /* 000024E0    "AR0...P[" */\r
-    0x81,0x16,0x42,0x41,0x52,0x30,0x01,0x00,  /* 000024E8    "..BAR0.." */\r
-    0x40,0x04,0x52,0x49,0x44,0x5F,0x08,0x00,  /* 000024F0    "@.RID_.." */\r
-    0x48,0x1B,0x4E,0x41,0x50,0x43,0x01,0x14,  /* 000024F8    "H.NAPC.." */\r
-    0x20,0x50,0x43,0x4D,0x5F,0x01,0xA0,0x19,  /* 00002500    " PCM_..." */\r
-    0x95,0x52,0x49,0x44,0x5F,0x0A,0x12,0xA0,  /* 00002508    ".RID_..." */\r
-    0x08,0x68,0x70,0x00,0x4E,0x41,0x50,0x43,  /* 00002510    ".hp.NAPC" */\r
-    0xA1,0x07,0x70,0x01,0x4E,0x41,0x50,0x43,  /* 00002518    "..p.NAPC" */\r
-    0x14,0x16,0x5F,0x50,0x52,0x54,0x00,0xA0,  /* 00002520    ".._PRT.." */\r
-    0x0A,0x50,0x49,0x43,0x4D,0xA4,0x41,0x52,  /* 00002528    ".PICM.AR" */\r
-    0x35,0x32,0xA4,0x50,0x52,0x35,0x32,0x5B,  /* 00002530    "52.PR52[" */\r
-    0x82,0x4A,0x06,0x47,0x4F,0x4C,0x44,0x08,  /* 00002538    ".J.GOLD." */\r
-    0x5F,0x41,0x44,0x52,0x0C,0x00,0x00,0x02,  /* 00002540    "_ADR...." */\r
-    0x00,0x5B,0x80,0x42,0x41,0x52,0x30,0x02,  /* 00002548    ".[.BAR0." */\r
-    0x00,0x0A,0x50,0x5B,0x81,0x16,0x42,0x41,  /* 00002550    "..P[..BA" */\r
-    0x52,0x30,0x01,0x00,0x40,0x04,0x52,0x49,  /* 00002558    "R0..@.RI" */\r
-    0x44,0x5F,0x08,0x00,0x48,0x1B,0x4E,0x41,  /* 00002560    "D_..H.NA" */\r
-    0x50,0x43,0x01,0x14,0x20,0x50,0x43,0x4D,  /* 00002568    "PC.. PCM" */\r
-    0x5F,0x01,0xA0,0x19,0x95,0x52,0x49,0x44,  /* 00002570    "_....RID" */\r
-    0x5F,0x0A,0x12,0xA0,0x08,0x68,0x70,0x00,  /* 00002578    "_....hp." */\r
-    0x4E,0x41,0x50,0x43,0xA1,0x07,0x70,0x01,  /* 00002580    "NAPC..p." */\r
-    0x4E,0x41,0x50,0x43,0x14,0x16,0x5F,0x50,  /* 00002588    "NAPC.._P" */\r
-    0x52,0x54,0x00,0xA0,0x0A,0x50,0x49,0x43,  /* 00002590    "RT...PIC" */\r
-    0x4D,0xA4,0x41,0x52,0x35,0x33,0xA4,0x50,  /* 00002598    "M.AR53.P" */\r
-    0x52,0x35,0x33,0x5B,0x82,0x4A,0x06,0x47,  /* 000025A0    "R53[.J.G" */\r
-    0x4F,0x4C,0x45,0x08,0x5F,0x41,0x44,0x52,  /* 000025A8    "OLE._ADR" */\r
-    0x0C,0x00,0x00,0x03,0x00,0x5B,0x80,0x42,  /* 000025B0    ".....[.B" */\r
-    0x41,0x52,0x30,0x02,0x00,0x0A,0x50,0x5B,  /* 000025B8    "AR0...P[" */\r
-    0x81,0x16,0x42,0x41,0x52,0x30,0x01,0x00,  /* 000025C0    "..BAR0.." */\r
-    0x40,0x04,0x52,0x49,0x44,0x5F,0x08,0x00,  /* 000025C8    "@.RID_.." */\r
-    0x48,0x1B,0x4E,0x41,0x50,0x43,0x01,0x14,  /* 000025D0    "H.NAPC.." */\r
-    0x20,0x50,0x43,0x4D,0x5F,0x01,0xA0,0x19,  /* 000025D8    " PCM_..." */\r
-    0x95,0x52,0x49,0x44,0x5F,0x0A,0x12,0xA0,  /* 000025E0    ".RID_..." */\r
-    0x08,0x68,0x70,0x00,0x4E,0x41,0x50,0x43,  /* 000025E8    ".hp.NAPC" */\r
-    0xA1,0x07,0x70,0x01,0x4E,0x41,0x50,0x43,  /* 000025F0    "..p.NAPC" */\r
-    0x14,0x16,0x5F,0x50,0x52,0x54,0x00,0xA0,  /* 000025F8    ".._PRT.." */\r
-    0x0A,0x50,0x49,0x43,0x4D,0xA4,0x41,0x52,  /* 00002600    ".PICM.AR" */\r
-    0x35,0x34,0xA4,0x50,0x52,0x35,0x34,0x5B,  /* 00002608    "54.PR54[" */\r
-    0x82,0x4A,0x06,0x47,0x4F,0x4C,0x46,0x08,  /* 00002610    ".J.GOLF." */\r
-    0x5F,0x41,0x44,0x52,0x0C,0x00,0x00,0x04,  /* 00002618    "_ADR...." */\r
-    0x00,0x5B,0x80,0x42,0x41,0x52,0x30,0x02,  /* 00002620    ".[.BAR0." */\r
-    0x00,0x0A,0x50,0x5B,0x81,0x16,0x42,0x41,  /* 00002628    "..P[..BA" */\r
-    0x52,0x30,0x01,0x00,0x40,0x04,0x52,0x49,  /* 00002630    "R0..@.RI" */\r
-    0x44,0x5F,0x08,0x00,0x48,0x1B,0x4E,0x41,  /* 00002638    "D_..H.NA" */\r
-    0x50,0x43,0x01,0x14,0x20,0x50,0x43,0x4D,  /* 00002640    "PC.. PCM" */\r
-    0x5F,0x01,0xA0,0x19,0x95,0x52,0x49,0x44,  /* 00002648    "_....RID" */\r
-    0x5F,0x0A,0x12,0xA0,0x08,0x68,0x70,0x00,  /* 00002650    "_....hp." */\r
-    0x4E,0x41,0x50,0x43,0xA1,0x07,0x70,0x01,  /* 00002658    "NAPC..p." */\r
-    0x4E,0x41,0x50,0x43,0x14,0x16,0x5F,0x50,  /* 00002660    "NAPC.._P" */\r
-    0x52,0x54,0x00,0xA0,0x0A,0x50,0x49,0x43,  /* 00002668    "RT...PIC" */\r
-    0x4D,0xA4,0x41,0x52,0x35,0x35,0xA4,0x50,  /* 00002670    "M.AR55.P" */\r
-    0x52,0x35,0x35,0x5B,0x82,0x48,0x1E,0x50,  /* 00002678    "R55[.H.P" */\r
-    0x43,0x49,0x43,0x08,0x5F,0x48,0x49,0x44,  /* 00002680    "CIC._HID" */\r
-    0x0C,0x41,0xD0,0x0A,0x03,0x08,0x5F,0x41,  /* 00002688    ".A...._A" */\r
-    0x44,0x52,0x0C,0x02,0x00,0x1A,0x00,0x14,  /* 00002690    "DR......" */\r
-    0x0A,0x5E,0x42,0x4E,0x30,0x43,0x00,0xA4,  /* 00002698    ".^BN0C.." */\r
-    0x0A,0x0C,0x14,0x0B,0x5F,0x42,0x42,0x4E,  /* 000026A0    "...._BBN" */\r
-    0x00,0xA4,0x42,0x4E,0x30,0x43,0x08,0x5F,  /* 000026A8    "..BN0C._" */\r
-    0x55,0x49,0x44,0x0A,0x0C,0x5B,0x82,0x4A,  /* 000026B0    "UID..[.J" */\r
-    0x06,0x47,0x4F,0x4C,0x47,0x08,0x5F,0x41,  /* 000026B8    ".GOLG._A" */\r
-    0x44,0x52,0x0C,0x00,0x00,0x01,0x00,0x5B,  /* 000026C0    "DR.....[" */\r
-    0x80,0x42,0x41,0x52,0x30,0x02,0x00,0x0A,  /* 000026C8    ".BAR0..." */\r
-    0x50,0x5B,0x81,0x16,0x42,0x41,0x52,0x30,  /* 000026D0    "P[..BAR0" */\r
-    0x01,0x00,0x40,0x04,0x52,0x49,0x44,0x5F,  /* 000026D8    "..@.RID_" */\r
-    0x08,0x00,0x48,0x1B,0x4E,0x41,0x50,0x43,  /* 000026E0    "..H.NAPC" */\r
-    0x01,0x14,0x20,0x50,0x43,0x4D,0x5F,0x01,  /* 000026E8    ".. PCM_." */\r
-    0xA0,0x19,0x95,0x52,0x49,0x44,0x5F,0x0A,  /* 000026F0    "...RID_." */\r
-    0x12,0xA0,0x08,0x68,0x70,0x00,0x4E,0x41,  /* 000026F8    "...hp.NA" */\r
-    0x50,0x43,0xA1,0x07,0x70,0x01,0x4E,0x41,  /* 00002700    "PC..p.NA" */\r
-    0x50,0x43,0x14,0x16,0x5F,0x50,0x52,0x54,  /* 00002708    "PC.._PRT" */\r
-    0x00,0xA0,0x0A,0x50,0x49,0x43,0x4D,0xA4,  /* 00002710    "...PICM." */\r
-    0x41,0x52,0x35,0x36,0xA4,0x50,0x52,0x35,  /* 00002718    "AR56.PR5" */\r
-    0x36,0x5B,0x82,0x4A,0x06,0x47,0x4F,0x4C,  /* 00002720    "6[.J.GOL" */\r
-    0x48,0x08,0x5F,0x41,0x44,0x52,0x0C,0x00,  /* 00002728    "H._ADR.." */\r
-    0x00,0x02,0x00,0x5B,0x80,0x42,0x41,0x52,  /* 00002730    "...[.BAR" */\r
-    0x30,0x02,0x00,0x0A,0x50,0x5B,0x81,0x16,  /* 00002738    "0...P[.." */\r
-    0x42,0x41,0x52,0x30,0x01,0x00,0x40,0x04,  /* 00002740    "BAR0..@." */\r
-    0x52,0x49,0x44,0x5F,0x08,0x00,0x48,0x1B,  /* 00002748    "RID_..H." */\r
-    0x4E,0x41,0x50,0x43,0x01,0x14,0x20,0x50,  /* 00002750    "NAPC.. P" */\r
-    0x43,0x4D,0x5F,0x01,0xA0,0x19,0x95,0x52,  /* 00002758    "CM_....R" */\r
-    0x49,0x44,0x5F,0x0A,0x12,0xA0,0x08,0x68,  /* 00002760    "ID_....h" */\r
-    0x70,0x00,0x4E,0x41,0x50,0x43,0xA1,0x07,  /* 00002768    "p.NAPC.." */\r
-    0x70,0x01,0x4E,0x41,0x50,0x43,0x14,0x16,  /* 00002770    "p.NAPC.." */\r
-    0x5F,0x50,0x52,0x54,0x00,0xA0,0x0A,0x50,  /* 00002778    "_PRT...P" */\r
-    0x49,0x43,0x4D,0xA4,0x41,0x52,0x35,0x37,  /* 00002780    "ICM.AR57" */\r
-    0xA4,0x50,0x52,0x35,0x37,0x5B,0x82,0x4A,  /* 00002788    ".PR57[.J" */\r
-    0x06,0x47,0x4F,0x4C,0x49,0x08,0x5F,0x41,  /* 00002790    ".GOLI._A" */\r
-    0x44,0x52,0x0C,0x00,0x00,0x03,0x00,0x5B,  /* 00002798    "DR.....[" */\r
-    0x80,0x42,0x41,0x52,0x30,0x02,0x00,0x0A,  /* 000027A0    ".BAR0..." */\r
-    0x50,0x5B,0x81,0x16,0x42,0x41,0x52,0x30,  /* 000027A8    "P[..BAR0" */\r
-    0x01,0x00,0x40,0x04,0x52,0x49,0x44,0x5F,  /* 000027B0    "..@.RID_" */\r
-    0x08,0x00,0x48,0x1B,0x4E,0x41,0x50,0x43,  /* 000027B8    "..H.NAPC" */\r
-    0x01,0x14,0x20,0x50,0x43,0x4D,0x5F,0x01,  /* 000027C0    ".. PCM_." */\r
-    0xA0,0x19,0x95,0x52,0x49,0x44,0x5F,0x0A,  /* 000027C8    "...RID_." */\r
-    0x12,0xA0,0x08,0x68,0x70,0x00,0x4E,0x41,  /* 000027D0    "...hp.NA" */\r
-    0x50,0x43,0xA1,0x07,0x70,0x01,0x4E,0x41,  /* 000027D8    "PC..p.NA" */\r
-    0x50,0x43,0x14,0x16,0x5F,0x50,0x52,0x54,  /* 000027E0    "PC.._PRT" */\r
-    0x00,0xA0,0x0A,0x50,0x49,0x43,0x4D,0xA4,  /* 000027E8    "...PICM." */\r
-    0x41,0x52,0x35,0x38,0xA4,0x50,0x52,0x35,  /* 000027F0    "AR58.PR5" */\r
-    0x38,0x5B,0x82,0x4A,0x06,0x47,0x4F,0x4C,  /* 000027F8    "8[.J.GOL" */\r
-    0x4A,0x08,0x5F,0x41,0x44,0x52,0x0C,0x00,  /* 00002800    "J._ADR.." */\r
-    0x00,0x04,0x00,0x5B,0x80,0x42,0x41,0x52,  /* 00002808    "...[.BAR" */\r
-    0x30,0x02,0x00,0x0A,0x50,0x5B,0x81,0x16,  /* 00002810    "0...P[.." */\r
-    0x42,0x41,0x52,0x30,0x01,0x00,0x40,0x04,  /* 00002818    "BAR0..@." */\r
-    0x52,0x49,0x44,0x5F,0x08,0x00,0x48,0x1B,  /* 00002820    "RID_..H." */\r
-    0x4E,0x41,0x50,0x43,0x01,0x14,0x20,0x50,  /* 00002828    "NAPC.. P" */\r
-    0x43,0x4D,0x5F,0x01,0xA0,0x19,0x95,0x52,  /* 00002830    "CM_....R" */\r
-    0x49,0x44,0x5F,0x0A,0x12,0xA0,0x08,0x68,  /* 00002838    "ID_....h" */\r
-    0x70,0x00,0x4E,0x41,0x50,0x43,0xA1,0x07,  /* 00002840    "p.NAPC.." */\r
-    0x70,0x01,0x4E,0x41,0x50,0x43,0x14,0x16,  /* 00002848    "p.NAPC.." */\r
-    0x5F,0x50,0x52,0x54,0x00,0xA0,0x0A,0x50,  /* 00002850    "_PRT...P" */\r
-    0x49,0x43,0x4D,0xA4,0x41,0x52,0x35,0x39,  /* 00002858    "ICM.AR59" */\r
-    0xA4,0x50,0x52,0x35,0x39,0x5B,0x82,0x48,  /* 00002860    ".PR59[.H" */\r
-    0x1E,0x50,0x43,0x49,0x44,0x08,0x5F,0x48,  /* 00002868    ".PCID._H" */\r
-    0x49,0x44,0x0C,0x41,0xD0,0x0A,0x03,0x08,  /* 00002870    "ID.A...." */\r
-    0x5F,0x41,0x44,0x52,0x0C,0x01,0x00,0x1B,  /* 00002878    "_ADR...." */\r
-    0x00,0x14,0x0A,0x5E,0x42,0x4E,0x30,0x44,  /* 00002880    "...^BN0D" */\r
-    0x00,0xA4,0x0A,0x11,0x14,0x0B,0x5F,0x42,  /* 00002888    "......_B" */\r
-    0x42,0x4E,0x00,0xA4,0x42,0x4E,0x30,0x44,  /* 00002890    "BN..BN0D" */\r
-    0x08,0x5F,0x55,0x49,0x44,0x0A,0x0D,0x5B,  /* 00002898    "._UID..[" */\r
-    0x82,0x4A,0x06,0x47,0x4F,0x4C,0x4B,0x08,  /* 000028A0    ".J.GOLK." */\r
-    0x5F,0x41,0x44,0x52,0x0C,0x00,0x00,0x01,  /* 000028A8    "_ADR...." */\r
-    0x00,0x5B,0x80,0x42,0x41,0x52,0x30,0x02,  /* 000028B0    ".[.BAR0." */\r
-    0x00,0x0A,0x50,0x5B,0x81,0x16,0x42,0x41,  /* 000028B8    "..P[..BA" */\r
-    0x52,0x30,0x01,0x00,0x40,0x04,0x52,0x49,  /* 000028C0    "R0..@.RI" */\r
-    0x44,0x5F,0x08,0x00,0x48,0x1B,0x4E,0x41,  /* 000028C8    "D_..H.NA" */\r
-    0x50,0x43,0x01,0x14,0x20,0x50,0x43,0x4D,  /* 000028D0    "PC.. PCM" */\r
-    0x5F,0x01,0xA0,0x19,0x95,0x52,0x49,0x44,  /* 000028D8    "_....RID" */\r
-    0x5F,0x0A,0x12,0xA0,0x08,0x68,0x70,0x00,  /* 000028E0    "_....hp." */\r
-    0x4E,0x41,0x50,0x43,0xA1,0x07,0x70,0x01,  /* 000028E8    "NAPC..p." */\r
-    0x4E,0x41,0x50,0x43,0x14,0x16,0x5F,0x50,  /* 000028F0    "NAPC.._P" */\r
-    0x52,0x54,0x00,0xA0,0x0A,0x50,0x49,0x43,  /* 000028F8    "RT...PIC" */\r
-    0x4D,0xA4,0x41,0x52,0x35,0x41,0xA4,0x50,  /* 00002900    "M.AR5A.P" */\r
-    0x52,0x35,0x41,0x5B,0x82,0x4A,0x06,0x47,  /* 00002908    "R5A[.J.G" */\r
-    0x4F,0x4C,0x4C,0x08,0x5F,0x41,0x44,0x52,  /* 00002910    "OLL._ADR" */\r
-    0x0C,0x00,0x00,0x02,0x00,0x5B,0x80,0x42,  /* 00002918    ".....[.B" */\r
-    0x41,0x52,0x30,0x02,0x00,0x0A,0x50,0x5B,  /* 00002920    "AR0...P[" */\r
-    0x81,0x16,0x42,0x41,0x52,0x30,0x01,0x00,  /* 00002928    "..BAR0.." */\r
-    0x40,0x04,0x52,0x49,0x44,0x5F,0x08,0x00,  /* 00002930    "@.RID_.." */\r
-    0x48,0x1B,0x4E,0x41,0x50,0x43,0x01,0x14,  /* 00002938    "H.NAPC.." */\r
-    0x20,0x50,0x43,0x4D,0x5F,0x01,0xA0,0x19,  /* 00002940    " PCM_..." */\r
-    0x95,0x52,0x49,0x44,0x5F,0x0A,0x12,0xA0,  /* 00002948    ".RID_..." */\r
-    0x08,0x68,0x70,0x00,0x4E,0x41,0x50,0x43,  /* 00002950    ".hp.NAPC" */\r
-    0xA1,0x07,0x70,0x01,0x4E,0x41,0x50,0x43,  /* 00002958    "..p.NAPC" */\r
-    0x14,0x16,0x5F,0x50,0x52,0x54,0x00,0xA0,  /* 00002960    ".._PRT.." */\r
-    0x0A,0x50,0x49,0x43,0x4D,0xA4,0x41,0x52,  /* 00002968    ".PICM.AR" */\r
-    0x35,0x42,0xA4,0x50,0x52,0x35,0x42,0x5B,  /* 00002970    "5B.PR5B[" */\r
-    0x82,0x4A,0x06,0x47,0x4F,0x4C,0x4D,0x08,  /* 00002978    ".J.GOLM." */\r
-    0x5F,0x41,0x44,0x52,0x0C,0x00,0x00,0x03,  /* 00002980    "_ADR...." */\r
-    0x00,0x5B,0x80,0x42,0x41,0x52,0x30,0x02,  /* 00002988    ".[.BAR0." */\r
-    0x00,0x0A,0x50,0x5B,0x81,0x16,0x42,0x41,  /* 00002990    "..P[..BA" */\r
-    0x52,0x30,0x01,0x00,0x40,0x04,0x52,0x49,  /* 00002998    "R0..@.RI" */\r
-    0x44,0x5F,0x08,0x00,0x48,0x1B,0x4E,0x41,  /* 000029A0    "D_..H.NA" */\r
-    0x50,0x43,0x01,0x14,0x20,0x50,0x43,0x4D,  /* 000029A8    "PC.. PCM" */\r
-    0x5F,0x01,0xA0,0x19,0x95,0x52,0x49,0x44,  /* 000029B0    "_....RID" */\r
-    0x5F,0x0A,0x12,0xA0,0x08,0x68,0x70,0x00,  /* 000029B8    "_....hp." */\r
-    0x4E,0x41,0x50,0x43,0xA1,0x07,0x70,0x01,  /* 000029C0    "NAPC..p." */\r
-    0x4E,0x41,0x50,0x43,0x14,0x16,0x5F,0x50,  /* 000029C8    "NAPC.._P" */\r
-    0x52,0x54,0x00,0xA0,0x0A,0x50,0x49,0x43,  /* 000029D0    "RT...PIC" */\r
-    0x4D,0xA4,0x41,0x52,0x35,0x43,0xA4,0x50,  /* 000029D8    "M.AR5C.P" */\r
-    0x52,0x35,0x43,0x5B,0x82,0x4A,0x06,0x47,  /* 000029E0    "R5C[.J.G" */\r
-    0x4F,0x4C,0x4E,0x08,0x5F,0x41,0x44,0x52,  /* 000029E8    "OLN._ADR" */\r
-    0x0C,0x00,0x00,0x04,0x00,0x5B,0x80,0x42,  /* 000029F0    ".....[.B" */\r
-    0x41,0x52,0x30,0x02,0x00,0x0A,0x50,0x5B,  /* 000029F8    "AR0...P[" */\r
-    0x81,0x16,0x42,0x41,0x52,0x30,0x01,0x00,  /* 00002A00    "..BAR0.." */\r
-    0x40,0x04,0x52,0x49,0x44,0x5F,0x08,0x00,  /* 00002A08    "@.RID_.." */\r
-    0x48,0x1B,0x4E,0x41,0x50,0x43,0x01,0x14,  /* 00002A10    "H.NAPC.." */\r
-    0x20,0x50,0x43,0x4D,0x5F,0x01,0xA0,0x19,  /* 00002A18    " PCM_..." */\r
-    0x95,0x52,0x49,0x44,0x5F,0x0A,0x12,0xA0,  /* 00002A20    ".RID_..." */\r
-    0x08,0x68,0x70,0x00,0x4E,0x41,0x50,0x43,  /* 00002A28    ".hp.NAPC" */\r
-    0xA1,0x07,0x70,0x01,0x4E,0x41,0x50,0x43,  /* 00002A30    "..p.NAPC" */\r
-    0x14,0x16,0x5F,0x50,0x52,0x54,0x00,0xA0,  /* 00002A38    ".._PRT.." */\r
-    0x0A,0x50,0x49,0x43,0x4D,0xA4,0x41,0x52,  /* 00002A40    ".PICM.AR" */\r
-    0x35,0x44,0xA4,0x50,0x52,0x35,0x44,0x10,  /* 00002A48    "5D.PR5D." */\r
-    0x40,0x08,0x5C,0x5F,0x47,0x50,0x45,0x14,  /* 00002A50    "@.\_GPE." */\r
-    0x38,0x5F,0x4C,0x30,0x38,0x00,0x86,0x5C,  /* 00002A58    "8_L08..\" */\r
-    0x2F,0x03,0x5F,0x53,0x42,0x5F,0x50,0x43,  /* 00002A60    "/._SB_PC" */\r
-    0x49,0x41,0x50,0x43,0x49,0x31,0x0A,0x02,  /* 00002A68    "IAPCI1.." */\r
-    0x5C,0x2F,0x04,0x5F,0x53,0x42,0x5F,0x50,  /* 00002A70    "\/._SB_P" */\r
-    0x43,0x49,0x41,0x53,0x42,0x52,0x47,0x53,  /* 00002A78    "CIASBRGS" */\r
-    0x49,0x4F,0x48,0x86,0x5C,0x2E,0x5F,0x53,  /* 00002A80    "IOH.\._S" */\r
-    0x42,0x5F,0x50,0x57,0x52,0x42,0x0A,0x02,  /* 00002A88    "B_PWRB.." */\r
-    0x14,0x3F,0x5F,0x4C,0x30,0x46,0x00,0x86,  /* 00002A90    ".?_L0F.." */\r
-    0x5C,0x2F,0x04,0x5F,0x53,0x42,0x5F,0x50,  /* 00002A98    "\/._SB_P" */\r
-    0x43,0x49,0x41,0x50,0x43,0x49,0x31,0x55,  /* 00002AA0    "CIAPCI1U" */\r
-    0x53,0x42,0x30,0x0A,0x02,0x86,0x5C,0x2F,  /* 00002AA8    "SB0...\/" */\r
-    0x04,0x5F,0x53,0x42,0x5F,0x50,0x43,0x49,  /* 00002AB0    "._SB_PCI" */\r
-    0x41,0x50,0x43,0x49,0x31,0x55,0x53,0x42,  /* 00002AB8    "APCI1USB" */\r
-    0x31,0x0A,0x02,0x86,0x5C,0x2E,0x5F,0x53,  /* 00002AC0    "1...\._S" */\r
-    0x42,0x5F,0x50,0x57,0x52,0x42,0x0A,0x02,  /* 00002AC8    "B_PWRB.." */\r
-    0x5B,0x82,0x2D,0x50,0x57,0x52,0x42,0x08,  /* 00002AD0    "[.-PWRB." */\r
-    0x5F,0x48,0x49,0x44,0x0C,0x41,0xD0,0x0C,  /* 00002AD8    "_HID.A.." */\r
-    0x0C,0x08,0x5F,0x55,0x49,0x44,0x0A,0xAA,  /* 00002AE0    ".._UID.." */\r
-    0x08,0x5F,0x53,0x54,0x41,0x0A,0x0B,0x14,  /* 00002AE8    "._STA..." */\r
-    0x0F,0x5F,0x50,0x52,0x57,0x00,0xA4,0x47,  /* 00002AF0    "._PRW..G" */\r
-    0x50,0x52,0x57,0x0A,0x08,0x0A,0x03,0x10,  /* 00002AF8    "PRW....." */\r
-    0x42,0x21,0x5F,0x53,0x42,0x5F,0x5B,0x81,  /* 00002B00    "B!_SB_[." */\r
-    0x27,0x2F,0x03,0x50,0x43,0x49,0x41,0x50,  /* 00002B08    "'/.PCIAP" */\r
-    0x4D,0x46,0x5F,0x42,0x41,0x52,0x30,0x01,  /* 00002B10    "MF_BAR0." */\r
-    0x00,0x40,0x2B,0x50,0x49,0x52,0x41,0x04,  /* 00002B18    ".@+PIRA." */\r
-    0x50,0x49,0x52,0x42,0x04,0x50,0x49,0x52,  /* 00002B20    "PIRB.PIR" */\r
-    0x43,0x04,0x50,0x49,0x52,0x44,0x04,0x08,  /* 00002B28    "C.PIRD.." */\r
-    0x42,0x55,0x46,0x41,0x11,0x09,0x0A,0x06,  /* 00002B30    "BUFA...." */\r
-    0x23,0x00,0x80,0x18,0x79,0x00,0x8B,0x42,  /* 00002B38    "#...y..B" */\r
-    0x55,0x46,0x41,0x01,0x49,0x43,0x52,0x53,  /* 00002B40    "UFA.ICRS" */\r
-    0x14,0x11,0x4C,0x53,0x54,0x41,0x01,0xA0,  /* 00002B48    "..LSTA.." */\r
-    0x05,0x68,0xA4,0x0A,0x0B,0xA1,0x04,0xA4,  /* 00002B50    ".h......" */\r
-    0x0A,0x09,0x14,0x15,0x4C,0x43,0x52,0x53,  /* 00002B58    "....LCRS" */\r
-    0x01,0x70,0x68,0x60,0x79,0x01,0x60,0x49,  /* 00002B60    ".ph`y.`I" */\r
-    0x43,0x52,0x53,0xA4,0x42,0x55,0x46,0x41,  /* 00002B68    "CRS.BUFA" */\r
-    0x14,0x16,0x4C,0x53,0x52,0x53,0x01,0x8B,  /* 00002B70    "..LSRS.." */\r
-    0x68,0x01,0x49,0x53,0x52,0x53,0x82,0x49,  /* 00002B78    "h.ISRS.I" */\r
-    0x53,0x52,0x53,0x60,0xA4,0x76,0x60,0x5B,  /* 00002B80    "SRS`.v`[" */\r
-    0x82,0x40,0x06,0x4C,0x4E,0x4B,0x41,0x08,  /* 00002B88    ".@.LNKA." */\r
-    0x5F,0x48,0x49,0x44,0x0C,0x41,0xD0,0x0C,  /* 00002B90    "_HID.A.." */\r
-    0x0F,0x08,0x5F,0x55,0x49,0x44,0x01,0x14,  /* 00002B98    ".._UID.." */\r
-    0x0F,0x5F,0x53,0x54,0x41,0x00,0xA4,0x4C,  /* 00002BA0    "._STA..L" */\r
-    0x53,0x54,0x41,0x50,0x49,0x52,0x41,0x14,  /* 00002BA8    "STAPIRA." */\r
-    0x0B,0x5F,0x50,0x52,0x53,0x00,0xA4,0x50,  /* 00002BB0    "._PRS..P" */\r
-    0x52,0x53,0x41,0x14,0x0C,0x5F,0x44,0x49,  /* 00002BB8    "RSA.._DI" */\r
-    0x53,0x00,0x70,0x00,0x50,0x49,0x52,0x41,  /* 00002BC0    "S.p.PIRA" */\r
-    0x14,0x0F,0x5F,0x43,0x52,0x53,0x00,0xA4,  /* 00002BC8    ".._CRS.." */\r
-    0x4C,0x43,0x52,0x53,0x50,0x49,0x52,0x41,  /* 00002BD0    "LCRSPIRA" */\r
-    0x14,0x10,0x5F,0x53,0x52,0x53,0x01,0x70,  /* 00002BD8    ".._SRS.p" */\r
-    0x4C,0x53,0x52,0x53,0x68,0x50,0x49,0x52,  /* 00002BE0    "LSRShPIR" */\r
-    0x41,0x5B,0x82,0x41,0x06,0x4C,0x4E,0x4B,  /* 00002BE8    "A[.A.LNK" */\r
-    0x42,0x08,0x5F,0x48,0x49,0x44,0x0C,0x41,  /* 00002BF0    "B._HID.A" */\r
-    0xD0,0x0C,0x0F,0x08,0x5F,0x55,0x49,0x44,  /* 00002BF8    "...._UID" */\r
-    0x0A,0x02,0x14,0x0F,0x5F,0x53,0x54,0x41,  /* 00002C00    "...._STA" */\r
-    0x00,0xA4,0x4C,0x53,0x54,0x41,0x50,0x49,  /* 00002C08    "..LSTAPI" */\r
-    0x52,0x42,0x14,0x0B,0x5F,0x50,0x52,0x53,  /* 00002C10    "RB.._PRS" */\r
-    0x00,0xA4,0x50,0x52,0x53,0x42,0x14,0x0C,  /* 00002C18    "..PRSB.." */\r
-    0x5F,0x44,0x49,0x53,0x00,0x70,0x00,0x50,  /* 00002C20    "_DIS.p.P" */\r
-    0x49,0x52,0x42,0x14,0x0F,0x5F,0x43,0x52,  /* 00002C28    "IRB.._CR" */\r
-    0x53,0x00,0xA4,0x4C,0x43,0x52,0x53,0x50,  /* 00002C30    "S..LCRSP" */\r
-    0x49,0x52,0x42,0x14,0x10,0x5F,0x53,0x52,  /* 00002C38    "IRB.._SR" */\r
-    0x53,0x01,0x70,0x4C,0x53,0x52,0x53,0x68,  /* 00002C40    "S.pLSRSh" */\r
-    0x50,0x49,0x52,0x42,0x5B,0x82,0x41,0x06,  /* 00002C48    "PIRB[.A." */\r
-    0x4C,0x4E,0x4B,0x43,0x08,0x5F,0x48,0x49,  /* 00002C50    "LNKC._HI" */\r
-    0x44,0x0C,0x41,0xD0,0x0C,0x0F,0x08,0x5F,  /* 00002C58    "D.A...._" */\r
-    0x55,0x49,0x44,0x0A,0x03,0x14,0x0F,0x5F,  /* 00002C60    "UID...._" */\r
-    0x53,0x54,0x41,0x00,0xA4,0x4C,0x53,0x54,  /* 00002C68    "STA..LST" */\r
-    0x41,0x50,0x49,0x52,0x43,0x14,0x0B,0x5F,  /* 00002C70    "APIRC.._" */\r
-    0x50,0x52,0x53,0x00,0xA4,0x50,0x52,0x53,  /* 00002C78    "PRS..PRS" */\r
-    0x43,0x14,0x0C,0x5F,0x44,0x49,0x53,0x00,  /* 00002C80    "C.._DIS." */\r
-    0x70,0x00,0x50,0x49,0x52,0x43,0x14,0x0F,  /* 00002C88    "p.PIRC.." */\r
-    0x5F,0x43,0x52,0x53,0x00,0xA4,0x4C,0x43,  /* 00002C90    "_CRS..LC" */\r
-    0x52,0x53,0x50,0x49,0x52,0x43,0x14,0x10,  /* 00002C98    "RSPIRC.." */\r
-    0x5F,0x53,0x52,0x53,0x01,0x70,0x4C,0x53,  /* 00002CA0    "_SRS.pLS" */\r
-    0x52,0x53,0x68,0x50,0x49,0x52,0x43,0x5B,  /* 00002CA8    "RShPIRC[" */\r
-    0x82,0x41,0x06,0x4C,0x4E,0x4B,0x44,0x08,  /* 00002CB0    ".A.LNKD." */\r
-    0x5F,0x48,0x49,0x44,0x0C,0x41,0xD0,0x0C,  /* 00002CB8    "_HID.A.." */\r
-    0x0F,0x08,0x5F,0x55,0x49,0x44,0x0A,0x04,  /* 00002CC0    ".._UID.." */\r
-    0x14,0x0F,0x5F,0x53,0x54,0x41,0x00,0xA4,  /* 00002CC8    ".._STA.." */\r
-    0x4C,0x53,0x54,0x41,0x50,0x49,0x52,0x44,  /* 00002CD0    "LSTAPIRD" */\r
-    0x14,0x0B,0x5F,0x50,0x52,0x53,0x00,0xA4,  /* 00002CD8    ".._PRS.." */\r
-    0x50,0x52,0x53,0x44,0x14,0x0C,0x5F,0x44,  /* 00002CE0    "PRSD.._D" */\r
-    0x49,0x53,0x00,0x70,0x00,0x50,0x49,0x52,  /* 00002CE8    "IS.p.PIR" */\r
-    0x44,0x14,0x0F,0x5F,0x43,0x52,0x53,0x00,  /* 00002CF0    "D.._CRS." */\r
-    0xA4,0x4C,0x43,0x52,0x53,0x50,0x49,0x52,  /* 00002CF8    ".LCRSPIR" */\r
-    0x44,0x14,0x10,0x5F,0x53,0x52,0x53,0x01,  /* 00002D00    "D.._SRS." */\r
-    0x70,0x4C,0x53,0x52,0x53,0x68,0x50,0x49,  /* 00002D08    "pLSRShPI" */\r
-    0x52,0x44,0x10,0x4A,0xF5,0x5F,0x53,0x42,  /* 00002D10    "RD.J._SB" */\r
-    0x5F,0x10,0x4E,0x21,0x50,0x43,0x49,0x30,  /* 00002D18    "_.N!PCI0" */\r
-    0x08,0x5F,0x41,0x44,0x52,0x00,0x14,0x08,  /* 00002D20    "._ADR..." */\r
-    0x42,0x4E,0x30,0x41,0x00,0xA4,0x00,0x14,  /* 00002D28    "BN0A...." */\r
-    0x0E,0x5F,0x53,0x54,0x41,0x00,0xA0,0x05,  /* 00002D30    "._STA..." */\r
-    0x01,0xA4,0x0A,0x0F,0xA4,0x00,0x08,0x43,  /* 00002D38    ".......C" */\r
-    0x52,0x53,0x5F,0x11,0x4A,0x07,0x0A,0x76,  /* 00002D40    "RS_.J..v" */\r
-    0x88,0x0D,0x00,0x02,0x0C,0x00,0x00,0x00,  /* 00002D48    "........" */\r
-    0x00,0x00,0xFF,0x00,0x00,0x00,0x00,0x01,  /* 00002D50    "........" */\r
-    0x88,0x0D,0x00,0x01,0x0C,0x03,0x00,0x00,  /* 00002D58    "........" */\r
-    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00002D60    "........" */\r
-    0x88,0x0D,0x00,0x01,0x0C,0x03,0x00,0x00,  /* 00002D68    "........" */\r
-    0xB0,0x03,0xBB,0x03,0x00,0x00,0x0C,0x00,  /* 00002D70    "........" */\r
-    0x88,0x0D,0x00,0x01,0x0C,0x03,0x00,0x00,  /* 00002D78    "........" */\r
-    0xC0,0x03,0xDF,0x03,0x00,0x00,0x20,0x00,  /* 00002D80    "...... ." */\r
-    0x87,0x17,0x00,0x00,0x0C,0x03,0x00,0x00,  /* 00002D88    "........" */\r
-    0x00,0x00,0x00,0x00,0x0A,0x00,0xFF,0xFF,  /* 00002D90    "........" */\r
-    0x0B,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00002D98    "........" */\r
-    0x02,0x00,0x87,0x17,0x00,0x00,0x0C,0x03,  /* 00002DA0    "........" */\r
-    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00002DA8    "........" */\r
-    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00002DB0    "........" */\r
-    0x00,0x00,0x00,0x00,0x79,0x00,0x8A,0x43,  /* 00002DB8    "....y..C" */\r
-    0x52,0x53,0x5F,0x0A,0x64,0x4D,0x49,0x4E,  /* 00002DC0    "RS_.dMIN" */\r
-    0x35,0x8A,0x43,0x52,0x53,0x5F,0x0A,0x68,  /* 00002DC8    "5.CRS_.h" */\r
-    0x4D,0x41,0x58,0x35,0x8A,0x43,0x52,0x53,  /* 00002DD0    "MAX5.CRS" */\r
-    0x5F,0x0A,0x70,0x4C,0x45,0x4E,0x35,0x8A,  /* 00002DD8    "_.pLEN5." */\r
-    0x43,0x52,0x53,0x5F,0x0A,0x4A,0x4D,0x49,  /* 00002DE0    "CRS_.JMI" */\r
-    0x4E,0x34,0x8A,0x43,0x52,0x53,0x5F,0x0A,  /* 00002DE8    "N4.CRS_." */\r
-    0x4E,0x4D,0x41,0x58,0x34,0x8A,0x43,0x52,  /* 00002DF0    "NMAX4.CR" */\r
-    0x53,0x5F,0x0A,0x56,0x4C,0x45,0x4E,0x34,  /* 00002DF8    "S_.VLEN4" */\r
-    0x8B,0x43,0x52,0x53,0x5F,0x0A,0x18,0x4D,  /* 00002E00    ".CRS_..M" */\r
-    0x49,0x4E,0x49,0x8B,0x43,0x52,0x53,0x5F,  /* 00002E08    "INI.CRS_" */\r
-    0x0A,0x1A,0x4D,0x41,0x58,0x49,0x8B,0x43,  /* 00002E10    "..MAXI.C" */\r
-    0x52,0x53,0x5F,0x0A,0x1E,0x4C,0x45,0x4E,  /* 00002E18    "RS_..LEN" */\r
-    0x49,0x8B,0x43,0x52,0x53,0x5F,0x0A,0x28,  /* 00002E20    "I.CRS_.(" */\r
-    0x4D,0x49,0x4E,0x31,0x8B,0x43,0x52,0x53,  /* 00002E28    "MIN1.CRS" */\r
-    0x5F,0x0A,0x2A,0x4D,0x41,0x58,0x31,0x8B,  /* 00002E30    "_.*MAX1." */\r
-    0x43,0x52,0x53,0x5F,0x0A,0x2E,0x4C,0x45,  /* 00002E38    "CRS_..LE" */\r
-    0x4E,0x31,0x8B,0x43,0x52,0x53,0x5F,0x0A,  /* 00002E40    "N1.CRS_." */\r
-    0x38,0x4D,0x49,0x4E,0x32,0x8B,0x43,0x52,  /* 00002E48    "8MIN2.CR" */\r
-    0x53,0x5F,0x0A,0x3A,0x4D,0x41,0x58,0x32,  /* 00002E50    "S_.:MAX2" */\r
-    0x8B,0x43,0x52,0x53,0x5F,0x0A,0x3E,0x4C,  /* 00002E58    ".CRS_.>L" */\r
-    0x45,0x4E,0x32,0x8B,0x43,0x52,0x53,0x5F,  /* 00002E60    "EN2.CRS_" */\r
-    0x0A,0x08,0x4D,0x49,0x4E,0x42,0x8B,0x43,  /* 00002E68    "..MINB.C" */\r
-    0x52,0x53,0x5F,0x0A,0x0A,0x4D,0x41,0x58,  /* 00002E70    "RS_..MAX" */\r
-    0x42,0x8B,0x43,0x52,0x53,0x5F,0x0A,0x0E,  /* 00002E78    "B.CRS_.." */\r
-    0x4C,0x45,0x4E,0x42,0x14,0x43,0x0B,0x5F,  /* 00002E80    "LENB.C._" */\r
-    0x43,0x52,0x53,0x00,0xA0,0x28,0x4D,0x47,  /* 00002E88    "CRS..(MG" */\r
-    0x33,0x4C,0x70,0x4D,0x47,0x33,0x42,0x4D,  /* 00002E90    "3LpMG3BM" */\r
-    0x49,0x4E,0x35,0x70,0x4D,0x47,0x33,0x4C,  /* 00002E98    "IN5pMG3L" */\r
-    0x4C,0x45,0x4E,0x35,0x70,0x4D,0x47,0x33,  /* 00002EA0    "LEN5pMG3" */\r
-    0x4C,0x60,0x72,0x4D,0x49,0x4E,0x35,0x76,  /* 00002EA8    "L`rMIN5v" */\r
-    0x60,0x4D,0x41,0x58,0x35,0xA0,0x3E,0x92,  /* 00002EB0    "`MAX5.>." */\r
-    0x93,0x56,0x47,0x41,0x4F,0x01,0x70,0x00,  /* 00002EB8    ".VGAO.p." */\r
-    0x4D,0x49,0x4E,0x34,0x70,0x00,0x4D,0x41,  /* 00002EC0    "MIN4p.MA" */\r
-    0x58,0x34,0x70,0x00,0x4C,0x45,0x4E,0x34,  /* 00002EC8    "X4p.LEN4" */\r
-    0x70,0x00,0x4D,0x49,0x4E,0x31,0x70,0x00,  /* 00002ED0    "p.MIN1p." */\r
-    0x4D,0x41,0x58,0x31,0x70,0x00,0x4C,0x45,  /* 00002ED8    "MAX1p.LE" */\r
-    0x4E,0x31,0x70,0x00,0x4D,0x49,0x4E,0x32,  /* 00002EE0    "N1p.MIN2" */\r
-    0x70,0x00,0x4D,0x41,0x58,0x32,0x70,0x00,  /* 00002EE8    "p.MAX2p." */\r
-    0x4C,0x45,0x4E,0x32,0xA0,0x28,0x49,0x4F,  /* 00002EF0    "LEN2.(IO" */\r
-    0x4C,0x31,0x70,0x49,0x4F,0x42,0x31,0x4D,  /* 00002EF8    "L1pIOB1M" */\r
-    0x49,0x4E,0x49,0x70,0x49,0x4F,0x4C,0x31,  /* 00002F00    "INIpIOL1" */\r
-    0x4C,0x45,0x4E,0x49,0x70,0x49,0x4F,0x4C,  /* 00002F08    "LENIpIOL" */\r
-    0x31,0x60,0x72,0x4D,0x49,0x4E,0x49,0x76,  /* 00002F10    "1`rMINIv" */\r
-    0x60,0x4D,0x41,0x58,0x49,0x70,0x00,0x60,  /* 00002F18    "`MAXIp.`" */\r
-    0x70,0x60,0x4D,0x49,0x4E,0x42,0x70,0x60,  /* 00002F20    "p`MINBp`" */\r
-    0x4D,0x41,0x58,0x42,0x72,0x60,0x01,0x4C,  /* 00002F28    "MAXBr`.L" */\r
-    0x45,0x4E,0x42,0xA4,0x43,0x52,0x53,0x5F,  /* 00002F30    "ENB.CRS_" */\r
-    0x10,0x4C,0x69,0x50,0x43,0x49,0x41,0x08,  /* 00002F38    ".LiPCIA." */\r
-    0x43,0x52,0x53,0x5F,0x11,0x41,0x13,0x0B,  /* 00002F40    "CRS_.A.." */\r
-    0x2C,0x01,0x88,0x0D,0x00,0x02,0x0C,0x00,  /* 00002F48    ",......." */\r
-    0x00,0x00,0x00,0x00,0xFF,0x00,0x00,0x00,  /* 00002F50    "........" */\r
-    0x00,0x01,0x47,0x01,0xF8,0x0C,0xF8,0x0C,  /* 00002F58    "..G....." */\r
-    0x01,0x08,0x88,0x0D,0x00,0x01,0x0C,0x03,  /* 00002F60    "........" */\r
-    0x00,0x00,0x00,0x00,0xAF,0x03,0x00,0x00,  /* 00002F68    "........" */\r
-    0xB0,0x03,0x88,0x0D,0x00,0x01,0x0C,0x03,  /* 00002F70    "........" */\r
-    0x00,0x00,0xB0,0x03,0xBB,0x03,0x00,0x00,  /* 00002F78    "........" */\r
-    0x0C,0x00,0x88,0x0D,0x00,0x01,0x0C,0x03,  /* 00002F80    "........" */\r
-    0x00,0x00,0xBC,0x03,0xBF,0x03,0x00,0x00,  /* 00002F88    "........" */\r
-    0x04,0x00,0x88,0x0D,0x00,0x01,0x0C,0x03,  /* 00002F90    "........" */\r
-    0x00,0x00,0xC0,0x03,0xDF,0x03,0x00,0x00,  /* 00002F98    "........" */\r
-    0x20,0x00,0x88,0x0D,0x00,0x01,0x0C,0x03,  /* 00002FA0    " ......." */\r
-    0x00,0x00,0xE0,0x03,0xF7,0x0C,0x00,0x00,  /* 00002FA8    "........" */\r
-    0x18,0x09,0x88,0x0D,0x00,0x01,0x0C,0x03,  /* 00002FB0    "........" */\r
-    0x00,0x00,0x00,0x0D,0xFF,0x0F,0x00,0x00,  /* 00002FB8    "........" */\r
-    0x00,0x03,0x88,0x0D,0x00,0x01,0x0C,0x03,  /* 00002FC0    "........" */\r
-    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00002FC8    "........" */\r
-    0x00,0x00,0x87,0x17,0x00,0x00,0x0C,0x03,  /* 00002FD0    "........" */\r
-    0x00,0x00,0x00,0x00,0x00,0x00,0x0A,0x00,  /* 00002FD8    "........" */\r
-    0xFF,0xFF,0x0B,0x00,0x00,0x00,0x00,0x00,  /* 00002FE0    "........" */\r
-    0x00,0x00,0x02,0x00,0x87,0x17,0x00,0x00,  /* 00002FE8    "........" */\r
-    0x0C,0x03,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00002FF0    "........" */\r
-    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00002FF8    "........" */\r
-    0x00,0x00,0x00,0x00,0x00,0x00,0x87,0x17,  /* 00003000    "........" */\r
-    0x00,0x00,0x0C,0x03,0x00,0x00,0x00,0x00,  /* 00003008    "........" */\r
-    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00003010    "........" */\r
-    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00003018    "........" */\r
-    0x87,0x17,0x00,0x00,0x0C,0x03,0x00,0x00,  /* 00003020    "........" */\r
-    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00003028    "........" */\r
-    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00003030    "........" */\r
-    0x00,0x00,0x87,0x17,0x00,0x00,0x0C,0x03,  /* 00003038    "........" */\r
-    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00003040    "........" */\r
-    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00003048    "........" */\r
-    0x00,0x00,0x00,0x00,0x88,0x0D,0x00,0x01,  /* 00003050    "........" */\r
-    0x0C,0x03,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00003058    "........" */\r
-    0x00,0x00,0x00,0x00,0x88,0x0D,0x00,0x01,  /* 00003060    "........" */\r
-    0x0C,0x03,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00003068    "........" */\r
-    0x00,0x00,0x00,0x00,0x79,0x00,0x8A,0x43,  /* 00003070    "....y..C" */\r
-    0x52,0x53,0x5F,0x0A,0x92,0x4D,0x49,0x4E,  /* 00003078    "RS_..MIN" */\r
-    0x34,0x8A,0x43,0x52,0x53,0x5F,0x0A,0x96,  /* 00003080    "4.CRS_.." */\r
-    0x4D,0x41,0x58,0x34,0x8A,0x43,0x52,0x53,  /* 00003088    "MAX4.CRS" */\r
-    0x5F,0x0A,0x9E,0x4C,0x45,0x4E,0x34,0x8A,  /* 00003090    "_..LEN4." */\r
-    0x43,0x52,0x53,0x5F,0x0A,0xAC,0x4D,0x49,  /* 00003098    "CRS_..MI" */\r
-    0x4E,0x35,0x8A,0x43,0x52,0x53,0x5F,0x0A,  /* 000030A0    "N5.CRS_." */\r
-    0xB0,0x4D,0x41,0x58,0x35,0x8A,0x43,0x52,  /* 000030A8    ".MAX5.CR" */\r
-    0x53,0x5F,0x0A,0xB8,0x4C,0x45,0x4E,0x35,  /* 000030B0    "S_..LEN5" */\r
-    0x8A,0x43,0x52,0x53,0x5F,0x0A,0xC6,0x4D,  /* 000030B8    ".CRS_..M" */\r
-    0x49,0x4E,0x36,0x8A,0x43,0x52,0x53,0x5F,  /* 000030C0    "IN6.CRS_" */\r
-    0x0A,0xCA,0x4D,0x41,0x58,0x36,0x8A,0x43,  /* 000030C8    "..MAX6.C" */\r
-    0x52,0x53,0x5F,0x0A,0xD2,0x4C,0x45,0x4E,  /* 000030D0    "RS_..LEN" */\r
-    0x36,0x8A,0x43,0x52,0x53,0x5F,0x0A,0xE0,  /* 000030D8    "6.CRS_.." */\r
-    0x4D,0x49,0x4E,0x37,0x8A,0x43,0x52,0x53,  /* 000030E0    "MIN7.CRS" */\r
-    0x5F,0x0A,0xE4,0x4D,0x41,0x58,0x37,0x8A,  /* 000030E8    "_..MAX7." */\r
-    0x43,0x52,0x53,0x5F,0x0A,0xEC,0x4C,0x45,  /* 000030F0    "CRS_..LE" */\r
-    0x4E,0x37,0x8A,0x43,0x52,0x53,0x5F,0x0A,  /* 000030F8    "N7.CRS_." */\r
-    0xFA,0x4D,0x49,0x4E,0x38,0x8A,0x43,0x52,  /* 00003100    ".MIN8.CR" */\r
-    0x53,0x5F,0x0A,0xFE,0x4D,0x41,0x58,0x38,  /* 00003108    "S_..MAX8" */\r
-    0x8A,0x43,0x52,0x53,0x5F,0x0B,0x06,0x01,  /* 00003110    ".CRS_..." */\r
-    0x4C,0x45,0x4E,0x38,0x8B,0x43,0x52,0x53,  /* 00003118    "LEN8.CRS" */\r
-    0x5F,0x0A,0x08,0x4D,0x49,0x4E,0x42,0x8B,  /* 00003120    "_..MINB." */\r
-    0x43,0x52,0x53,0x5F,0x0A,0x0A,0x4D,0x41,  /* 00003128    "CRS_..MA" */\r
-    0x58,0x42,0x8B,0x43,0x52,0x53,0x5F,0x0A,  /* 00003130    "XB.CRS_." */\r
-    0x0E,0x4C,0x45,0x4E,0x42,0x8B,0x43,0x52,  /* 00003138    ".LENB.CR" */\r
-    0x53,0x5F,0x0A,0x70,0x4D,0x49,0x4E,0x30,  /* 00003140    "S_.pMIN0" */\r
-    0x8B,0x43,0x52,0x53,0x5F,0x0A,0x72,0x4D,  /* 00003148    ".CRS_.rM" */\r
-    0x41,0x58,0x30,0x8B,0x43,0x52,0x53,0x5F,  /* 00003150    "AX0.CRS_" */\r
-    0x0A,0x76,0x4C,0x45,0x4E,0x30,0x8B,0x43,  /* 00003158    ".vLEN0.C" */\r
-    0x52,0x53,0x5F,0x0A,0x80,0x4D,0x49,0x4E,  /* 00003160    "RS_..MIN" */\r
-    0x31,0x8B,0x43,0x52,0x53,0x5F,0x0A,0x82,  /* 00003168    "1.CRS_.." */\r
-    0x4D,0x41,0x58,0x31,0x8B,0x43,0x52,0x53,  /* 00003170    "MAX1.CRS" */\r
-    0x5F,0x0A,0x86,0x4C,0x45,0x4E,0x31,0x8B,  /* 00003178    "_..LEN1." */\r
-    0x43,0x52,0x53,0x5F,0x0A,0x30,0x4D,0x49,  /* 00003180    "CRS_.0MI" */\r
-    0x4E,0x32,0x8B,0x43,0x52,0x53,0x5F,0x0A,  /* 00003188    "N2.CRS_." */\r
-    0x32,0x4D,0x41,0x58,0x32,0x8B,0x43,0x52,  /* 00003190    "2MAX2.CR" */\r
-    0x53,0x5F,0x0A,0x36,0x4C,0x45,0x4E,0x32,  /* 00003198    "S_.6LEN2" */\r
-    0x8B,0x43,0x52,0x53,0x5F,0x0A,0x50,0x4D,  /* 000031A0    ".CRS_.PM" */\r
-    0x49,0x4E,0x33,0x8B,0x43,0x52,0x53,0x5F,  /* 000031A8    "IN3.CRS_" */\r
-    0x0A,0x52,0x4D,0x41,0x58,0x33,0x8B,0x43,  /* 000031B0    ".RMAX3.C" */\r
-    0x52,0x53,0x5F,0x0A,0x56,0x4C,0x45,0x4E,  /* 000031B8    "RS_.VLEN" */\r
-    0x33,0x8B,0x43,0x52,0x53,0x5F,0x0B,0x12,  /* 000031C0    "3.CRS_.." */\r
-    0x01,0x4D,0x49,0x4E,0x39,0x8B,0x43,0x52,  /* 000031C8    ".MIN9.CR" */\r
-    0x53,0x5F,0x0B,0x14,0x01,0x4D,0x41,0x58,  /* 000031D0    "S_...MAX" */\r
-    0x39,0x8B,0x43,0x52,0x53,0x5F,0x0B,0x18,  /* 000031D8    "9.CRS_.." */\r
-    0x01,0x4C,0x45,0x4E,0x39,0x8B,0x43,0x52,  /* 000031E0    ".LEN9.CR" */\r
-    0x53,0x5F,0x0B,0x22,0x01,0x4D,0x49,0x4E,  /* 000031E8    "S_.".MIN" */\r
-    0x41,0x8B,0x43,0x52,0x53,0x5F,0x0B,0x24,  /* 000031F0    "A.CRS_.$" */\r
-    0x01,0x4D,0x41,0x58,0x41,0x8B,0x43,0x52,  /* 000031F8    ".MAXA.CR" */\r
-    0x53,0x5F,0x0B,0x28,0x01,0x4C,0x45,0x4E,  /* 00003200    "S_.(.LEN" */\r
-    0x41,0x14,0x48,0x37,0x5F,0x43,0x52,0x53,  /* 00003208    "A.H7_CRS" */\r
-    0x00,0xA0,0x22,0x94,0x4D,0x47,0x33,0x42,  /* 00003210    "..".MG3B" */\r
-    0x4D,0x47,0x34,0x42,0x70,0x4D,0x47,0x34,  /* 00003218    "MG4BpMG4" */\r
-    0x42,0x60,0x70,0x4D,0x47,0x34,0x4C,0x61,  /* 00003220    "B`pMG4La" */\r
-    0x70,0x4D,0x47,0x33,0x42,0x62,0x70,0x4D,  /* 00003228    "pMG3BbpM" */\r
-    0x47,0x33,0x4C,0x63,0xA1,0x19,0x70,0x4D,  /* 00003230    "G3Lc..pM" */\r
-    0x47,0x33,0x42,0x60,0x70,0x4D,0x47,0x33,  /* 00003238    "G3B`pMG3" */\r
-    0x4C,0x61,0x70,0x4D,0x47,0x34,0x42,0x62,  /* 00003240    "LapMG4Bb" */\r
-    0x70,0x4D,0x47,0x34,0x4C,0x63,0xA0,0x2F,  /* 00003248    "pMG4Lc./" */\r
-    0x94,0x4D,0x47,0x35,0x42,0x60,0xA0,0x13,  /* 00003250    ".MG5B`.." */\r
-    0x94,0x4D,0x47,0x35,0x42,0x62,0x70,0x4D,  /* 00003258    ".MG5BbpM" */\r
-    0x47,0x35,0x42,0x64,0x70,0x4D,0x47,0x35,  /* 00003260    "G5BdpMG5" */\r
-    0x4C,0x65,0xA1,0x13,0x70,0x62,0x64,0x70,  /* 00003268    "Le..pbdp" */\r
-    0x63,0x65,0x70,0x4D,0x47,0x35,0x42,0x62,  /* 00003270    "cepMG5Bb" */\r
-    0x70,0x4D,0x47,0x35,0x4C,0x63,0xA1,0x19,  /* 00003278    "pMG5Lc.." */\r
-    0x70,0x62,0x64,0x70,0x63,0x65,0x70,0x60,  /* 00003280    "pbdpcep`" */\r
-    0x62,0x70,0x61,0x63,0x70,0x4D,0x47,0x35,  /* 00003288    "bpacpMG5" */\r
-    0x42,0x60,0x70,0x4D,0x47,0x35,0x4C,0x61,  /* 00003290    "B`pMG5La" */\r
-    0x70,0x0A,0x03,0x66,0x70,0x66,0x67,0xA2,  /* 00003298    "p..fpfg." */\r
-    0x16,0x67,0xA0,0x11,0x92,0x61,0x76,0x66,  /* 000032A0    ".g...avf" */\r
-    0x70,0x63,0x61,0x70,0x62,0x60,0x70,0x65,  /* 000032A8    "pcapb`pe" */\r
-    0x63,0x70,0x64,0x62,0x76,0x67,0xA0,0x4D,  /* 000032B0    "cpdbvg.M" */\r
-    0x0C,0x66,0xA0,0x22,0x92,0x93,0x4D,0x47,  /* 000032B8    ".f."..MG" */\r
-    0x32,0x42,0x60,0x70,0x4D,0x47,0x32,0x42,  /* 000032C0    "2B`pMG2B" */\r
-    0x4D,0x49,0x4E,0x35,0x74,0x60,0x4D,0x47,  /* 000032C8    "MIN5t`MG" */\r
-    0x32,0x42,0x4C,0x45,0x4E,0x35,0x74,0x60,  /* 000032D0    "2BLEN5t`" */\r
-    0x01,0x4D,0x41,0x58,0x35,0xA0,0x46,0x08,  /* 000032D8    ".MAX5.F." */\r
-    0x94,0x66,0x01,0x72,0x60,0x61,0x67,0xA0,  /* 000032E0    ".f.r`ag." */\r
-    0x19,0x92,0x93,0x67,0x62,0x70,0x67,0x4D,  /* 000032E8    "...gbpgM" */\r
-    0x49,0x4E,0x36,0x74,0x62,0x67,0x4C,0x45,  /* 000032F0    "IN6tbgLE" */\r
-    0x4E,0x36,0x74,0x62,0x01,0x4D,0x41,0x58,  /* 000032F8    "N6tb.MAX" */\r
-    0x36,0xA0,0x42,0x04,0x94,0x66,0x0A,0x02,  /* 00003300    "6.B..f.." */\r
-    0x72,0x62,0x63,0x67,0xA0,0x19,0x92,0x93,  /* 00003308    "rbcg...." */\r
-    0x66,0x64,0x70,0x66,0x4D,0x49,0x4E,0x37,  /* 00003310    "fdpfMIN7" */\r
-    0x74,0x64,0x66,0x4C,0x45,0x4E,0x37,0x74,  /* 00003318    "tdfLEN7t" */\r
-    0x64,0x01,0x4D,0x41,0x58,0x37,0x72,0x64,  /* 00003320    "d.MAX7rd" */\r
-    0x65,0x4D,0x49,0x4E,0x38,0x70,0xFF,0x4D,  /* 00003328    "eMIN8p.M" */\r
-    0x41,0x58,0x38,0x74,0x4D,0x41,0x58,0x38,  /* 00003330    "AX8tMAX8" */\r
-    0x4D,0x49,0x4E,0x38,0x60,0x72,0x60,0x01,  /* 00003338    "MIN8`r`." */\r
-    0x4C,0x45,0x4E,0x38,0xA1,0x1F,0x72,0x62,  /* 00003340    "LEN8..rb" */\r
-    0x63,0x4D,0x49,0x4E,0x38,0x70,0xFF,0x4D,  /* 00003348    "cMIN8p.M" */\r
-    0x41,0x58,0x38,0x74,0x4D,0x41,0x58,0x38,  /* 00003350    "AX8tMAX8" */\r
-    0x4D,0x49,0x4E,0x38,0x60,0x72,0x60,0x01,  /* 00003358    "MIN8`r`." */\r
-    0x4C,0x45,0x4E,0x38,0xA1,0x1F,0x72,0x60,  /* 00003360    "LEN8..r`" */\r
-    0x61,0x4D,0x49,0x4E,0x38,0x70,0xFF,0x4D,  /* 00003368    "aMIN8p.M" */\r
-    0x41,0x58,0x38,0x74,0x4D,0x41,0x58,0x38,  /* 00003370    "AX8tMAX8" */\r
-    0x4D,0x49,0x4E,0x38,0x60,0x72,0x60,0x01,  /* 00003378    "MIN8`r`." */\r
-    0x4C,0x45,0x4E,0x38,0xA1,0x21,0x70,0x4D,  /* 00003380    "LEN8.!pM" */\r
-    0x47,0x32,0x42,0x4D,0x49,0x4E,0x38,0x70,  /* 00003388    "G2BMIN8p" */\r
-    0xFF,0x4D,0x41,0x58,0x38,0x74,0x4D,0x41,  /* 00003390    ".MAX8tMA" */\r
-    0x58,0x38,0x4D,0x49,0x4E,0x38,0x60,0x72,  /* 00003398    "X8MIN8`r" */\r
-    0x60,0x01,0x4C,0x45,0x4E,0x38,0xA0,0x3B,  /* 000033A0    "`.LEN8.;" */\r
-    0x56,0x47,0x41,0x4F,0x70,0x00,0x4D,0x49,  /* 000033A8    "VGAOp.MI" */\r
-    0x4E,0x34,0x70,0x00,0x4D,0x41,0x58,0x34,  /* 000033B0    "N4p.MAX4" */\r
-    0x70,0x00,0x4C,0x45,0x4E,0x34,0x70,0x00,  /* 000033B8    "p.LEN4p." */\r
-    0x4D,0x49,0x4E,0x32,0x70,0x00,0x4D,0x41,  /* 000033C0    "MIN2p.MA" */\r
-    0x58,0x32,0x70,0x00,0x4C,0x45,0x4E,0x32,  /* 000033C8    "X2p.LEN2" */\r
-    0x70,0x00,0x4D,0x49,0x4E,0x33,0x70,0x00,  /* 000033D0    "p.MIN3p." */\r
-    0x4D,0x41,0x58,0x33,0x70,0x00,0x4C,0x45,  /* 000033D8    "MAX3p.LE" */\r
-    0x4E,0x33,0xA0,0x22,0x94,0x49,0x4F,0x42,  /* 000033E0    "N3.".IOB" */\r
-    0x31,0x49,0x4F,0x42,0x32,0x70,0x49,0x4F,  /* 000033E8    "1IOB2pIO" */\r
-    0x42,0x32,0x60,0x70,0x49,0x4F,0x4C,0x32,  /* 000033F0    "B2`pIOL2" */\r
-    0x61,0x70,0x49,0x4F,0x42,0x31,0x62,0x70,  /* 000033F8    "apIOB1bp" */\r
-    0x49,0x4F,0x4C,0x31,0x63,0xA1,0x19,0x70,  /* 00003400    "IOL1c..p" */\r
-    0x49,0x4F,0x42,0x31,0x60,0x70,0x49,0x4F,  /* 00003408    "IOB1`pIO" */\r
-    0x4C,0x31,0x61,0x70,0x49,0x4F,0x42,0x32,  /* 00003410    "L1apIOB2" */\r
-    0x62,0x70,0x49,0x4F,0x42,0x32,0x63,0xA0,  /* 00003418    "bpIOB2c." */\r
-    0x2F,0x94,0x49,0x4F,0x42,0x33,0x60,0xA0,  /* 00003420    "/.IOB3`." */\r
-    0x13,0x94,0x49,0x4F,0x42,0x33,0x62,0x70,  /* 00003428    "..IOB3bp" */\r
-    0x49,0x4F,0x42,0x33,0x64,0x70,0x49,0x4F,  /* 00003430    "IOB3dpIO" */\r
-    0x4C,0x33,0x65,0xA1,0x13,0x70,0x62,0x64,  /* 00003438    "L3e..pbd" */\r
-    0x70,0x63,0x65,0x70,0x49,0x4F,0x42,0x33,  /* 00003440    "pcepIOB3" */\r
-    0x62,0x70,0x49,0x4F,0x4C,0x33,0x63,0xA1,  /* 00003448    "bpIOL3c." */\r
-    0x19,0x70,0x62,0x64,0x70,0x63,0x65,0x70,  /* 00003450    ".pbdpcep" */\r
-    0x60,0x62,0x70,0x61,0x63,0x70,0x49,0x4F,  /* 00003458    "`bpacpIO" */\r
-    0x42,0x33,0x60,0x70,0x49,0x4F,0x4C,0x33,  /* 00003460    "B3`pIOL3" */\r
-    0x61,0x70,0x0A,0x03,0x66,0x70,0x66,0x67,  /* 00003468    "ap..fpfg" */\r
-    0xA2,0x16,0x67,0xA0,0x11,0x92,0x61,0x76,  /* 00003470    "..g...av" */\r
-    0x66,0x70,0x63,0x61,0x70,0x62,0x60,0x70,  /* 00003478    "fpcapb`p" */\r
-    0x65,0x63,0x70,0x64,0x62,0x76,0x67,0xA0,  /* 00003480    "ecpdbvg." */\r
-    0x4A,0x0C,0x66,0x74,0x60,0x01,0x4D,0x41,  /* 00003488    "J.ft`.MA" */\r
-    0x58,0x30,0x74,0x60,0x0B,0x00,0x0D,0x4C,  /* 00003490    "X0t`...L" */\r
-    0x45,0x4E,0x30,0x72,0x60,0x61,0x67,0xA0,  /* 00003498    "EN0r`ag." */\r
-    0x4E,0x08,0x94,0x66,0x01,0xA0,0x19,0x92,  /* 000034A0    "N..f...." */\r
-    0x93,0x67,0x62,0x70,0x67,0x4D,0x49,0x4E,  /* 000034A8    ".gbpgMIN" */\r
-    0x31,0x74,0x62,0x67,0x4C,0x45,0x4E,0x31,  /* 000034B0    "1tbgLEN1" */\r
-    0x74,0x62,0x01,0x4D,0x41,0x58,0x31,0x72,  /* 000034B8    "tb.MAX1r" */\r
-    0x62,0x63,0x67,0xA0,0x46,0x04,0x94,0x66,  /* 000034C0    "bcg.F..f" */\r
-    0x0A,0x02,0xA0,0x19,0x92,0x93,0x67,0x64,  /* 000034C8    "......gd" */\r
-    0x70,0x67,0x4D,0x49,0x4E,0x39,0x74,0x64,  /* 000034D0    "pgMIN9td" */\r
-    0x67,0x4C,0x45,0x4E,0x39,0x74,0x64,0x01,  /* 000034D8    "gLEN9td." */\r
-    0x4D,0x41,0x58,0x39,0x72,0x64,0x65,0x67,  /* 000034E0    "MAX9rdeg" */\r
-    0xA0,0x21,0x95,0x67,0x0C,0x00,0x00,0x01,  /* 000034E8    ".!.g...." */\r
-    0x00,0x70,0x67,0x4D,0x49,0x4E,0x41,0x74,  /* 000034F0    ".pgMINAt" */\r
-    0x0C,0x00,0x00,0x01,0x00,0x67,0x4C,0x45,  /* 000034F8    ".....gLE" */\r
-    0x4E,0x41,0x70,0x0B,0xFF,0xFF,0x4D,0x41,  /* 00003500    "NAp...MA" */\r
-    0x58,0x41,0xA1,0x23,0xA0,0x21,0x95,0x67,  /* 00003508    "XA.#.!.g" */\r
-    0x0C,0x00,0x00,0x01,0x00,0x70,0x67,0x4D,  /* 00003510    ".....pgM" */\r
-    0x49,0x4E,0x39,0x70,0x0B,0xFF,0xFF,0x4D,  /* 00003518    "IN9p...M" */\r
-    0x41,0x58,0x39,0x74,0x0C,0x00,0x00,0x01,  /* 00003520    "AX9t...." */\r
-    0x00,0x67,0x4C,0x45,0x4E,0x39,0xA1,0x23,  /* 00003528    ".gLEN9.#" */\r
-    0xA0,0x21,0x95,0x67,0x0C,0x00,0x00,0x01,  /* 00003530    ".!.g...." */\r
-    0x00,0x70,0x67,0x4D,0x49,0x4E,0x31,0x70,  /* 00003538    ".pgMIN1p" */\r
-    0x0B,0xFF,0xFF,0x4D,0x41,0x58,0x31,0x74,  /* 00003540    "...MAX1t" */\r
-    0x0C,0x00,0x00,0x01,0x00,0x67,0x4C,0x45,  /* 00003548    ".....gLE" */\r
-    0x4E,0x31,0xA1,0x11,0x70,0x0B,0x00,0xF3,  /* 00003550    "N1..p..." */\r
-    0x4C,0x45,0x4E,0x30,0x70,0x0B,0xFF,0xFF,  /* 00003558    "LEN0p..." */\r
-    0x4D,0x41,0x58,0x30,0x70,0x00,0x4D,0x49,  /* 00003560    "MAX0p.MI" */\r
-    0x4E,0x42,0x74,0x53,0x55,0x42,0x31,0x01,  /* 00003568    "NBtSUB1." */\r
-    0x4D,0x41,0x58,0x42,0x70,0x53,0x55,0x42,  /* 00003570    "MAXBpSUB" */\r
-    0x31,0x4C,0x45,0x4E,0x42,0xA4,0x43,0x52,  /* 00003578    "1LENB.CR" */\r
-    0x53,0x5F,0x5B,0x80,0x50,0x4D,0x49,0x4F,  /* 00003580    "S_[.PMIO" */\r
-    0x01,0x50,0x4D,0x42,0x53,0x0A,0xFF,0x5B,  /* 00003588    ".PMBS..[" */\r
-    0x81,0x44,0x04,0x50,0x4D,0x49,0x4F,0x01,  /* 00003590    ".D.PMIO." */\r
-    0x00,0x40,0x0F,0x53,0x57,0x53,0x4D,0x08,  /* 00003598    ".@.SWSM." */\r
-    0x00,0x48,0x04,0x47,0x53,0x54,0x53,0x10,  /* 000035A0    ".H.GSTS." */\r
-    0x47,0x4E,0x42,0x4C,0x10,0x00,0x20,0x53,  /* 000035A8    "GNBL.. S" */\r
-    0x54,0x4D,0x43,0x05,0x00,0x0B,0x54,0x52,  /* 000035B0    "TMC...TR" */\r
-    0x50,0x45,0x01,0x45,0x4E,0x4D,0x43,0x05,  /* 000035B8    "PE.ENMC." */\r
-    0x00,0x4A,0x08,0x53,0x54,0x43,0x30,0x10,  /* 000035C0    ".J.STC0." */\r
-    0x53,0x54,0x43,0x31,0x08,0x00,0x48,0x30,  /* 000035C8    "STC1..H0" */\r
-    0x53,0x54,0x48,0x57,0x14,0x10,0x41,0x23,  /* 000035D0    "STHW..A#" */\r
-    0x50,0x43,0x49,0x42,0x14,0x0B,0x42,0x4E,  /* 000035D8    "PCIB..BN" */\r
-    0x30,0x42,0x00,0xA4,0x53,0x45,0x42,0x31,  /* 000035E0    "0B..SEB1" */\r
-    0x14,0x11,0x5F,0x53,0x54,0x41,0x00,0xA0,  /* 000035E8    ".._STA.." */\r
-    0x08,0x53,0x45,0x42,0x31,0xA4,0x0A,0x0F,  /* 000035F0    ".SEB1..." */\r
-    0xA4,0x00,0x08,0x43,0x52,0x53,0x5F,0x11,  /* 000035F8    "...CRS_." */\r
-    0x4A,0x07,0x0A,0x76,0x88,0x0D,0x00,0x02,  /* 00003600    "J..v...." */\r
-    0x0C,0x00,0x00,0x00,0x00,0x00,0xFF,0x00,  /* 00003608    "........" */\r
-    0x00,0x00,0x00,0x01,0x88,0x0D,0x00,0x01,  /* 00003610    "........" */\r
-    0x0C,0x03,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00003618    "........" */\r
-    0x00,0x00,0x00,0x00,0x88,0x0D,0x00,0x01,  /* 00003620    "........" */\r
-    0x0C,0x03,0x00,0x00,0xB0,0x03,0xBB,0x03,  /* 00003628    "........" */\r
-    0x00,0x00,0x0C,0x00,0x88,0x0D,0x00,0x01,  /* 00003630    "........" */\r
-    0x0C,0x03,0x00,0x00,0xC0,0x03,0xDF,0x03,  /* 00003638    "........" */\r
-    0x00,0x00,0x20,0x00,0x87,0x17,0x00,0x00,  /* 00003640    ".. ....." */\r
-    0x0C,0x03,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00003648    "........" */\r
-    0x0A,0x00,0xFF,0xFF,0x0B,0x00,0x00,0x00,  /* 00003650    "........" */\r
-    0x00,0x00,0x00,0x00,0x02,0x00,0x87,0x17,  /* 00003658    "........" */\r
-    0x00,0x00,0x0C,0x03,0x00,0x00,0x00,0x00,  /* 00003660    "........" */\r
-    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00003668    "........" */\r
-    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00003670    "........" */\r
-    0x79,0x00,0x8A,0x43,0x52,0x53,0x5F,0x0A,  /* 00003678    "y..CRS_." */\r
-    0x64,0x4D,0x49,0x4E,0x35,0x8A,0x43,0x52,  /* 00003680    "dMIN5.CR" */\r
-    0x53,0x5F,0x0A,0x68,0x4D,0x41,0x58,0x35,  /* 00003688    "S_.hMAX5" */\r
-    0x8A,0x43,0x52,0x53,0x5F,0x0A,0x70,0x4C,  /* 00003690    ".CRS_.pL" */\r
-    0x45,0x4E,0x35,0x8A,0x43,0x52,0x53,0x5F,  /* 00003698    "EN5.CRS_" */\r
-    0x0A,0x4A,0x4D,0x49,0x4E,0x34,0x8A,0x43,  /* 000036A0    ".JMIN4.C" */\r
-    0x52,0x53,0x5F,0x0A,0x4E,0x4D,0x41,0x58,  /* 000036A8    "RS_.NMAX" */\r
-    0x34,0x8A,0x43,0x52,0x53,0x5F,0x0A,0x56,  /* 000036B0    "4.CRS_.V" */\r
-    0x4C,0x45,0x4E,0x34,0x8B,0x43,0x52,0x53,  /* 000036B8    "LEN4.CRS" */\r
-    0x5F,0x0A,0x18,0x4D,0x49,0x4E,0x49,0x8B,  /* 000036C0    "_..MINI." */\r
-    0x43,0x52,0x53,0x5F,0x0A,0x1A,0x4D,0x41,  /* 000036C8    "CRS_..MA" */\r
-    0x58,0x49,0x8B,0x43,0x52,0x53,0x5F,0x0A,  /* 000036D0    "XI.CRS_." */\r
-    0x1E,0x4C,0x45,0x4E,0x49,0x8B,0x43,0x52,  /* 000036D8    ".LENI.CR" */\r
-    0x53,0x5F,0x0A,0x28,0x4D,0x49,0x4E,0x31,  /* 000036E0    "S_.(MIN1" */\r
-    0x8B,0x43,0x52,0x53,0x5F,0x0A,0x2A,0x4D,  /* 000036E8    ".CRS_.*M" */\r
-    0x41,0x58,0x31,0x8B,0x43,0x52,0x53,0x5F,  /* 000036F0    "AX1.CRS_" */\r
-    0x0A,0x2E,0x4C,0x45,0x4E,0x31,0x8B,0x43,  /* 000036F8    "..LEN1.C" */\r
-    0x52,0x53,0x5F,0x0A,0x38,0x4D,0x49,0x4E,  /* 00003700    "RS_.8MIN" */\r
-    0x32,0x8B,0x43,0x52,0x53,0x5F,0x0A,0x3A,  /* 00003708    "2.CRS_.:" */\r
-    0x4D,0x41,0x58,0x32,0x8B,0x43,0x52,0x53,  /* 00003710    "MAX2.CRS" */\r
-    0x5F,0x0A,0x3E,0x4C,0x45,0x4E,0x32,0x8B,  /* 00003718    "_.>LEN2." */\r
-    0x43,0x52,0x53,0x5F,0x0A,0x08,0x4D,0x49,  /* 00003720    "CRS_..MI" */\r
-    0x4E,0x42,0x8B,0x43,0x52,0x53,0x5F,0x0A,  /* 00003728    "NB.CRS_." */\r
-    0x0A,0x4D,0x41,0x58,0x42,0x8B,0x43,0x52,  /* 00003730    ".MAXB.CR" */\r
-    0x53,0x5F,0x0A,0x0E,0x4C,0x45,0x4E,0x42,  /* 00003738    "S_..LENB" */\r
-    0x14,0x46,0x0C,0x5F,0x43,0x52,0x53,0x00,  /* 00003740    ".F._CRS." */\r
-    0xA0,0x28,0x4D,0x47,0x33,0x4C,0x70,0x4D,  /* 00003748    ".(MG3LpM" */\r
-    0x47,0x33,0x42,0x4D,0x49,0x4E,0x35,0x70,  /* 00003750    "G3BMIN5p" */\r
-    0x4D,0x47,0x33,0x4C,0x4C,0x45,0x4E,0x35,  /* 00003758    "MG3LLEN5" */\r
-    0x70,0x4D,0x47,0x33,0x4C,0x60,0x72,0x4D,  /* 00003760    "pMG3L`rM" */\r
-    0x49,0x4E,0x35,0x76,0x60,0x4D,0x41,0x58,  /* 00003768    "IN5v`MAX" */\r
-    0x35,0xA0,0x3E,0x92,0x93,0x56,0x47,0x41,  /* 00003770    "5.>..VGA" */\r
-    0x4F,0x01,0x70,0x00,0x4D,0x49,0x4E,0x34,  /* 00003778    "O.p.MIN4" */\r
-    0x70,0x00,0x4D,0x41,0x58,0x34,0x70,0x00,  /* 00003780    "p.MAX4p." */\r
-    0x4C,0x45,0x4E,0x34,0x70,0x00,0x4D,0x49,  /* 00003788    "LEN4p.MI" */\r
-    0x4E,0x31,0x70,0x00,0x4D,0x41,0x58,0x31,  /* 00003790    "N1p.MAX1" */\r
-    0x70,0x00,0x4C,0x45,0x4E,0x31,0x70,0x00,  /* 00003798    "p.LEN1p." */\r
-    0x4D,0x49,0x4E,0x32,0x70,0x00,0x4D,0x41,  /* 000037A0    "MIN2p.MA" */\r
-    0x58,0x32,0x70,0x00,0x4C,0x45,0x4E,0x32,  /* 000037A8    "X2p.LEN2" */\r
-    0xA0,0x28,0x49,0x4F,0x4C,0x31,0x70,0x49,  /* 000037B0    ".(IOL1pI" */\r
-    0x4F,0x42,0x31,0x4D,0x49,0x4E,0x49,0x70,  /* 000037B8    "OB1MINIp" */\r
-    0x49,0x4F,0x4C,0x31,0x4C,0x45,0x4E,0x49,  /* 000037C0    "IOL1LENI" */\r
-    0x70,0x49,0x4F,0x4C,0x31,0x60,0x72,0x4D,  /* 000037C8    "pIOL1`rM" */\r
-    0x49,0x4E,0x49,0x76,0x60,0x4D,0x41,0x58,  /* 000037D0    "INIv`MAX" */\r
-    0x49,0x70,0x53,0x45,0x42,0x31,0x60,0x70,  /* 000037D8    "IpSEB1`p" */\r
-    0x60,0x4D,0x49,0x4E,0x42,0x70,0x53,0x55,  /* 000037E0    "`MINBpSU" */\r
-    0x42,0x31,0x60,0x70,0x60,0x4D,0x41,0x58,  /* 000037E8    "B1`p`MAX" */\r
-    0x42,0x74,0x53,0x55,0x42,0x31,0x53,0x45,  /* 000037F0    "BtSUB1SE" */\r
-    0x42,0x31,0x60,0x72,0x60,0x01,0x4C,0x45,  /* 000037F8    "B1`r`.LE" */\r
-    0x4E,0x42,0xA4,0x43,0x52,0x53,0x5F,0x10,  /* 00003800    "NB.CRS_." */\r
-    0x42,0x23,0x50,0x43,0x49,0x43,0x14,0x0B,  /* 00003808    "B#PCIC.." */\r
-    0x42,0x4E,0x30,0x43,0x00,0xA4,0x53,0x45,  /* 00003810    "BN0C..SE" */\r
-    0x42,0x32,0x14,0x11,0x5F,0x53,0x54,0x41,  /* 00003818    "B2.._STA" */\r
-    0x00,0xA0,0x08,0x53,0x45,0x42,0x32,0xA4,  /* 00003820    "...SEB2." */\r
-    0x0A,0x0F,0xA4,0x00,0x08,0x43,0x52,0x53,  /* 00003828    ".....CRS" */\r
-    0x5F,0x11,0x4A,0x07,0x0A,0x76,0x88,0x0D,  /* 00003830    "_.J..v.." */\r
-    0x00,0x02,0x0C,0x00,0x00,0x00,0x00,0x00,  /* 00003838    "........" */\r
-    0xFF,0x00,0x00,0x00,0x00,0x01,0x88,0x0D,  /* 00003840    "........" */\r
-    0x00,0x01,0x0C,0x03,0x00,0x00,0x00,0x00,  /* 00003848    "........" */\r
-    0x00,0x00,0x00,0x00,0x00,0x00,0x88,0x0D,  /* 00003850    "........" */\r
-    0x00,0x01,0x0C,0x03,0x00,0x00,0xB0,0x03,  /* 00003858    "........" */\r
-    0xBB,0x03,0x00,0x00,0x0C,0x00,0x88,0x0D,  /* 00003860    "........" */\r
-    0x00,0x01,0x0C,0x03,0x00,0x00,0xC0,0x03,  /* 00003868    "........" */\r
-    0xDF,0x03,0x00,0x00,0x20,0x00,0x87,0x17,  /* 00003870    ".... ..." */\r
-    0x00,0x00,0x0C,0x03,0x00,0x00,0x00,0x00,  /* 00003878    "........" */\r
-    0x00,0x00,0x0A,0x00,0xFF,0xFF,0x0B,0x00,  /* 00003880    "........" */\r
-    0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x00,  /* 00003888    "........" */\r
-    0x87,0x17,0x00,0x00,0x0C,0x03,0x00,0x00,  /* 00003890    "........" */\r
-    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00003898    "........" */\r
-    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 000038A0    "........" */\r
-    0x00,0x00,0x79,0x00,0x8A,0x43,0x52,0x53,  /* 000038A8    "..y..CRS" */\r
-    0x5F,0x0A,0x64,0x4D,0x49,0x4E,0x35,0x8A,  /* 000038B0    "_.dMIN5." */\r
-    0x43,0x52,0x53,0x5F,0x0A,0x68,0x4D,0x41,  /* 000038B8    "CRS_.hMA" */\r
-    0x58,0x35,0x8A,0x43,0x52,0x53,0x5F,0x0A,  /* 000038C0    "X5.CRS_." */\r
-    0x70,0x4C,0x45,0x4E,0x35,0x8A,0x43,0x52,  /* 000038C8    "pLEN5.CR" */\r
-    0x53,0x5F,0x0A,0x4A,0x4D,0x49,0x4E,0x34,  /* 000038D0    "S_.JMIN4" */\r
-    0x8A,0x43,0x52,0x53,0x5F,0x0A,0x4E,0x4D,  /* 000038D8    ".CRS_.NM" */\r
-    0x41,0x58,0x34,0x8A,0x43,0x52,0x53,0x5F,  /* 000038E0    "AX4.CRS_" */\r
-    0x0A,0x56,0x4C,0x45,0x4E,0x34,0x8B,0x43,  /* 000038E8    ".VLEN4.C" */\r
-    0x52,0x53,0x5F,0x0A,0x18,0x4D,0x49,0x4E,  /* 000038F0    "RS_..MIN" */\r
-    0x49,0x8B,0x43,0x52,0x53,0x5F,0x0A,0x1A,  /* 000038F8    "I.CRS_.." */\r
-    0x4D,0x41,0x58,0x49,0x8B,0x43,0x52,0x53,  /* 00003900    "MAXI.CRS" */\r
-    0x5F,0x0A,0x1E,0x4C,0x45,0x4E,0x49,0x8B,  /* 00003908    "_..LENI." */\r
-    0x43,0x52,0x53,0x5F,0x0A,0x28,0x4D,0x49,  /* 00003910    "CRS_.(MI" */\r
-    0x4E,0x31,0x8B,0x43,0x52,0x53,0x5F,0x0A,  /* 00003918    "N1.CRS_." */\r
-    0x2A,0x4D,0x41,0x58,0x31,0x8B,0x43,0x52,  /* 00003920    "*MAX1.CR" */\r
-    0x53,0x5F,0x0A,0x2E,0x4C,0x45,0x4E,0x31,  /* 00003928    "S_..LEN1" */\r
-    0x8B,0x43,0x52,0x53,0x5F,0x0A,0x38,0x4D,  /* 00003930    ".CRS_.8M" */\r
-    0x49,0x4E,0x32,0x8B,0x43,0x52,0x53,0x5F,  /* 00003938    "IN2.CRS_" */\r
-    0x0A,0x3A,0x4D,0x41,0x58,0x32,0x8B,0x43,  /* 00003940    ".:MAX2.C" */\r
-    0x52,0x53,0x5F,0x0A,0x3E,0x4C,0x45,0x4E,  /* 00003948    "RS_.>LEN" */\r
-    0x32,0x8B,0x43,0x52,0x53,0x5F,0x0A,0x08,  /* 00003950    "2.CRS_.." */\r
-    0x4D,0x49,0x4E,0x42,0x8B,0x43,0x52,0x53,  /* 00003958    "MINB.CRS" */\r
-    0x5F,0x0A,0x0A,0x4D,0x41,0x58,0x42,0x8B,  /* 00003960    "_..MAXB." */\r
-    0x43,0x52,0x53,0x5F,0x0A,0x0E,0x4C,0x45,  /* 00003968    "CRS_..LE" */\r
-    0x4E,0x42,0x14,0x47,0x0C,0x5F,0x43,0x52,  /* 00003970    "NB.G._CR" */\r
-    0x53,0x00,0xA0,0x28,0x4D,0x47,0x34,0x4C,  /* 00003978    "S..(MG4L" */\r
-    0x70,0x4D,0x47,0x34,0x42,0x4D,0x49,0x4E,  /* 00003980    "pMG4BMIN" */\r
-    0x35,0x70,0x4D,0x47,0x34,0x4C,0x4C,0x45,  /* 00003988    "5pMG4LLE" */\r
-    0x4E,0x35,0x70,0x4D,0x47,0x34,0x4C,0x60,  /* 00003990    "N5pMG4L`" */\r
-    0x72,0x4D,0x49,0x4E,0x35,0x76,0x60,0x4D,  /* 00003998    "rMIN5v`M" */\r
-    0x41,0x58,0x35,0xA0,0x3F,0x92,0x93,0x56,  /* 000039A0    "AX5.?..V" */\r
-    0x47,0x41,0x4F,0x0A,0x02,0x70,0x00,0x4D,  /* 000039A8    "GAO..p.M" */\r
-    0x49,0x4E,0x34,0x70,0x00,0x4D,0x41,0x58,  /* 000039B0    "IN4p.MAX" */\r
-    0x34,0x70,0x00,0x4C,0x45,0x4E,0x34,0x70,  /* 000039B8    "4p.LEN4p" */\r
-    0x00,0x4D,0x49,0x4E,0x31,0x70,0x00,0x4D,  /* 000039C0    ".MIN1p.M" */\r
-    0x41,0x58,0x31,0x70,0x00,0x4C,0x45,0x4E,  /* 000039C8    "AX1p.LEN" */\r
-    0x31,0x70,0x00,0x4D,0x49,0x4E,0x32,0x70,  /* 000039D0    "1p.MIN2p" */\r
-    0x00,0x4D,0x41,0x58,0x32,0x70,0x00,0x4C,  /* 000039D8    ".MAX2p.L" */\r
-    0x45,0x4E,0x32,0xA0,0x28,0x49,0x4F,0x4C,  /* 000039E0    "EN2.(IOL" */\r
-    0x32,0x70,0x49,0x4F,0x42,0x32,0x4D,0x49,  /* 000039E8    "2pIOB2MI" */\r
-    0x4E,0x49,0x70,0x49,0x4F,0x4C,0x32,0x4C,  /* 000039F0    "NIpIOL2L" */\r
-    0x45,0x4E,0x49,0x70,0x49,0x4F,0x4C,0x32,  /* 000039F8    "ENIpIOL2" */\r
-    0x60,0x72,0x4D,0x49,0x4E,0x49,0x76,0x60,  /* 00003A00    "`rMINIv`" */\r
-    0x4D,0x41,0x58,0x49,0x70,0x53,0x45,0x42,  /* 00003A08    "MAXIpSEB" */\r
-    0x32,0x60,0x70,0x60,0x4D,0x49,0x4E,0x42,  /* 00003A10    "2`p`MINB" */\r
-    0x70,0x53,0x55,0x42,0x32,0x60,0x70,0x60,  /* 00003A18    "pSUB2`p`" */\r
-    0x4D,0x41,0x58,0x42,0x74,0x53,0x55,0x42,  /* 00003A20    "MAXBtSUB" */\r
-    0x32,0x53,0x45,0x42,0x32,0x60,0x72,0x60,  /* 00003A28    "2SEB2`r`" */\r
-    0x01,0x4C,0x45,0x4E,0x42,0xA4,0x43,0x52,  /* 00003A30    ".LENB.CR" */\r
-    0x53,0x5F,0x10,0x42,0x23,0x50,0x43,0x49,  /* 00003A38    "S_.B#PCI" */\r
-    0x44,0x14,0x0B,0x42,0x4E,0x30,0x44,0x00,  /* 00003A40    "D..BN0D." */\r
-    0xA4,0x53,0x45,0x42,0x33,0x14,0x11,0x5F,  /* 00003A48    ".SEB3.._" */\r
-    0x53,0x54,0x41,0x00,0xA0,0x08,0x53,0x45,  /* 00003A50    "STA...SE" */\r
-    0x42,0x33,0xA4,0x0A,0x0F,0xA4,0x00,0x08,  /* 00003A58    "B3......" */\r
-    0x43,0x52,0x53,0x5F,0x11,0x4A,0x07,0x0A,  /* 00003A60    "CRS_.J.." */\r
-    0x76,0x88,0x0D,0x00,0x02,0x0C,0x00,0x00,  /* 00003A68    "v......." */\r
-    0x00,0x00,0x00,0xFF,0x00,0x00,0x00,0x00,  /* 00003A70    "........" */\r
-    0x01,0x88,0x0D,0x00,0x01,0x0C,0x03,0x00,  /* 00003A78    "........" */\r
-    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00003A80    "........" */\r
-    0x00,0x88,0x0D,0x00,0x01,0x0C,0x03,0x00,  /* 00003A88    "........" */\r
-    0x00,0xB0,0x03,0xBB,0x03,0x00,0x00,0x0C,  /* 00003A90    "........" */\r
-    0x00,0x88,0x0D,0x00,0x01,0x0C,0x03,0x00,  /* 00003A98    "........" */\r
-    0x00,0xC0,0x03,0xDF,0x03,0x00,0x00,0x20,  /* 00003AA0    "....... " */\r
-    0x00,0x87,0x17,0x00,0x00,0x0C,0x03,0x00,  /* 00003AA8    "........" */\r
-    0x00,0x00,0x00,0x00,0x00,0x0A,0x00,0xFF,  /* 00003AB0    "........" */\r
-    0xFF,0x0B,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00003AB8    "........" */\r
-    0x00,0x02,0x00,0x87,0x17,0x00,0x00,0x0C,  /* 00003AC0    "........" */\r
-    0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00003AC8    "........" */\r
-    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00003AD0    "........" */\r
-    0x00,0x00,0x00,0x00,0x00,0x79,0x00,0x8A,  /* 00003AD8    ".....y.." */\r
-    0x43,0x52,0x53,0x5F,0x0A,0x64,0x4D,0x49,  /* 00003AE0    "CRS_.dMI" */\r
-    0x4E,0x35,0x8A,0x43,0x52,0x53,0x5F,0x0A,  /* 00003AE8    "N5.CRS_." */\r
-    0x68,0x4D,0x41,0x58,0x35,0x8A,0x43,0x52,  /* 00003AF0    "hMAX5.CR" */\r
-    0x53,0x5F,0x0A,0x70,0x4C,0x45,0x4E,0x35,  /* 00003AF8    "S_.pLEN5" */\r
-    0x8A,0x43,0x52,0x53,0x5F,0x0A,0x4A,0x4D,  /* 00003B00    ".CRS_.JM" */\r
-    0x49,0x4E,0x34,0x8A,0x43,0x52,0x53,0x5F,  /* 00003B08    "IN4.CRS_" */\r
-    0x0A,0x4E,0x4D,0x41,0x58,0x34,0x8A,0x43,  /* 00003B10    ".NMAX4.C" */\r
-    0x52,0x53,0x5F,0x0A,0x56,0x4C,0x45,0x4E,  /* 00003B18    "RS_.VLEN" */\r
-    0x34,0x8B,0x43,0x52,0x53,0x5F,0x0A,0x18,  /* 00003B20    "4.CRS_.." */\r
-    0x4D,0x49,0x4E,0x49,0x8B,0x43,0x52,0x53,  /* 00003B28    "MINI.CRS" */\r
-    0x5F,0x0A,0x1A,0x4D,0x41,0x58,0x49,0x8B,  /* 00003B30    "_..MAXI." */\r
-    0x43,0x52,0x53,0x5F,0x0A,0x1E,0x4C,0x45,  /* 00003B38    "CRS_..LE" */\r
-    0x4E,0x49,0x8B,0x43,0x52,0x53,0x5F,0x0A,  /* 00003B40    "NI.CRS_." */\r
-    0x28,0x4D,0x49,0x4E,0x31,0x8B,0x43,0x52,  /* 00003B48    "(MIN1.CR" */\r
-    0x53,0x5F,0x0A,0x2A,0x4D,0x41,0x58,0x31,  /* 00003B50    "S_.*MAX1" */\r
-    0x8B,0x43,0x52,0x53,0x5F,0x0A,0x2E,0x4C,  /* 00003B58    ".CRS_..L" */\r
-    0x45,0x4E,0x31,0x8B,0x43,0x52,0x53,0x5F,  /* 00003B60    "EN1.CRS_" */\r
-    0x0A,0x38,0x4D,0x49,0x4E,0x32,0x8B,0x43,  /* 00003B68    ".8MIN2.C" */\r
-    0x52,0x53,0x5F,0x0A,0x3A,0x4D,0x41,0x58,  /* 00003B70    "RS_.:MAX" */\r
-    0x32,0x8B,0x43,0x52,0x53,0x5F,0x0A,0x3E,  /* 00003B78    "2.CRS_.>" */\r
-    0x4C,0x45,0x4E,0x32,0x8B,0x43,0x52,0x53,  /* 00003B80    "LEN2.CRS" */\r
-    0x5F,0x0A,0x08,0x4D,0x49,0x4E,0x42,0x8B,  /* 00003B88    "_..MINB." */\r
-    0x43,0x52,0x53,0x5F,0x0A,0x0A,0x4D,0x41,  /* 00003B90    "CRS_..MA" */\r
-    0x58,0x42,0x8B,0x43,0x52,0x53,0x5F,0x0A,  /* 00003B98    "XB.CRS_." */\r
-    0x0E,0x4C,0x45,0x4E,0x42,0x14,0x47,0x0C,  /* 00003BA0    ".LENB.G." */\r
-    0x5F,0x43,0x52,0x53,0x00,0xA0,0x28,0x4D,  /* 00003BA8    "_CRS..(M" */\r
-    0x47,0x35,0x4C,0x70,0x4D,0x47,0x35,0x42,  /* 00003BB0    "G5LpMG5B" */\r
-    0x4D,0x49,0x4E,0x35,0x70,0x4D,0x47,0x35,  /* 00003BB8    "MIN5pMG5" */\r
-    0x4C,0x4C,0x45,0x4E,0x35,0x70,0x4D,0x47,  /* 00003BC0    "LLEN5pMG" */\r
-    0x35,0x4C,0x60,0x72,0x4D,0x49,0x4E,0x35,  /* 00003BC8    "5L`rMIN5" */\r
-    0x76,0x60,0x4D,0x41,0x58,0x35,0xA0,0x3F,  /* 00003BD0    "v`MAX5.?" */\r
-    0x92,0x93,0x56,0x47,0x41,0x4F,0x0A,0x03,  /* 00003BD8    "..VGAO.." */\r
-    0x70,0x00,0x4D,0x49,0x4E,0x34,0x70,0x00,  /* 00003BE0    "p.MIN4p." */\r
-    0x4D,0x41,0x58,0x34,0x70,0x00,0x4C,0x45,  /* 00003BE8    "MAX4p.LE" */\r
-    0x4E,0x34,0x70,0x00,0x4D,0x49,0x4E,0x31,  /* 00003BF0    "N4p.MIN1" */\r
-    0x70,0x00,0x4D,0x41,0x58,0x31,0x70,0x00,  /* 00003BF8    "p.MAX1p." */\r
-    0x4C,0x45,0x4E,0x31,0x70,0x00,0x4D,0x49,  /* 00003C00    "LEN1p.MI" */\r
-    0x4E,0x32,0x70,0x00,0x4D,0x41,0x58,0x32,  /* 00003C08    "N2p.MAX2" */\r
-    0x70,0x00,0x4C,0x45,0x4E,0x32,0xA0,0x28,  /* 00003C10    "p.LEN2.(" */\r
-    0x49,0x4F,0x4C,0x33,0x70,0x49,0x4F,0x42,  /* 00003C18    "IOL3pIOB" */\r
-    0x33,0x4D,0x49,0x4E,0x49,0x70,0x49,0x4F,  /* 00003C20    "3MINIpIO" */\r
-    0x4C,0x33,0x4C,0x45,0x4E,0x49,0x70,0x49,  /* 00003C28    "L3LENIpI" */\r
-    0x4F,0x4C,0x33,0x60,0x72,0x4D,0x49,0x4E,  /* 00003C30    "OL3`rMIN" */\r
-    0x49,0x76,0x60,0x4D,0x41,0x58,0x49,0x70,  /* 00003C38    "Iv`MAXIp" */\r
-    0x53,0x45,0x42,0x33,0x60,0x70,0x60,0x4D,  /* 00003C40    "SEB3`p`M" */\r
-    0x49,0x4E,0x42,0x70,0x53,0x55,0x42,0x33,  /* 00003C48    "INBpSUB3" */\r
-    0x60,0x70,0x60,0x4D,0x41,0x58,0x42,0x74,  /* 00003C50    "`p`MAXBt" */\r
-    0x53,0x55,0x42,0x33,0x53,0x45,0x42,0x33,  /* 00003C58    "SUB3SEB3" */\r
-    0x60,0x72,0x60,0x01,0x4C,0x45,0x4E,0x42,  /* 00003C60    "`r`.LENB" */\r
-    0xA4,0x43,0x52,0x53,0x5F,0x14,0x44,0x05,  /* 00003C68    ".CRS_.D." */\r
-    0x5F,0x50,0x54,0x53,0x01,0x70,0x68,0x44,  /* 00003C70    "_PTS.phD" */\r
-    0x42,0x47,0x38,0x50,0x54,0x53,0x5F,0x68,  /* 00003C78    "BG8PTS_h" */\r
-    0x70,0x00,0x88,0x57,0x41,0x4B,0x50,0x00,  /* 00003C80    "p..WAKP." */\r
-    0x00,0x70,0x00,0x88,0x57,0x41,0x4B,0x50,  /* 00003C88    ".p..WAKP" */\r
-    0x01,0x00,0x70,0x5C,0x2F,0x03,0x5F,0x53,  /* 00003C90    "..p\/._S" */\r
-    0x42,0x5F,0x50,0x43,0x49,0x41,0x53,0x54,  /* 00003C98    "B_PCIAST" */\r
-    0x4D,0x43,0x5C,0x2F,0x03,0x5F,0x53,0x42,  /* 00003CA0    "MC\/._SB" */\r
-    0x5F,0x50,0x43,0x49,0x41,0x53,0x54,0x4D,  /* 00003CA8    "_PCIASTM" */\r
-    0x43,0x70,0x01,0x5C,0x2F,0x03,0x5F,0x53,  /* 00003CB0    "Cp.\/._S" */\r
-    0x42,0x5F,0x50,0x43,0x49,0x41,0x54,0x52,  /* 00003CB8    "B_PCIATR" */\r
-    0x50,0x45,0x14,0x36,0x5F,0x57,0x41,0x4B,  /* 00003CC0    "PE.6_WAK" */\r
-    0x01,0x79,0x68,0x0A,0x04,0x44,0x42,0x47,  /* 00003CC8    ".yh..DBG" */\r
-    0x38,0x57,0x41,0x4B,0x5F,0x68,0xA0,0x12,  /* 00003CD0    "8WAK_h.." */\r
-    0x83,0x88,0x57,0x41,0x4B,0x50,0x00,0x00,  /* 00003CD8    "..WAKP.." */\r
-    0x70,0x00,0x88,0x57,0x41,0x4B,0x50,0x01,  /* 00003CE0    "p..WAKP." */\r
-    0x00,0xA1,0x0A,0x70,0x68,0x88,0x57,0x41,  /* 00003CE8    "...ph.WA" */\r
-    0x4B,0x50,0x01,0x00,0xA4,0x57,0x41,0x4B,  /* 00003CF0    "KP...WAK" */\r
-    0x50,0x08,0x5F,0x53,0x30,0x5F,0x12,0x06,  /* 00003CF8    "P._S0_.." */\r
-    0x04,0x00,0x00,0x00,0x00,0x08,0x5F,0x53,  /* 00003D00    "......_S" */\r
-    0x31,0x5F,0x12,0x06,0x04,0x01,0x00,0x00,  /* 00003D08    "1_......" */\r
-    0x00,0x08,0x5F,0x53,0x34,0x5F,0x12,0x07,  /* 00003D10    ".._S4_.." */\r
-    0x04,0x0A,0x06,0x00,0x00,0x00,0x08,0x5F,  /* 00003D18    "......._" */\r
-    0x53,0x35,0x5F,0x12,0x07,0x04,0x0A,0x07,  /* 00003D20    "S5_....." */\r
-    0x00,0x00,0x00,0x14,0x1D,0x50,0x54,0x53,  /* 00003D28    ".....PTS" */\r
-    0x5F,0x01,0xA0,0x16,0x68,0x5C,0x2F,0x04,  /* 00003D30    "_...h\/." */\r
-    0x5F,0x53,0x42,0x5F,0x50,0x43,0x49,0x41,  /* 00003D38    "_SB_PCIA" */\r
-    0x53,0x42,0x52,0x47,0x53,0x49,0x4F,0x53,  /* 00003D40    "SBRGSIOS" */\r
-    0x68,0x14,0x1A,0x57,0x41,0x4B,0x5F,0x01,  /* 00003D48    "h..WAK_." */\r
-    0x5C,0x2F,0x04,0x5F,0x53,0x42,0x5F,0x50,  /* 00003D50    "\/._SB_P" */\r
-    0x43,0x49,0x41,0x53,0x42,0x52,0x47,0x53,  /* 00003D58    "CIASBRGS" */\r
-    0x49,0x4F,0x57,0x68,\r
-};\r

diff --git a/src/mainboard/agami/aruma/dx/amd8111.asl b/src/mainboard/agami/aruma/dx/amd8111.asl
deleted file mode 100644 (file)
index a26d2b4..0000000
--- a/src/mainboard/agami/aruma/dx/amd8111.asl
+++ /dev/null
@@ -1,172 +0,0 @@
-/*
- * Copyright 2005 AMD
- */
-//AMD8111
-            Name (APIC, Package (0x04)
-            {
-                Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x10},// 0x0004ffff : assusme 8131 is present 
-                Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x11}, 
-                Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x12}, 
-                Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x13}
-            })
-
-            Name (PICM, Package (0x04)
-            {
-                Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI1.LNKA, 0x00}, 
-                Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI1.LNKB, 0x00}, 
-                Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI1.LNKC, 0x00}, 
-                Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI1.LNKD, 0x00}
-            })
-
-           Name (DNCG, Ones)
-
-            Method (_PRT, 0, NotSerialized)
-            {
-               If (LEqual (^DNCG, Ones)) {
-                       Store (DADD(\_SB.PCI0.SBDN, 0x0001ffff), Local0)
-                       // Update the Device Number according to SBDN
-                        Store(Local0, Index (DeRefOf (Index (PICM, 0)), 0))
-                        Store(Local0, Index (DeRefOf (Index (PICM, 1)), 0))
-                        Store(Local0, Index (DeRefOf (Index (PICM, 2)), 0))
-                        Store(Local0, Index (DeRefOf (Index (PICM, 3)), 0))
-
-                        Store(Local0, Index (DeRefOf (Index (APIC, 0)), 0))
-                        Store(Local0, Index (DeRefOf (Index (APIC, 1)), 0))
-                        Store(Local0, Index (DeRefOf (Index (APIC, 2)), 0))
-                        Store(Local0, Index (DeRefOf (Index (APIC, 3)), 0))
-                       
-                       Store (0x00, ^DNCG)
-                       
-               }
-
-                If (LNot (PICF)) { 
-                       Return (PICM) 
-               }
-                Else {
-                       Return (APIC) 
-               }
-            }
-
-            Device (SBC3)
-            {
-                /*  acpi smbus   it should be 0x00040003 if 8131 present */
-               Method (_ADR, 0, NotSerialized)
-               {
-                       Return (DADD(\_SB.PCI0.SBDN, 0x00010003))
-               }
-                OperationRegion (PIRQ, PCI_Config, 0x56, 0x02)
-                Field (PIRQ, ByteAcc, Lock, Preserve)
-                {
-                    PIBA,   8, 
-                    PIDC,   8
-                }
-/*
-                OperationRegion (TS3_, PCI_Config, 0xC4, 0x02)
-                Field (TS3_, DWordAcc, NoLock, Preserve)
-                {
-                    PTS3,   16
-                }
-*/
-            }
-
-            Device (HPET)
-            {
-                Name (HPT, 0x00)
-                Name (_HID, EisaId ("PNP0103"))
-                Name (_UID, 0x00)
-                Method (_STA, 0, NotSerialized)
-                {
-                    Return (0x0F)
-                }
-
-                Method (_CRS, 0, NotSerialized)
-                {
-                    Name (BUF0, ResourceTemplate ()
-                    {
-                        Memory32Fixed (ReadWrite, 0xFED00000, 0x00000400)
-                    })
-                    Return (BUF0)
-                }
-            }
-
-           Include ("amd8111_pic.asl")
-
-           Include ("amd8111_isa.asl")
-
-            Device (TP2P)
-            {
-                /* 8111 P2P and it should 0x00030000 when 8131 present*/
-                Method (_ADR, 0, NotSerialized)
-                {
-                       Return (DADD(\_SB.PCI0.SBDN, 0x00000000))
-                }
-
-                Method (_PRW, 0, NotSerialized)
-                {
-                    If (CondRefOf (\_S3, Local0)) { Return (Package (0x02) { 0x08, 0x03 }) }
-                    Else { Return (Package (0x02) { 0x08, 0x01 }) }
-                }
-
-                Device (USB0)
-                {
-                    Name (_ADR, 0x00000000)
-                    Method (_PRW, 0, NotSerialized)
-                    {
-                        If (CondRefOf (\_S3, Local0)) { Return (Package (0x02) { 0x0F, 0x03 }) }
-                        Else { Return (Package (0x02) { 0x0F, 0x01 }) }
-                    }
-                }
-
-                Device (USB1)
-                {
-                    Name (_ADR, 0x00000001)
-                    Method (_PRW, 0, NotSerialized)
-                    {
-                        If (CondRefOf (\_S3, Local0)) { Return (Package (0x02) { 0x0F, 0x03 }) }
-                        Else { Return (Package (0x02) { 0x0F, 0x01 }) }
-                    }
-                }
-
-                Name (APIC, Package (0x0C)
-                {
-                    Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x10 }, //USB
-                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x11 },
-                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x12 },
-                    Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x13 },
-
-                    Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x10 }, //Slot 4
-                    Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x11 },
-                    Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x12 },
-                    Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x13 },
-
-                    Package (0x04) { 0x0005FFFF, 0x00, 0x00, 0x11 }, //Slot 3
-                    Package (0x04) { 0x0005FFFF, 0x01, 0x00, 0x12 },
-                    Package (0x04) { 0x0005FFFF, 0x02, 0x00, 0x13 },
-                    Package (0x04) { 0x0005FFFF, 0x03, 0x00, 0x10 }
-                })
-       
-                Name (PICM, Package (0x0C)
-                {
-                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI1.LNKA, 0x00 }, //USB
-                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI1.LNKB, 0x00 },
-                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI1.LNKC, 0x00 },
-                    Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI1.LNKD, 0x00 },
-
-                    Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI1.LNKA, 0x00 }, //Slot 4
-                    Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI1.LNKB, 0x00 },
-                    Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI1.LNKC, 0x00 },
-                    Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI1.LNKD, 0x00 },
-
-                    Package (0x04) { 0x0005FFFF, 0x00, \_SB.PCI1.LNKB, 0x00 }, //Slot 3
-                    Package (0x04) { 0x0005FFFF, 0x01, \_SB.PCI1.LNKC, 0x00 },
-                    Package (0x04) { 0x0005FFFF, 0x02, \_SB.PCI1.LNKD, 0x00 },
-                    Package (0x04) { 0x0005FFFF, 0x03, \_SB.PCI1.LNKA, 0x00 }
-                })
-
-                Method (_PRT, 0, NotSerialized)
-                {
-                    If (LNot (PICF)) { Return (PICM) }
-                    Else { Return (APIC) }
-                }
-            }
-

diff --git a/src/mainboard/agami/aruma/dx/amd8111_isa.asl b/src/mainboard/agami/aruma/dx/amd8111_isa.asl
deleted file mode 100644 (file)
index b682306..0000000
--- a/src/mainboard/agami/aruma/dx/amd8111_isa.asl
+++ /dev/null
@@ -1,176 +0,0 @@
-/*
- * Copyright 2005 AMD
- */
-//AMD8111 isa
-
-            Device (ISA)
-            {
-                /* lpc  0x00040000 */ 
-                Method (_ADR, 0, NotSerialized)
-                {
-                       Return (DADD(\_SB.PCI0.SBDN, 0x00010000))
-                }
-
-                OperationRegion (PIRY, PCI_Config, 0x51, 0x02) // LPC Decode Registers
-                Field (PIRY, ByteAcc, NoLock, Preserve)
-                {
-                    Z000,   2,  // Parallel Port Range
-                        ,   1, 
-                    ECP,    1,  // ECP Enable
-                    FDC1,   1,  // Floppy Drive Controller 1
-                    FDC2,   1,  // Floppy Drive Controller 2
-                    Offset (0x01), 
-                    Z001,   3,  // Serial Port A Range
-                    SAEN,   1,  // Serial Post A Enabled
-                    Z002,   3,  // Serial Port B Range
-                    SBEN,   1  // Serial Post B Enabled
-                }
-
-                Device (PIC)
-                {
-                    Name (_HID, EisaId ("PNP0000"))
-                    Name (_CRS, ResourceTemplate ()
-                    {
-                        IO (Decode16, 0x0020, 0x0020, 0x01, 0x02)
-                        IO (Decode16, 0x00A0, 0x00A0, 0x01, 0x02)
-                        IRQ (Edge, ActiveHigh, Exclusive) {2}
-                    })
-                }
-
-                Device (DMA1)
-                {
-                    Name (_HID, EisaId ("PNP0200"))
-                    Name (_CRS, ResourceTemplate ()
-                    {
-                        IO (Decode16, 0x0000, 0x0000, 0x01, 0x10)
-                        IO (Decode16, 0x0080, 0x0080, 0x01, 0x10)
-                        IO (Decode16, 0x00C0, 0x00C0, 0x01, 0x20)
-                        DMA (Compatibility, NotBusMaster, Transfer16) {4}
-                    })
-                }
-
-                Device (TMR)
-                {
-                    Name (_HID, EisaId ("PNP0100"))
-                    Name (_CRS, ResourceTemplate ()
-                    {
-                        IO (Decode16, 0x0040, 0x0040, 0x01, 0x04)
-                        IRQ (Edge, ActiveHigh, Exclusive) {0}
-                    })
-                }
-
-                Device (RTC)
-                {
-                    Name (_HID, EisaId ("PNP0B00"))
-                    Name (_CRS, ResourceTemplate ()
-                    {
-                        IO (Decode16, 0x0070, 0x0070, 0x01, 0x06)
-                        IRQ (Edge, ActiveHigh, Exclusive) {8}
-                    })
-                }
-
-                Device (SPKR)
-                {
-                    Name (_HID, EisaId ("PNP0800"))
-                    Name (_CRS, ResourceTemplate ()
-                    {
-                        IO (Decode16, 0x0061, 0x0061, 0x01, 0x01)
-                    })
-                }
-
-                Device (COPR)
-                {
-                    Name (_HID, EisaId ("PNP0C04"))
-                    Name (_CRS, ResourceTemplate ()
-                    {
-                        IO (Decode16, 0x00F0, 0x00F0, 0x01, 0x10)
-                        IRQ (Edge, ActiveHigh, Exclusive) {13}
-                    })
-                }
-
-                Device (SYSR)
-                {
-                    Name (_HID, EisaId ("PNP0C02"))
-                    Name (_UID, 0x00)
-                    Name (SYR1, ResourceTemplate ()
-                    {
-                        IO (Decode16, 0x04D0, 0x04D0, 0x01, 0x02) //wrh092302 - added to report Thor NVRAM
-                        IO (Decode16, 0x1100, 0x117F, 0x01, 0x80) //wrh092302 - added to report Thor NVRAM
-                        IO (Decode16, 0x1180, 0x11FF, 0x01, 0x80)
-                        IO (Decode16, 0x0010, 0x0010, 0x01, 0x10)
-                        IO (Decode16, 0x0022, 0x0022, 0x01, 0x1E)
-                        IO (Decode16, 0x0044, 0x0044, 0x01, 0x1C)
-                        IO (Decode16, 0x0062, 0x0062, 0x01, 0x02)
-                        IO (Decode16, 0x0065, 0x0065, 0x01, 0x0B)
-                        IO (Decode16, 0x0076, 0x0076, 0x01, 0x0A)
-                        IO (Decode16, 0x0090, 0x0090, 0x01, 0x10)
-                        IO (Decode16, 0x00A2, 0x00A2, 0x01, 0x1E)
-                        IO (Decode16, 0x00E0, 0x00E0, 0x01, 0x10)
-                        IO (Decode16, 0x0B78, 0x0B78, 0x01, 0x04) // Added this to remove ACPI Unrepoted IO Error 
-                        IO (Decode16, 0x0190, 0x0190, 0x01, 0x04) // Added this to remove ACPI Unrepoted IO Error
-                    })
-                    Method (_CRS, 0, NotSerialized)
-                    {
-                        Return (SYR1)
-                    }
-                }
-
-                Device (MEM)
-                {
-                    Name (_HID, EisaId ("PNP0C02"))
-                    Name (_UID, 0x01)
-                    Method (_CRS, 0, NotSerialized)
-                    {
-                        Name (BUF0, ResourceTemplate ()
-                        {
-                            Memory32Fixed (ReadWrite, 0x000E0000, 0x00020000) // BIOS E4000-FFFFF
-                            Memory32Fixed (ReadWrite, 0x000C0000, 0x00000000) // video BIOS c0000-c8404
-                            Memory32Fixed (ReadWrite, 0xFEC00000, 0x00001000) // I/O APIC
-                            Memory32Fixed (ReadWrite, 0xFFC00000, 0x00380000) // LPC forwarded, 4 MB w/ROM
-                            Memory32Fixed (ReadWrite, 0xFEE00000, 0x00001000) // Local APIC
-                            Memory32Fixed (ReadWrite, 0xFFF80000, 0x00080000) // Overlay BIOS
-                            Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) // Overlay BIOS
-                            Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) // Overlay BIOS
-                            Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) //Overlay BIOS
-                            Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) //Overlay BIOS
-                        })
-                       // Read the Video Memory length 
-                        CreateDWordField (BUF0, 0x14, CLEN)
-                        CreateDWordField (BUF0, 0x10, CBAS)
-
-                        ShiftLeft (VGA1, 0x09, Local0)
-                        Store (Local0, CLEN)
-
-                        Return (BUF0)
-                    }
-                }
-
-                Device (PS2M)
-                {
-                    Name (_HID, EisaId ("PNP0F13"))
-                    Name (_CRS, ResourceTemplate ()
-                    {
-                        IRQNoFlags () {12}
-                    })
-                    Method (_STA, 0, NotSerialized)
-                    {
-                        And (FLG0, 0x04, Local0)
-                        If (LEqual (Local0, 0x04)) { Return (0x0F) }
-                        Else { Return (0x00) }
-                    }
-                }
-
-                Device (PS2K)
-                {
-                    Name (_HID, EisaId ("PNP0303"))
-                    Name (_CRS, ResourceTemplate ()
-                    {
-                        IO (Decode16, 0x0060, 0x0060, 0x01, 0x01)
-                        IO (Decode16, 0x0064, 0x0064, 0x01, 0x01)
-                        IRQNoFlags () {1}
-                    })
-                }
-               Include ("superio.asl")
-
-            }
-

diff --git a/src/mainboard/agami/aruma/dx/amd8111_pic.asl b/src/mainboard/agami/aruma/dx/amd8111_pic.asl
deleted file mode 100644 (file)
index 295b650..0000000
--- a/src/mainboard/agami/aruma/dx/amd8111_pic.asl
+++ /dev/null
@@ -1,360 +0,0 @@
-/*
- * Copyright 2005 AMD
- */
-//AMD8111 pic LNKA B C D
-
-            Device (LNKA)
-            {
-                Name (_HID, EisaId ("PNP0C0F"))
-                Name (_UID, 0x01)
-                Method (_STA, 0, NotSerialized)
-                {
-                    And (\_SB.PCI1.SBC3.PIBA, 0x0F, Local0)
-                    If (LEqual (Local0, 0x00)) { Return (0x09) } //Disabled
-                    Else { Return (0x0B) } //Enabled
-                }
-
-                Method (_PRS, 0, NotSerialized)
-                {
-                    Name (BUFA, ResourceTemplate ()
-                    {
-                        IRQ (Level, ActiveLow, Shared) {3,5,10,11}
-                    })
-                    Return (BUFA)
-                }
-
-                Method (_DIS, 0, NotSerialized)
-                {
-                    Store (0x01, Local3)
-                    And (\_SB.PCI1.SBC3.PIBA, 0x0F, Local1)
-                    Store (Local1, Local2)
-                    If (LGreater (Local1, 0x07))
-                    {
-                        Subtract (Local1, 0x08, Local1)
-                    }
-
-                    ShiftLeft (Local3, Local1, Local3)
-                    Not (Local3, Local3)
-                    And (\_SB.PCI1.SBC3.PIBA, 0xF0, \_SB.PCI1.SBC3.PIBA)
-                }
-
-                Method (_CRS, 0, NotSerialized)
-                {
-                    Name (BUFA, ResourceTemplate ()
-                    {
-                        IRQ (Level, ActiveLow, Shared) {}
-                    })
-                    CreateByteField (BUFA, 0x01, IRA1)
-                    CreateByteField (BUFA, 0x02, IRA2)
-                    Store (0x00, Local3)
-                    Store (0x00, Local4)
-                    And (\_SB.PCI1.SBC3.PIBA, 0x0F, Local1)
-                    If (LNot (LEqual (Local1, 0x00)))
-                    {  // Routing enable
-                        If (LGreater (Local1, 0x07))
-                        {
-                            Subtract (Local1, 0x08, Local2)
-                            ShiftLeft (One, Local2, Local4)
-                        }
-                        Else
-                        {
-                            If (LGreater (Local1, 0x00))
-                            {
-                                ShiftLeft (One, Local1, Local3)
-                            }
-                        }
-
-                        Store (Local3, IRA1)
-                        Store (Local4, IRA2)
-                    }
-
-                    Return (BUFA)
-                }
-
-                Method (_SRS, 1, NotSerialized)
-                {
-                    CreateByteField (Arg0, 0x01, IRA1)
-                    CreateByteField (Arg0, 0x02, IRA2)
-                    ShiftLeft (IRA2, 0x08, Local0)
-                    Or (Local0, IRA1, Local0)
-                    Store (0x00, Local1)
-                    ShiftRight (Local0, 0x01, Local0)
-                    While (LGreater (Local0, 0x00))
-                    {
-                        Increment (Local1)
-                        ShiftRight (Local0, 0x01, Local0)
-                    }
-
-                    And (\_SB.PCI1.SBC3.PIBA, 0xF0, \_SB.PCI1.SBC3.PIBA)
-                    Or (\_SB.PCI1.SBC3.PIBA, Local1, \_SB.PCI1.SBC3.PIBA)
-                }
-            }
-
-            Device (LNKB)
-            {
-                Name (_HID, EisaId ("PNP0C0F"))
-                Name (_UID, 0x02)
-                Method (_STA, 0, NotSerialized)
-                {
-                    And (\_SB.PCI1.SBC3.PIBA, 0xF0, Local0)
-                    If (LEqual (Local0, 0x00)) { Return (0x09) }
-                    Else { Return (0x0B) }
-                }
-
-                Method (_PRS, 0, NotSerialized)
-                {
-                    Name (BUFB, ResourceTemplate ()
-                    {
-                        IRQ (Level, ActiveLow, Shared) {3,5,10,11}
-                    })
-                    Return (BUFB)
-                }
-
-                Method (_DIS, 0, NotSerialized)
-                {
-                    Store (0x01, Local3)
-                    And (\_SB.PCI1.SBC3.PIBA, 0xF0, Local1)
-                    ShiftRight (Local1, 0x04, Local1)
-                    Store (Local1, Local2)
-                    If (LGreater (Local1, 0x07))
-                    {
-                        Subtract (Local1, 0x08, Local1)
-                    }
-
-                    ShiftLeft (Local3, Local1, Local3)
-                    Not (Local3, Local3)
-                    And (\_SB.PCI1.SBC3.PIBA, 0x0F, \_SB.PCI1.SBC3.PIBA)
-                }
-
-                Method (_CRS, 0, NotSerialized)
-                {
-                    Name (BUFB, ResourceTemplate ()
-                    {
-                        IRQ (Level, ActiveLow, Shared) {}
-                    })
-                    CreateByteField (BUFB, 0x01, IRB1)
-                    CreateByteField (BUFB, 0x02, IRB2)
-                    Store (0x00, Local3)
-                    Store (0x00, Local4)
-                    And (\_SB.PCI1.SBC3.PIBA, 0xF0, Local1)
-                    ShiftRight (Local1, 0x04, Local1)
-                    If (LNot (LEqual (Local1, 0x00)))
-                    {
-                        If (LGreater (Local1, 0x07))
-                        {
-                            Subtract (Local1, 0x08, Local2)
-                            ShiftLeft (One, Local2, Local4)
-                        }
-                        Else
-                        {
-                            If (LGreater (Local1, 0x00))
-                            {
-                                ShiftLeft (One, Local1, Local3)
-                            }
-                        }
-
-                        Store (Local3, IRB1)
-                        Store (Local4, IRB2)
-                    }
-
-                    Return (BUFB)
-                }
-
-                Method (_SRS, 1, NotSerialized)
-                {
-                    CreateByteField (Arg0, 0x01, IRB1)
-                    CreateByteField (Arg0, 0x02, IRB2)
-                    ShiftLeft (IRB2, 0x08, Local0)
-                    Or (Local0, IRB1, Local0)
-                    Store (0x00, Local1)
-                    ShiftRight (Local0, 0x01, Local0)
-                    While (LGreater (Local0, 0x00))
-                    {
-                        Increment (Local1)
-                        ShiftRight (Local0, 0x01, Local0)
-                    }
-
-                    And (\_SB.PCI1.SBC3.PIBA, 0x0F, \_SB.PCI1.SBC3.PIBA)
-                    ShiftLeft (Local1, 0x04, Local1)
-                    Or (\_SB.PCI1.SBC3.PIBA, Local1, \_SB.PCI1.SBC3.PIBA)
-                }
-            }
-
-            Device (LNKC)
-            {
-                Name (_HID, EisaId ("PNP0C0F"))
-                Name (_UID, 0x03)
-                Method (_STA, 0, NotSerialized)
-                {
-                    And (\_SB.PCI1.SBC3.PIDC, 0x0F, Local0)
-                    If (LEqual (Local0, 0x00)) { Return (0x09) }
-                    Else { Return (0x0B) }
-                }
-
-                Method (_PRS, 0, NotSerialized)
-                {
-                    Name (BUFA, ResourceTemplate ()
-                    {
-                        IRQ (Level, ActiveLow, Shared) {3,5,10,11}
-                    })
-                    Return (BUFA)
-                }
-
-                Method (_DIS, 0, NotSerialized)
-                {
-                    Store (0x01, Local3)
-                    And (\_SB.PCI1.SBC3.PIDC, 0x0F, Local1)
-                    Store (Local1, Local2)
-                    If (LGreater (Local1, 0x07))
-                    {
-                        Subtract (Local1, 0x08, Local1)
-                    }
-
-                    ShiftLeft (Local3, Local1, Local3)
-                    Not (Local3, Local3)
-                    And (\_SB.PCI1.SBC3.PIDC, 0xF0, \_SB.PCI1.SBC3.PIDC)
-                }
-
-                Method (_CRS, 0, NotSerialized)
-                {
-                    Name (BUFA, ResourceTemplate ()
-                    {
-                        IRQ (Level, ActiveLow, Shared) {}
-                    })
-                    CreateByteField (BUFA, 0x01, IRA1)
-                    CreateByteField (BUFA, 0x02, IRA2)
-                    Store (0x00, Local3)
-                    Store (0x00, Local4)
-                    And (\_SB.PCI1.SBC3.PIDC, 0x0F, Local1)
-                    If (LNot (LEqual (Local1, 0x00)))
-                    {
-                        If (LGreater (Local1, 0x07))
-                        {
-                            Subtract (Local1, 0x08, Local2)
-                            ShiftLeft (One, Local2, Local4)
-                        }
-                        Else
-                        {
-                            If (LGreater (Local1, 0x00))
-                            {
-                                ShiftLeft (One, Local1, Local3)
-                            }
-                        }
-
-                        Store (Local3, IRA1)
-                        Store (Local4, IRA2)
-                    }
-
-                    Return (BUFA)
-                }
-
-                Method (_SRS, 1, NotSerialized)
-                {
-                    CreateByteField (Arg0, 0x01, IRA1)
-                    CreateByteField (Arg0, 0x02, IRA2)
-                    ShiftLeft (IRA2, 0x08, Local0)
-                    Or (Local0, IRA1, Local0)
-                    Store (0x00, Local1)
-                    ShiftRight (Local0, 0x01, Local0)
-                    While (LGreater (Local0, 0x00))
-                    {
-                        Increment (Local1)
-                        ShiftRight (Local0, 0x01, Local0)
-                    }
-
-                    And (\_SB.PCI1.SBC3.PIDC, 0xF0, \_SB.PCI1.SBC3.PIDC)
-                    Or (\_SB.PCI1.SBC3.PIDC, Local1, \_SB.PCI1.SBC3.PIDC)
-                }
-            }
-
-            Device (LNKD)
-            {
-                Name (_HID, EisaId ("PNP0C0F"))
-                Name (_UID, 0x04)
-                Method (_STA, 0, NotSerialized)
-                {
-                    And (\_SB.PCI1.SBC3.PIDC, 0xF0, Local0)
-                    If (LEqual (Local0, 0x00)) { Return (0x09) }
-                    Else { Return (0x0B) }
-                }
-
-                Method (_PRS, 0, NotSerialized)
-                {
-                    Name (BUFB, ResourceTemplate ()
-                    {
-                        IRQ (Level, ActiveLow, Shared) {3,5,10,11}
-                    })
-                    Return (BUFB)
-                }
-
-                Method (_DIS, 0, NotSerialized)
-                {
-                    Store (0x01, Local3)
-                    And (\_SB.PCI1.SBC3.PIDC, 0xF0, Local1)
-                    ShiftRight (Local1, 0x04, Local1)
-                    Store (Local1, Local2)
-                    If (LGreater (Local1, 0x07))
-                    {
-                        Subtract (Local1, 0x08, Local1)
-                    }
-
-                    ShiftLeft (Local3, Local1, Local3)
-                    Not (Local3, Local3)
-                    And (\_SB.PCI1.SBC3.PIDC, 0x0F, \_SB.PCI1.SBC3.PIDC)
-                }
-
-                Method (_CRS, 0, NotSerialized)
-                {
-                    Name (BUFB, ResourceTemplate ()
-                    {
-                        IRQ (Level, ActiveLow, Shared) {}
-                    })
-                    CreateByteField (BUFB, 0x01, IRB1)
-                    CreateByteField (BUFB, 0x02, IRB2)
-                    Store (0x00, Local3)
-                    Store (0x00, Local4)
-                    And (\_SB.PCI1.SBC3.PIDC, 0xF0, Local1)
-                    ShiftRight (Local1, 0x04, Local1)
-                    If (LNot (LEqual (Local1, 0x00)))
-                    {
-                        If (LGreater (Local1, 0x07))
-                        {
-                            Subtract (Local1, 0x08, Local2)
-                            ShiftLeft (One, Local2, Local4)
-                        }
-                        Else
-                        {
-                            If (LGreater (Local1, 0x00))
-                            {
-                                ShiftLeft (One, Local1, Local3)
-                            }
-                        }
-
-                        Store (Local3, IRB1)
-                        Store (Local4, IRB2)
-                    }
-
-                    Return (BUFB)
-                }
-
-                Method (_SRS, 1, NotSerialized)
-                {
-                    CreateByteField (Arg0, 0x01, IRB1)
-                    CreateByteField (Arg0, 0x02, IRB2)
-                    ShiftLeft (IRB2, 0x08, Local0)
-                    Or (Local0, IRB1, Local0)
-                    Store (0x00, Local1)
-                    ShiftRight (Local0, 0x01, Local0)
-                    While (LGreater (Local0, 0x00))
-                    {
-                        Increment (Local1)
-                        ShiftRight (Local0, 0x01, Local0)
-                    }
-
-                    And (\_SB.PCI1.SBC3.PIDC, 0x0F, \_SB.PCI1.SBC3.PIDC)
-                    ShiftLeft (Local1, 0x04, Local1)
-                    Or (\_SB.PCI1.SBC3.PIDC, Local1, \_SB.PCI1.SBC3.PIDC)
-                }
-            }
-
-

diff --git a/src/mainboard/agami/aruma/dx/amd8131.asl b/src/mainboard/agami/aruma/dx/amd8131.asl
deleted file mode 100644 (file)
index 3761eb0..0000000
--- a/src/mainboard/agami/aruma/dx/amd8131.asl
+++ /dev/null
@@ -1,119 +0,0 @@
-/*
- * Copyright 2005 AMD
- */
-               
-            Device (PG0A)
-            {
-                /*  8132 pcix bridge*/
-                Method (_ADR, 0, NotSerialized)
-                {
-                        Return (DADD(GHCD(HCIN, 0), 0x00000000))
-                }
-
-                Method (_PRW, 0, NotSerialized)
-                {
-                    If (CondRefOf (\_S3, Local0)) { Return (Package (0x02) { 0x29, 0x03 }) }
-                    Else { Return (Package (0x02) { 0x29, 0x01 }) }
-                }
-
-                Name (APIC, Package (0x14)
-                {
-                   // Slot A - PIRQ BCDA
-                    Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x19 }, //Slot 2 
-                    Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x1A }, 
-                    Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x1B }, 
-                    Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x18 },
- 
-                   //Cypress Slot A - PIRQ BCDA
-                    Package (0x04) { 0x0003FFFF, 0x00, 0x00, 0x19 }, //?
-                    Package (0x04) { 0x0003FFFF, 0x01, 0x00, 0x1A }, 
-                    Package (0x04) { 0x0003FFFF, 0x02, 0x00, 0x1B }, 
-                    Package (0x04) { 0x0003FFFF, 0x03, 0x00, 0x18 }, 
-
-                   //Cypress Slot B - PIRQ CDAB
-                    Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x1A }, //?
-                    Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x1B }, 
-                    Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x18 }, 
-                    Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x19 }, 
-
-                   //Cypress Slot C - PIRQ DABC
-                    Package (0x04) { 0x0005FFFF, 0x00, 0x00, 0x1B }, //?
-                    Package (0x04) { 0x0005FFFF, 0x01, 0x00, 0x18 }, 
-                    Package (0x04) { 0x0005FFFF, 0x02, 0x00, 0x19 }, 
-                    Package (0x04) { 0x0005FFFF, 0x03, 0x00, 0x1A }, 
-
-                   //Cypress Slot D - PIRQ ABCD
-                    Package (0x04) { 0x0006FFFF, 0x00, 0x00, 0x18 }, //?
-                    Package (0x04) { 0x0006FFFF, 0x01, 0x00, 0x19 }, 
-                    Package (0x04) { 0x0006FFFF, 0x02, 0x00, 0x1A }, 
-                    Package (0x04) { 0x0006FFFF, 0x03, 0x00, 0x1B }
-                })
-                Name (PICM, Package (0x14)
-                {
-                    Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI1.LNKB, 0x00 },//Slot 2 
-                    Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI1.LNKC, 0x00 }, 
-                    Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI1.LNKD, 0x00 }, 
-                    Package (0x04) { 0x0001FFFF, 0x03, \_SB.PCI1.LNKA, 0x00 }, 
-
-                    Package (0x04) { 0x0003FFFF, 0x00, \_SB.PCI1.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0003FFFF, 0x01, \_SB.PCI1.LNKC, 0x00 }, 
-                    Package (0x04) { 0x0003FFFF, 0x02, \_SB.PCI1.LNKD, 0x00 }, 
-                    Package (0x04) { 0x0003FFFF, 0x03, \_SB.PCI1.LNKA, 0x00 }, 
-
-                    Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI1.LNKC, 0x00 }, 
-                    Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI1.LNKD, 0x00 }, 
-                    Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI1.LNKA, 0x00 }, 
-                    Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI1.LNKB, 0x00 }, 
-
-                    Package (0x04) { 0x0005FFFF, 0x00, \_SB.PCI1.LNKD, 0x00 }, 
-                    Package (0x04) { 0x0005FFFF, 0x01, \_SB.PCI1.LNKA, 0x00 }, 
-                    Package (0x04) { 0x0005FFFF, 0x02, \_SB.PCI1.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0005FFFF, 0x03, \_SB.PCI1.LNKC, 0x00 }, 
-
-                    Package (0x04) { 0x0006FFFF, 0x00, \_SB.PCI1.LNKA, 0x00 }, 
-                    Package (0x04) { 0x0006FFFF, 0x01, \_SB.PCI1.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0006FFFF, 0x02, \_SB.PCI1.LNKC, 0x00 }, 
-                    Package (0x04) { 0x0006FFFF, 0x03, \_SB.PCI1.LNKD, 0x00 }
-                })
-                Method (_PRT, 0, NotSerialized)
-                {
-                    If (LNot (PICF)) { Return (PICM) }
-                    Else { Return (APIC) }
-                }
-            }
-
-            Device (PG0B)
-            {
-                /*  8132 pcix bridge*/
-                Method (_ADR, 0, NotSerialized)
-                {
-                        Return (DADD(GHCD(HCIN, 0), 0x00010000))
-                }
-
-                Method (_PRW, 0, NotSerialized)
-                {
-                    If (CondRefOf (\_S3, Local0)) { Return (Package (0x02) { 0x22, 0x03 }) }
-                    Else { Return (Package (0x02) { 0x22, 0x01 }) }
-                }
-
-                Name (APIC, Package (0x04)
-                {
-                   // Slot A - PIRQ ABCD
-                    Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x1F },// Slot 1
-                    Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x20 }, 
-                    Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x21 }, 
-                    Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x22 }
-                })
-                Name (PICM, Package (0x04)
-                {
-                    Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI1.LNKA, 0x00 },//Slot 1 
-                    Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI1.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI1.LNKC, 0x00 }, 
-                    Package (0x04) { 0x0001FFFF, 0x03, \_SB.PCI1.LNKD, 0x00 }
-                })
-                Method (_PRT, 0, NotSerialized)
-                {
-                    If (LNot (PICF)) { Return (PICM) }
-                    Else { Return (APIC) }
-                }
-            }

diff --git a/src/mainboard/agami/aruma/dx/amd8131_1.asl b/src/mainboard/agami/aruma/dx/amd8131_1.asl
deleted file mode 100644 (file)
index 1545169..0000000
--- a/src/mainboard/agami/aruma/dx/amd8131_1.asl
+++ /dev/null
@@ -1,119 +0,0 @@
-/*
- * Copyright 2005 AMD
- */
-               
-            Device (PG1A)
-            {
-                /*  8132 pcix bridge*/
-                Method (_ADR, 0, NotSerialized)
-                {
-                        Return (DADD(GHCD(HCIN, 1), 0x00000000))
-                }
-
-                Method (_PRW, 0, NotSerialized)
-                {
-                    If (CondRefOf (\_S3, Local0)) { Return (Package (0x02) { 0x29, 0x03 }) }
-                    Else { Return (Package (0x02) { 0x29, 0x01 }) }
-                }
-
-                Name (APIC, Package (0x14)
-                {
-                   // Slot A - PIRQ BCDA
-                    Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x19 }, //Slot 2 
-                    Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x1A }, 
-                    Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x1B }, 
-                    Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x18 },
- 
-                   //Cypress Slot A - PIRQ BCDA
-                    Package (0x04) { 0x0003FFFF, 0x00, 0x00, 0x19 }, //?
-                    Package (0x04) { 0x0003FFFF, 0x01, 0x00, 0x1A }, 
-                    Package (0x04) { 0x0003FFFF, 0x02, 0x00, 0x1B }, 
-                    Package (0x04) { 0x0003FFFF, 0x03, 0x00, 0x18 }, 
-
-                   //Cypress Slot B - PIRQ CDAB
-                    Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x1A }, //?
-                    Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x1B }, 
-                    Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x18 }, 
-                    Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x19 }, 
-
-                   //Cypress Slot C - PIRQ DABC
-                    Package (0x04) { 0x0005FFFF, 0x00, 0x00, 0x1B }, //?
-                    Package (0x04) { 0x0005FFFF, 0x01, 0x00, 0x18 }, 
-                    Package (0x04) { 0x0005FFFF, 0x02, 0x00, 0x19 }, 
-                    Package (0x04) { 0x0005FFFF, 0x03, 0x00, 0x1A }, 
-
-                   //Cypress Slot D - PIRQ ABCD
-                    Package (0x04) { 0x0006FFFF, 0x00, 0x00, 0x18 }, //?
-                    Package (0x04) { 0x0006FFFF, 0x01, 0x00, 0x19 }, 
-                    Package (0x04) { 0x0006FFFF, 0x02, 0x00, 0x1A }, 
-                    Package (0x04) { 0x0006FFFF, 0x03, 0x00, 0x1B }
-                })
-                Name (PICM, Package (0x14)
-                {
-                    Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI1.LNKB, 0x00 },//Slot 2 
-                    Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI1.LNKC, 0x00 }, 
-                    Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI1.LNKD, 0x00 }, 
-                    Package (0x04) { 0x0001FFFF, 0x03, \_SB.PCI1.LNKA, 0x00 }, 
-
-                    Package (0x04) { 0x0003FFFF, 0x00, \_SB.PCI1.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0003FFFF, 0x01, \_SB.PCI1.LNKC, 0x00 }, 
-                    Package (0x04) { 0x0003FFFF, 0x02, \_SB.PCI1.LNKD, 0x00 }, 
-                    Package (0x04) { 0x0003FFFF, 0x03, \_SB.PCI1.LNKA, 0x00 }, 
-
-                    Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI1.LNKC, 0x00 }, 
-                    Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI1.LNKD, 0x00 }, 
-                    Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI1.LNKA, 0x00 }, 
-                    Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI1.LNKB, 0x00 }, 
-
-                    Package (0x04) { 0x0005FFFF, 0x00, \_SB.PCI1.LNKD, 0x00 }, 
-                    Package (0x04) { 0x0005FFFF, 0x01, \_SB.PCI1.LNKA, 0x00 }, 
-                    Package (0x04) { 0x0005FFFF, 0x02, \_SB.PCI1.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0005FFFF, 0x03, \_SB.PCI1.LNKC, 0x00 }, 
-
-                    Package (0x04) { 0x0006FFFF, 0x00, \_SB.PCI1.LNKA, 0x00 }, 
-                    Package (0x04) { 0x0006FFFF, 0x01, \_SB.PCI1.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0006FFFF, 0x02, \_SB.PCI1.LNKC, 0x00 }, 
-                    Package (0x04) { 0x0006FFFF, 0x03, \_SB.PCI1.LNKD, 0x00 }
-                })
-                Method (_PRT, 0, NotSerialized)
-                {
-                    If (LNot (PICF)) { Return (PICM) }
-                    Else { Return (APIC) }
-                }
-            }
-
-            Device (PG1B)
-            {
-                /*  8132 pcix bridge*/
-                Method (_ADR, 0, NotSerialized)
-                {
-                        Return (DADD(GHCD(HCIN, 1), 0x00010000))
-                }
-
-                Method (_PRW, 0, NotSerialized)
-                {
-                    If (CondRefOf (\_S3, Local0)) { Return (Package (0x02) { 0x22, 0x03 }) }
-                    Else { Return (Package (0x02) { 0x22, 0x01 }) }
-                }
-
-                Name (APIC, Package (0x04)
-                {
-                   // Slot A - PIRQ ABCD
-                    Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x1F },// Slot 1
-                    Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x20 }, 
-                    Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x21 }, 
-                    Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x22 }
-                })
-                Name (PICM, Package (0x04)
-                {
-                    Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI1.LNKA, 0x00 },//Slot 1 
-                    Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI1.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI1.LNKC, 0x00 }, 
-                    Package (0x04) { 0x0001FFFF, 0x03, \_SB.PCI1.LNKD, 0x00 }
-                })
-                Method (_PRT, 0, NotSerialized)
-                {
-                    If (LNot (PICF)) { Return (PICM) }
-                    Else { Return (APIC) }
-                }
-            }

diff --git a/src/mainboard/agami/aruma/dx/amdk8_util.asl b/src/mainboard/agami/aruma/dx/amdk8_util.asl
deleted file mode 100644 (file)
index e915547..0000000
--- a/src/mainboard/agami/aruma/dx/amdk8_util.asl
+++ /dev/null
@@ -1,315 +0,0 @@
-/*
- * Copyright 2005 AMD
- */
-
-//AMD k8 util for BUSB and res range
-
-    Scope (\_SB)
-    {
-
-        Name (OSTB, Ones)
-        Method (OSTP, 0, NotSerialized)
-        {
-            If (LEqual (^OSTB, Ones))
-            {
-                Store (0x00, ^OSTB)
-            }
-
-            Return (^OSTB)
-        }
-
-       Method (SEQL, 2, Serialized)
-        {
-            Store (SizeOf (Arg0), Local0)
-            Store (SizeOf (Arg1), Local1)
-            If (LNot (LEqual (Local0, Local1))) { Return (Zero) }
-
-            Name (BUF0, Buffer (Local0) {})
-            Store (Arg0, BUF0)
-            Name (BUF1, Buffer (Local0) {})
-            Store (Arg1, BUF1)
-            Store (Zero, Local2)
-            While (LLess (Local2, Local0))
-            {
-                Store (DerefOf (Index (BUF0, Local2)), Local3)
-                Store (DerefOf (Index (BUF1, Local2)), Local4)
-                If (LNot (LEqual (Local3, Local4))) { Return (Zero) }
-
-                Increment (Local2)
-            }
-
-            Return (One)
-        }
-
-
-        Method (DADD, 2, NotSerialized)
-        {
-                Store( Arg1, Local0)
-                Store( Arg0, Local1)
-                Add( ShiftLeft(Local1,16), Local0, Local0)
-                Return (Local0)
-        }
-
-
-       Method (GHCE, 1, NotSerialized) // check if the HC enabled
-       {
-                Store (DerefOf (Index (\_SB.PCI0.HCLK, Arg0)), Local1)
-                if(LEqual ( And(Local1, 0x01), 0x01)) { Return (0x0F) }
-                Else { Return (0x00) }
-       }
-
-        Method (GHCN, 1, NotSerialized) // get the node num for the HC
-        {
-                Store (0x00, Local0)
-                Store (DerefOf (Index (\_SB.PCI0.HCLK, Arg0)), Local1)
-               Store (ShiftRight( And (Local1, 0xf0), 0x04), Local0)
-               Return (Local0)
-        }
-
-        Method (GHCL, 1, NotSerialized) // get the link num on node for the HC
-        {
-                Store (0x00, Local0)
-                Store (DerefOf (Index (\_SB.PCI0.HCLK, Arg0)), Local1)
-                Store (ShiftRight( And (Local1, 0xf00), 0x08), Local0)
-                Return (Local0)
-        }
-
-        Method (GHCD, 2, NotSerialized) // get the unit id base for the HT device in HC
-        {
-                Store (0x00, Local0)
-                Store (DerefOf (Index (\_SB.PCI0.HCDN, Arg0)), Local1)
-               Store (Arg1, Local2) // Arg1 could be 3, 2, 1, 0
-               Multiply (Local2, 0x08, Local2) // change to 24, 16, 8, 0
-                Store (And (ShiftRight( Local1, Local2), 0xff), Local0)
-                Return (Local0)
-        }
-
-        Method (GBUS, 2, NotSerialized)
-        {
-            Store (0x00, Local0)
-            While (LLess (Local0, 0x04))
-            {
-                Store (DerefOf (Index (\_SB.PCI0.BUSN, Local0)), Local1)
-                If (LEqual (And (Local1, 0x03), 0x03))
-                {
-                    If (LEqual (Arg0, ShiftRight (And (Local1, 0x70), 0x04)))
-                    {
-                        If (LOr (LEqual (Arg1, 0xFF), LEqual (Arg1, ShiftRight (And (Local1, 0x0300), 0x08))))
-                        {
-                            Return (ShiftRight (And (Local1, 0x00FF0000), 0x10))
-                        }
-                    }
-                }
-
-                Increment (Local0)
-            }
-
-            Return (0x00)
-        }
-
-        Method (GWBN, 2, NotSerialized)
-        {
-            Name (BUF0, ResourceTemplate ()
-            {
-                WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
-                    0x0000, // Address Space Granularity
-                    0x0000, // Address Range Minimum
-                    0x0000, // Address Range Maximum
-                    0x0000, // Address Translation Offset
-                    0x0000,,,)
-            })
-            CreateWordField (BUF0, 0x08, BMIN)
-            CreateWordField (BUF0, 0x0A, BMAX)
-            CreateWordField (BUF0, 0x0E, BLEN)
-            Store (0x00, Local0)
-            While (LLess (Local0, 0x04))
-            {
-                Store (DerefOf (Index (\_SB.PCI0.BUSN, Local0)), Local1)
-                If (LEqual (And (Local1, 0x03), 0x03))
-                {
-                    If (LEqual (Arg0, ShiftRight (And (Local1, 0x70), 0x04)))
-                    {
-                        If (LOr (LEqual (Arg1, 0xFF), LEqual (Arg1, ShiftRight (And (Local1, 0x0300), 0x08))))
-                        {
-                            Store (ShiftRight (And (Local1, 0x00FF0000), 0x10), BMIN)
-                            Store (ShiftRight (Local1, 0x18), BMAX)
-                            Subtract (BMAX, BMIN, BLEN)
-                            Increment (BLEN)
-                            Return (RTAG (BUF0))
-                        }
-                    }
-                }
-
-                Increment (Local0)
-            }
-
-            Return (RTAG (BUF0))
-        }
-
-        Method (GMEM, 2, NotSerialized)
-        {
-            Name (BUF0, ResourceTemplate ()
-            {
-                DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,
-                    0x00000000, // Address Space Granularity
-                    0x00000000, // Address Range Minimum
-                    0x00000000, // Address Range Maximum
-                    0x00000000, // Address Translation Offset
-                    0x00000000,,,
-                    , AddressRangeMemory, TypeStatic)
-            })
-            CreateDWordField (BUF0, 0x0A, MMIN)
-            CreateDWordField (BUF0, 0x0E, MMAX)
-            CreateDWordField (BUF0, 0x16, MLEN)
-            Store (0x00, Local0)
-            Store (0x00, Local4)
-           Store (0x00, Local3)
-            While (LLess (Local0, 0x10))
-            {
-                Store (DerefOf (Index (\_SB.PCI0.MMIO, Local0)), Local1)
-                Increment (Local0)
-                Store (DerefOf (Index (\_SB.PCI0.MMIO, Local0)), Local2)
-                If (LEqual (And (Local1, 0x03), 0x03))
-                {
-                    If (LEqual (Arg0, And (Local2, 0x07)))
-                    {
-                        If (LOr (LEqual (Arg1, 0xFF), LEqual (Arg1, ShiftRight (And (Local2, 0x30), 0x04))))
-                        {
-                            Store (ShiftLeft (And (Local1, 0xFFFFFF00), 0x08), MMIN)
-                            Store (ShiftLeft (And (Local2, 0xFFFFFF00), 0x08), MMAX)
-                            Or (MMAX, 0xFFFF, MMAX)
-                            Subtract (MMAX, MMIN, MLEN)
-
-                            If (Local4)
-                            {
-                                Concatenate (RTAG (BUF0), Local3, Local5)
-                                       Store (Local5, Local3)
-                            }
-                            Else
-                            {
-                                If (LOr (LAnd (LEqual (Arg1, 0xFF), LEqual (Arg0, 0x00)), LEqual (Arg1, \_SB.PCI0.SBLK)))
-                                {
-                                    Store (\_SB.PCI0.TOM1, MMIN)
-                                    Subtract (MMAX, MMIN, MLEN)
-                                    Increment (MLEN)
-                                }
-
-                                Store (RTAG (BUF0), Local3)
-                            }
-
-                            Increment (Local4)
-                        }
-                    }
-                }
-
-                Increment (Local0)
-            }
-
-            If (LNot (Local4))
-            {
-                Store (BUF0, Local3)
-            }
-
-            Return (Local3)
-        }
-
-        Method (GIOR, 2, NotSerialized)
-        {
-            Name (BUF0, ResourceTemplate ()
-            {
-                DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
-                    0x00000000, // Address Space Granularity
-                    0x00000000, // Address Range Minimum
-                    0x00000000, // Address Range Maximum
-                    0x00000000, // Address Translation Offset
-                    0x00000000,,,
-                    , TypeStatic)
-            })
-            CreateDWordField (BUF0, 0x0A, PMIN)
-            CreateDWordField (BUF0, 0x0E, PMAX)
-            CreateDWordField (BUF0, 0x16, PLEN)
-            Store (0x00, Local0)
-            Store (0x00, Local4)
-           Store (0x00, Local3)
-            While (LLess (Local0, 0x08))
-            {
-                Store (DerefOf (Index (\_SB.PCI0.PCIO, Local0)), Local1)
-                Increment (Local0)
-                Store (DerefOf (Index (\_SB.PCI0.PCIO, Local0)), Local2)
-                If (LEqual (And (Local1, 0x03), 0x03))
-                {
-                    If (LEqual (Arg0, And (Local2, 0x07)))
-                    {
-                        If (LOr (LEqual (Arg1, 0xFF), LEqual (Arg1, ShiftRight (And (Local2, 0x30), 0x04))))
-                        {
-                            Store (And (Local1, 0x01FFF000), PMIN)
-                            Store (And (Local2, 0x01FFF000), PMAX)
-                            Or (PMAX, 0x0FFF, PMAX)
-                            Subtract (PMAX, PMIN, PLEN)
-                            Increment (PLEN)
-
-                            If (Local4)
-                            {
-                                Concatenate (RTAG (BUF0), Local3, Local5)
-                                       Store (Local5, Local3)
-                            }
-                            Else
-                            {
-                                If (LGreater (PMAX, PMIN))
-                                {
-                                    If (LOr (LAnd (LEqual (Arg1, 0xFF), LEqual (Arg0, 0x00)), LEqual (Arg1, \_SB.PCI0.SBLK)))
-                                    {
-                                        Store (0x0D00, PMIN)
-                                        Subtract (PMAX, PMIN, PLEN)
-                                        Increment (PLEN)
-                                    }
-
-                                    Store (RTAG (BUF0), Local3)
-                                    Increment (Local4)
-                                }
-
-                                If (And (Local1, 0x10))
-                                {
-                                    Store (0x03B0, PMIN)
-                                    Store (0x03DF, PMAX)
-                                    Store (0x30, PLEN)
-                                    If (Local4)
-                                    {
-                                        Concatenate (RTAG (BUF0), Local3, Local5)
-                                        Store (Local5, Local3)
-                                    }
-                                    Else
-                                    {
-                                        Store (RTAG (BUF0), Local3)
-                                    }
-                                }
-                            }
-
-                            Increment (Local4)
-                        }
-                    }
-                }
-
-                Increment (Local0)
-            }
-
-            If (LNot (Local4))
-            {
-                Store (RTAG (BUF0), Local3)
-            }
-
-            Return (Local3)
-        }
-
-        Method (RTAG, 1, NotSerialized)
-        {
-            Store (Arg0, Local0)
-            Store (SizeOf (Local0), Local1)
-            Subtract (Local1, 0x02, Local1)
-            Multiply (Local1, 0x08, Local1)
-            CreateField (Local0, 0x00, Local1, RETB)
-            Store (RETB, Local2)
-            Return (Local2)
-        }
-    }
-

diff --git a/src/mainboard/agami/aruma/dx/dsdt_lb.dsl b/src/mainboard/agami/aruma/dx/dsdt_lb.dsl
deleted file mode 100644 (file)
index dee2cbb..0000000
--- a/src/mainboard/agami/aruma/dx/dsdt_lb.dsl
+++ /dev/null
@@ -1,235 +0,0 @@
-/*
- * Copyright 2005 AMD
- */
-DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-K8", "AMDACPI", 100925440)
-{
-    Scope (_PR)
-    {
-        Processor (CPU0, 0x00, 0x0000C010, 0x06) {}
-        Processor (CPU1, 0x01, 0x00000000, 0x00) {}
-        Processor (CPU2, 0x02, 0x00000000, 0x00) {}
-        Processor (CPU3, 0x03, 0x00000000, 0x00) {}
-
-    }
-
-    Method (FWSO, 0, NotSerialized) { }
-
-    Name (_S0, Package (0x04) { 0x00, 0x00, 0x00, 0x00 })
-    Name (_S1, Package (0x04) { 0x01, 0x01, 0x01, 0x01 })
-    Name (_S3, Package (0x04) { 0x05, 0x05, 0x05, 0x05 })
-    Name (_S5, Package (0x04) { 0x07, 0x07, 0x07, 0x07 })
-
-    Scope (_SB)
-    {
-        Device (PCI0)
-        {
-           /* BUS0 root bus */
-
-/*
-//hardcode begin
-            Name (BUSN, Package (0x04) { 0x04010003, 0x06050013, 0x00000000, 0x00000000 })
-            Name (MMIO, Package (0x10) { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
-                                         0x00f43003, 0x00f44f01, 0x0000d003, 0x00efff01, 0x00f40003, 0x00f42f00, 0x00f45003, 0x00f44f00 })
-            Name (PCIO, Package (0x08) { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00001003, 0x00001000, 0x00002003, 0x00002001 })
-            Name (SBLK, 0x00)
-            Name (TOM1, 0x40000000)
-
-           // for AMD opteron we could have four chains, so we will have PCI1, PCI2, PCI3, PCI4
-           // PCI1 must be SBLK Chain
-           // If you have HT IO card that is connected to PCI2, PCI3, PCI4, then you man put Device in SSDT2, SSDT3, SSDT4,  
-           //    in acpi_tables.c you can link those SSDT to RSDT according to it's presence.
-           // Otherwise put the PCI2, PCI3, PCI4 in this dsdt
-           Name (HCLK, Package (0x04) { 0x00000001, 0x00000011, 0x00000000, 0x00000000 }) //[0,3]=1 enable [4,7]=node_id, [8,15]=linkn
-
-           Name (SBDN, 3)  // 8111 UnitID Base
-//hardcode end
-*/
-           External (BUSN)
-           External (MMIO)
-           External (PCIO)
-           External (SBLK)
-           External (TOM1)
-           External (HCLK)
-           External (SBDN)
-           External (HCDN)
-
-            Name (_HID, EisaId ("PNP0A03"))
-            Name (_ADR, 0x00180000)
-            Name (_UID, 0x01)
-           Name (_BBN, 0)
-
-
-           // define L1IC Link1 on node0 init completed, so node1 is installed
-           // We must make sure our bus is 0 ? 
-            OperationRegion (LDT1, PCI_Config, 0xA4, 0x01)
-            Field (LDT1, ByteAcc, Lock, Preserve)
-            {
-                    ,   5,
-                L1IC,   1
-            }
-
-       }
-       
-       Device (PCI1)
-       {
-           Name (HCIN, 0x00)  // HC1
-           // BUS 1 first HT Chain
-            Name (_HID, EisaId ("PNP0A03"))
-            Name (_ADR, 0x00180000)  // Fake 
-            Name (_UID, 0x02)
-            Method (_BBN, 0, NotSerialized)
-            {
-                Return (GBUS (0x00, \_SB.PCI0.SBLK))
-            }
-
-            Method (_CRS, 0, NotSerialized)
-            {
-                Name (BUF0, ResourceTemplate ()
-                {
-                    IO (Decode16, 0x0CF8, 0x0CF8, 0x01, 0x08) //CF8-CFFh
-                    IO (Decode16, 0xC000, 0xC000, 0x01, 0x80) //8000h
-                    IO (Decode16, 0xC080, 0xC080, 0x01, 0x80) //8080h
-
-                    WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
-                        0x0000, // Address Space Granularity
-                        0x8100, // Address Range Minimum
-                        0xFFFF, // Address Range Maximum
-                        0x0000, // Address Translation Offset
-                        0x7F00,,,
-                        , TypeStatic)    //8100h-FFFFh
-
-                    DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
-                        0x00000000, // Address Space Granularity
-                        0x000C0000, // Address Range Minimum
-                        0x00000000, // Address Range Maximum
-                        0x00000000, // Address Translation Offset
-                        0x00000000,,,
-                        , AddressRangeMemory, TypeStatic)   //Video BIOS A0000h-C7FFFh
-
-                    Memory32Fixed (ReadWrite, 0x000D8000, 0x00004000)//USB HC D8000-DBFFF
-
-                    WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
-                        0x0000, // Address Space Granularity
-                        0x0000, // Address Range Minimum
-                        0x03AF, // Address Range Maximum
-                        0x0000, // Address Translation Offset
-                        0x03B0,,,
-                        , TypeStatic)  //0-CF7h
-
-                    WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
-                        0x0000, // Address Space Granularity
-                        0x03E0, // Address Range Minimum
-                        0x0CF7, // Address Range Maximum
-                        0x0000, // Address Translation Offset
-                        0x0918,,,
-                        , TypeStatic)  //0-CF7h
-                })
-                \_SB.OSTP ()
-                CreateDWordField (BUF0, 0x3E, VLEN)
-                CreateDWordField (BUF0, 0x36, VMAX)
-                CreateDWordField (BUF0, 0x32, VMIN)
-                ShiftLeft (VGA1, 0x09, Local0)
-                Add (VMIN, Local0, VMAX)
-                Decrement (VMAX)
-                Store (Local0, VLEN)
-                Concatenate (\_SB.GMEM (0x00, \_SB.PCI0.SBLK), BUF0, Local1)
-                Concatenate (\_SB.GIOR (0x00, \_SB.PCI0.SBLK), Local1, Local2)
-                Concatenate (\_SB.GWBN (0x00, \_SB.PCI0.SBLK), Local2, Local3)
-                Return (Local3) 
-           }
-
-           Include ("pci1_hc.asl")
-               
-        }
-
-    }
-
-    Scope (_GPE)
-    {
-        Method (_L08, 0, NotSerialized)
-        {
-            Notify (\_SB.PCI1, 0x02) //PME# Wakeup
-        }
-
-        Method (_L0F, 0, NotSerialized)
-        {
-            Notify (\_SB.PCI1.TP2P.USB0, 0x02)  //USB Wakeup
-        }
-
-        Method (_L22, 0, NotSerialized) // GPIO18 (LID) - Pogo 0 Bridge B
-        {
-            Notify (\_SB.PCI1.PG0B, 0x02)
-        }
-
-        Method (_L29, 0, NotSerialized) // GPIO25 (Suspend) - Pogo 0 Bridge A 
-        {
-            Notify (\_SB.PCI1.PG0A, 0x02)
-        }
-    }
-
-    Method (_PTS, 1, NotSerialized)
-    {
-        Or (Arg0, 0xF0, Local0)
-        Store (Local0, DBG1)
-    }
-/*
-    Method (_WAK, 1, NotSerialized)
-    {
-        Or (Arg0, 0xE0, Local0)
-        Store (Local0, DBG1)
-    }
-*/
-    Name (PICF, 0x00) //Flag Variable for PIC vs. I/O APIC Mode
-    Method (_PIC, 1, NotSerialized) //PIC Flag and Interface Method
-    {
-        Store (Arg0, PICF)
-    }
-
-    OperationRegion (DEBG, SystemIO, 0x80, 0x01)
-    Field (DEBG, ByteAcc, Lock, Preserve)
-    {
-        DBG1,   8
-    }
-
-    OperationRegion (EXTM, SystemMemory, 0x000FF83C, 0x04)
-    Field (EXTM, WordAcc, Lock, Preserve)
-    {
-        AMEM,   32
-    }
-
-    OperationRegion (VGAM, SystemMemory, 0x000C0002, 0x01)
-    Field (VGAM, ByteAcc, Lock, Preserve)
-    {
-        VGA1,   8
-    }
-
-    OperationRegion (GRAM, SystemMemory, 0x0400, 0x0100)
-    Field (GRAM, ByteAcc, Lock, Preserve)
-    {
-        Offset (0x10), 
-        FLG0,   8
-    }
-
-    OperationRegion (GSTS, SystemIO, 0xC028, 0x02)
-    Field (GSTS, ByteAcc, NoLock, Preserve)
-    {
-            ,   4, 
-        IRQR,   1
-    }
-
-    OperationRegion (Z007, SystemIO, 0x21, 0x01)
-    Field (Z007, ByteAcc, NoLock, Preserve)
-    {
-        Z008,   8
-    }
-
-    OperationRegion (Z009, SystemIO, 0xA1, 0x01)
-    Field (Z009, ByteAcc, NoLock, Preserve)
-    {
-        Z00A,   8
-    }
-
-    Include ("amdk8_util.asl")
-
-}
-

diff --git a/src/mainboard/agami/aruma/dx/pci1_hc.asl b/src/mainboard/agami/aruma/dx/pci1_hc.asl
deleted file mode 100644 (file)
index b1e9562..0000000
--- a/src/mainboard/agami/aruma/dx/pci1_hc.asl
+++ /dev/null
@@ -1,2 +0,0 @@
-       Include ("amd8111.asl") //real SB at first
-       Include ("amd8131.asl")

diff --git a/src/mainboard/agami/aruma/dx/pci2.asl b/src/mainboard/agami/aruma/dx/pci2.asl
deleted file mode 100644 (file)
index 7adb5a5..0000000
--- a/src/mainboard/agami/aruma/dx/pci2.asl
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * Copyright 2005 AMD
- */
-DefinitionBlock ("SSDT2.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440)
-{
-    Scope (_SB)
-    {
-       External (DADD, MethodObj)
-       External (GHCE, MethodObj)
-       External (GHCN, MethodObj)
-       External (GHCL, MethodObj)
-       External (GHCD, MethodObj)
-       External (GNUS, MethodObj)
-       External (GIOR, MethodObj)
-       External (GMEM, MethodObj)
-       External (GWBN, MethodObj)
-       External (GBUS, MethodObj)
-
-       External (PICF)
-
-       External (\_SB.PCI1.LNKA, DeviceObj)
-       External (\_SB.PCI1.LNKB, DeviceObj)
-       External (\_SB.PCI1.LNKC, DeviceObj)
-       External (\_SB.PCI1.LNKD, DeviceObj)
-       
-
-        Device (PCI2)
-        {
-
-           // BUS ? Second HT Chain
-           Name (HCIN, 0x01)  // HC2
-
-           Name (_HID, "PNP0A03") 
-
-            Method (_ADR, 0, NotSerialized) //Fake bus should be 0
-           {
-               Return (DADD(GHCN(HCIN), 0x00180000))
-           }
-       
-            Name (_UID,  0x03) 
-
-            Method (_BBN, 0, NotSerialized)
-            {
-                Return (GBUS (GHCN(HCIN), GHCL(HCIN)))
-            }
-
-            Method (_STA, 0, NotSerialized)
-            {
-                Return (\_SB.GHCE(HCIN)) 
-            }
-
-            Method (_CRS, 0, NotSerialized)
-            {
-                Name (BUF0, ResourceTemplate () { })
-               Store( GHCN(HCIN), Local4)
-               Store( GHCL(HCIN), Local5)
-
-                Concatenate (\_SB.GIOR (Local4, Local5), BUF0, Local1)
-                Concatenate (\_SB.GMEM (Local4, Local5), Local1, Local2)
-                Concatenate (\_SB.GWBN (Local4, Local5), Local2, Local3)
-                Return (Local3)
-            }
-
-           Include ("pci2_hc.asl")
-        }
-    }
-
-}
-

diff --git a/src/mainboard/agami/aruma/dx/pci2_hc.asl b/src/mainboard/agami/aruma/dx/pci2_hc.asl
deleted file mode 100644 (file)
index 3f652e7..0000000
--- a/src/mainboard/agami/aruma/dx/pci2_hc.asl
+++ /dev/null
@@ -1,3 +0,0 @@
-       Include ("amd8131.asl")
-
-       Include ("amd8131_1.asl")

diff --git a/src/mainboard/agami/aruma/dx/pci3.asl b/src/mainboard/agami/aruma/dx/pci3.asl
deleted file mode 100644 (file)
index 4b62a8a..0000000
--- a/src/mainboard/agami/aruma/dx/pci3.asl
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * Copyright 2005 AMD
- */
-DefinitionBlock ("SSDT3.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440)
-{
-    Scope (_SB)
-    {
-       External (DADD, MethodObj)
-       External (GHCE, MethodObj)
-       External (GHCN, MethodObj)
-       External (GHCL, MethodObj)
-       External (GHCD, MethodObj)
-       External (GNUS, MethodObj)
-       External (GIOR, MethodObj)
-       External (GMEM, MethodObj)
-       External (GWBN, MethodObj)
-       External (GBUS, MethodObj)
-
-       External (PICF)
-
-       External (\_SB.PCI1.LNKA, DeviceObj)
-       External (\_SB.PCI1.LNKB, DeviceObj)
-       External (\_SB.PCI1.LNKC, DeviceObj)
-       External (\_SB.PCI1.LNKD, DeviceObj)
-       
-
-        Device (PCI3)
-        {
-
-           // BUS ? Second HT Chain
-           Name (HCIN, 0x02)  // HC3
-
-           Name (_HID, "PNP0A03") 
-
-            Method (_ADR, 0, NotSerialized) //Fake bus should be 0
-           {
-               Return (DADD(GHCN(HCIN), 0x00180000))
-           }
-       
-            Name (_UID,  0x04) 
-
-            Method (_BBN, 0, NotSerialized)
-            {
-                Return (GBUS (GHCN(HCIN), GHCL(HCIN)))
-            }
-
-            Method (_STA, 0, NotSerialized)
-            {
-                Return (\_SB.GHCE(HCIN)) 
-            }
-
-            Method (_CRS, 0, NotSerialized)
-            {
-                Name (BUF0, ResourceTemplate () { })
-               Store( GHCN(HCIN), Local4)
-               Store( GHCL(HCIN), Local5)
-
-                Concatenate (\_SB.GIOR (Local4, Local5), BUF0, Local1)
-                Concatenate (\_SB.GMEM (Local4, Local5), Local1, Local2)
-                Concatenate (\_SB.GWBN (Local4, Local5), Local2, Local3)
-                Return (Local3)
-            }
-
-           Include ("pci2_hc.asl")
-        }
-    }
-
-}
-

diff --git a/src/mainboard/agami/aruma/dx/pci4.asl b/src/mainboard/agami/aruma/dx/pci4.asl
deleted file mode 100644 (file)
index ae07004..0000000
--- a/src/mainboard/agami/aruma/dx/pci4.asl
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * Copyright 2005 AMD
- */
-DefinitionBlock ("SSDT4.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440)
-{
-    Scope (_SB)
-    {
-       External (DADD, MethodObj)
-       External (GHCE, MethodObj)
-       External (GHCN, MethodObj)
-       External (GHCL, MethodObj)
-       External (GHCD, MethodObj)
-       External (GNUS, MethodObj)
-       External (GIOR, MethodObj)
-       External (GMEM, MethodObj)
-       External (GWBN, MethodObj)
-       External (GBUS, MethodObj)
-
-       External (PICF)
-
-       External (\_SB.PCI1.LNKA, DeviceObj)
-       External (\_SB.PCI1.LNKB, DeviceObj)
-       External (\_SB.PCI1.LNKC, DeviceObj)
-       External (\_SB.PCI1.LNKD, DeviceObj)
-       
-
-        Device (PCI4)
-        {
-
-           // BUS ? Second HT Chain
-           Name (HCIN, 0x03)  // HC4
-
-           Name (_HID, "PNP0A03") 
-
-            Method (_ADR, 0, NotSerialized) //Fake bus should be 0
-           {
-               Return (DADD(GHCN(HCIN), 0x00180000))
-           }
-       
-            Name (_UID,  0x05) 
-
-            Method (_BBN, 0, NotSerialized)
-            {
-                Return (GBUS (GHCN(HCIN), GHCL(HCIN)))
-            }
-
-            Method (_STA, 0, NotSerialized)
-            {
-                Return (\_SB.GHCE(HCIN)) 
-            }
-
-            Method (_CRS, 0, NotSerialized)
-            {
-                Name (BUF0, ResourceTemplate () { })
-               Store( GHCN(HCIN), Local4)
-               Store( GHCL(HCIN), Local5)
-
-                Concatenate (\_SB.GIOR (Local4, Local5), BUF0, Local1)
-                Concatenate (\_SB.GMEM (Local4, Local5), Local1, Local2)
-                Concatenate (\_SB.GWBN (Local4, Local5), Local2, Local3)
-                Return (Local3)
-            }
-
-           Include ("pci2_hc.asl")
-        }
-    }
-
-}
-

diff --git a/src/mainboard/agami/aruma/dx/superio.asl b/src/mainboard/agami/aruma/dx/superio.asl
deleted file mode 100644 (file)
index 86a10a9..0000000
--- a/src/mainboard/agami/aruma/dx/superio.asl
+++ /dev/null
@@ -1 +0,0 @@
-//     Include ("w83627hf.asl")

diff --git a/src/mainboard/agami/aruma/fadt.c b/src/mainboard/agami/aruma/fadt.c
deleted file mode 100644 (file)
index 55f00db..0000000
--- a/src/mainboard/agami/aruma/fadt.c
+++ /dev/null
@@ -1,151 +0,0 @@
-/*
- * ACPI - create the Fixed ACPI Description Tables (FADT)
- * (C) Copyright 2005 Stefan Reinauer <stepan@openbios.org>
- */
-
-#include <string.h>
-#include <console/console.h>
-#include <arch/acpi.h>
-
-extern unsigned pm_base;       /* pm_base should be set in sb acpi */
-
-void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
-{
-
-       acpi_header_t *header = &(fadt->header);
-
-       printk_debug("pm_base: 0x%04x\n", pm_base);
-
-       /* Prepare the header */
-       memset((void *) fadt, 0, sizeof(acpi_fadt_t));
-       memcpy(header->signature, "FACP", 4);
-       header->length = 244;
-       header->revision = 1;
-       memcpy(header->oem_id, OEM_ID, 6);
-       memcpy(header->oem_table_id, "COREBOOT", 8);
-       memcpy(header->asl_compiler_id, ASLC, 4);
-       header->asl_compiler_revision = 0;
-
-       fadt->firmware_ctrl = (u32) facs;
-       fadt->dsdt = (u32) dsdt;
-
-       // 3=Workstation,4=Enterprise Server, 7=Performance Server
-       fadt->preferred_pm_profile = 0x03;
-       fadt->sci_int = 9;
-       // disable system management mode by setting to 0: 
-       fadt->smi_cmd = 0;      //pm_base+0x2f;
-       fadt->acpi_enable = 0xf0;
-       fadt->acpi_disable = 0xf1;
-       fadt->s4bios_req = 0x0;
-       fadt->pstate_cnt = 0xe2;
-
-       fadt->pm1a_evt_blk = pm_base;
-       fadt->pm1b_evt_blk = 0x0000;
-       fadt->pm1a_cnt_blk = pm_base + 0x04;
-       fadt->pm1b_cnt_blk = 0x0000;
-       fadt->pm2_cnt_blk = 0x0000;
-       fadt->pm_tmr_blk = pm_base + 0x08;
-       fadt->gpe0_blk = pm_base + 0x20;
-       fadt->gpe1_blk = pm_base + 0xb0;
-
-       fadt->pm1_evt_len = 4;
-       fadt->pm1_cnt_len = 2;
-       fadt->pm2_cnt_len = 0;
-       fadt->pm_tmr_len = 4;
-       fadt->gpe0_blk_len = 4;
-       fadt->gpe1_blk_len = 8;
-       fadt->gpe1_base = 16;
-
-       fadt->cst_cnt = 0xe3;
-       fadt->p_lvl2_lat = 101;
-       fadt->p_lvl3_lat = 1001;
-       fadt->flush_size = 0;
-       fadt->flush_stride = 0;
-       fadt->duty_offset = 1;
-       fadt->duty_width = 3;
-       fadt->day_alrm = 0;     // 0x7d these have to be
-       fadt->mon_alrm = 0;     // 0x7e added to cmos.layout
-       fadt->century = 0;      // 0x7f to make rtc alrm work
-       fadt->iapc_boot_arch = 0x3;     // See table 5-11
-       fadt->flags = 0x25;
-
-       fadt->res2 = 0;
-
-       fadt->reset_reg.space_id = 1;
-       fadt->reset_reg.bit_width = 8;
-       fadt->reset_reg.bit_offset = 0;
-       fadt->reset_reg.resv = 0;
-       fadt->reset_reg.addrl = 0xcf9;
-       fadt->reset_reg.addrh = 0x0;
-
-       fadt->reset_value = 6;
-       fadt->x_firmware_ctl_l = (u32) facs;
-       fadt->x_firmware_ctl_h = 0;
-       fadt->x_dsdt_l = (u32) dsdt;
-       fadt->x_dsdt_h = 0;
-
-       fadt->x_pm1a_evt_blk.space_id = 1;
-       fadt->x_pm1a_evt_blk.bit_width = 32;
-       fadt->x_pm1a_evt_blk.bit_offset = 0;
-       fadt->x_pm1a_evt_blk.resv = 0;
-       fadt->x_pm1a_evt_blk.addrl = pm_base;
-       fadt->x_pm1a_evt_blk.addrh = 0x0;
-
-       fadt->x_pm1b_evt_blk.space_id = 1;
-       fadt->x_pm1b_evt_blk.bit_width = 4;
-       fadt->x_pm1b_evt_blk.bit_offset = 0;
-       fadt->x_pm1b_evt_blk.resv = 0;
-       fadt->x_pm1b_evt_blk.addrl = 0x0;
-       fadt->x_pm1b_evt_blk.addrh = 0x0;
-
-
-       fadt->x_pm1a_cnt_blk.space_id = 1;
-       fadt->x_pm1a_cnt_blk.bit_width = 16;
-       fadt->x_pm1a_cnt_blk.bit_offset = 0;
-       fadt->x_pm1a_cnt_blk.resv = 0;
-       fadt->x_pm1a_cnt_blk.addrl = pm_base + 4;
-       fadt->x_pm1a_cnt_blk.addrh = 0x0;
-
-       fadt->x_pm1b_cnt_blk.space_id = 1;
-       fadt->x_pm1b_cnt_blk.bit_width = 2;
-       fadt->x_pm1b_cnt_blk.bit_offset = 0;
-       fadt->x_pm1b_cnt_blk.resv = 0;
-       fadt->x_pm1b_cnt_blk.addrl = 0x0;
-       fadt->x_pm1b_cnt_blk.addrh = 0x0;
-
-
-       fadt->x_pm2_cnt_blk.space_id = 1;
-       fadt->x_pm2_cnt_blk.bit_width = 0;
-       fadt->x_pm2_cnt_blk.bit_offset = 0;
-       fadt->x_pm2_cnt_blk.resv = 0;
-       fadt->x_pm2_cnt_blk.addrl = 0x0;
-       fadt->x_pm2_cnt_blk.addrh = 0x0;
-
-
-       fadt->x_pm_tmr_blk.space_id = 1;
-       fadt->x_pm_tmr_blk.bit_width = 32;
-       fadt->x_pm_tmr_blk.bit_offset = 0;
-       fadt->x_pm_tmr_blk.resv = 0;
-       fadt->x_pm_tmr_blk.addrl = pm_base + 0x08;
-       fadt->x_pm_tmr_blk.addrh = 0x0;
-
-
-       fadt->x_gpe0_blk.space_id = 1;
-       fadt->x_gpe0_blk.bit_width = 32;
-       fadt->x_gpe0_blk.bit_offset = 0;
-       fadt->x_gpe0_blk.resv = 0;
-       fadt->x_gpe0_blk.addrl = pm_base + 0x20;
-       fadt->x_gpe0_blk.addrh = 0x0;
-
-
-       fadt->x_gpe1_blk.space_id = 1;
-       fadt->x_gpe1_blk.bit_width = 64;
-       fadt->x_gpe1_blk.bit_offset = 16;
-       fadt->x_gpe1_blk.resv = 0;
-       fadt->x_gpe1_blk.addrl = pm_base + 0xb0;
-       fadt->x_gpe1_blk.addrh = 0x0;
-
-       header->checksum =
-           acpi_checksum((void *) fadt, sizeof(acpi_fadt_t));
-
-}

diff --git a/src/mainboard/agami/aruma/failover.c b/src/mainboard/agami/aruma/failover.c
deleted file mode 100644 (file)
index 16a5c9a..0000000
--- a/src/mainboard/agami/aruma/failover.c
+++ /dev/null
@@ -1,66 +0,0 @@
-#define ASSEMBLY 1
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#include <arch/io.h>
-#include <arch/romcc_io.h>
-#include <cpu/x86/lapic.h>
-#include "pc80/mc146818rtc_early.c"
-#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
-#include "northbridge/amd/amdk8/early_ht.c"
-#include "cpu/x86/lapic/boot_cpu.c"
-#include "cpu/x86/mtrr/earlymtrr.c"
-#include "northbridge/amd/amdk8/reset_test.c"
-
-static unsigned long main(unsigned long bist)
-{
-       unsigned nodeid;
-       /* Make cerain my local apic is useable */
-       enable_lapic();
-
-       nodeid=lapicid();
-       /* Is this a cpu only reset? */
-       if (early_mtrr_init_detected()) {
-               if (last_boot_normal()) {
-                       goto normal_image;
-               } else {
-                       goto fallback_image;
-               }
-       }
-       /* Is this a secondary cpu? */
-       if (!boot_cpu()) {
-               if (last_boot_normal()) {
-                       goto normal_image;
-               } else {
-                       goto fallback_image;
-               }
-       }
-       
-
-       /* Nothing special needs to be done to find bus 0 */
-       /* Allow the HT devices to be found */
-       enumerate_ht_chain();
-       
-       /* Setup the 8111 */
-       amd8111_enable_rom();
-
-       /* Is this a deliberate reset by the bios */
-       if (bios_reset_detected() && last_boot_normal()) {
-               goto normal_image;
-       }
-       /* This is the primary cpu how should I boot? */
-       else if (do_normal_boot()) {
-               goto normal_image;
-       }
-       else {
-               goto fallback_image;
-       }
- normal_image:
-       asm volatile ("jmp __normal_image" 
-               : /* outputs */ 
-               : "a" (bist) /* inputs */
-               : /* clobbers */
-               );
- fallback_image:
-       return bist;
-}

diff --git a/src/mainboard/agami/aruma/get_bus_conf.c b/src/mainboard/agami/aruma/get_bus_conf.c
deleted file mode 100644 (file)
index b224aa8..0000000
--- a/src/mainboard/agami/aruma/get_bus_conf.c
+++ /dev/null
@@ -1,164 +0,0 @@
-#include <console/console.h>
-#include <device/pci.h>
-#include <device/pci_ids.h>
-#include <string.h>
-#include <stdint.h>
-#include <stdlib.h>
-#if CONFIG_LOGICAL_CPUS==1
-#include <cpu/amd/dualcore.h>
-#endif
-
-
-// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
-//busnum is default
-unsigned char bus_isa = 7;
-unsigned char bus_8111_0 = 1;
-unsigned char bus_8111_1 = 4;
-unsigned char bus_8131[7][3];  // another 6 8131
-unsigned apicid_8111;
-unsigned apicid_8131[7][2];
-
-unsigned sblk;
-unsigned pci1234[] = {         //Here you only need to set value in pci1234 for HT-IO that could be installed or not
-       //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
-       0x0000ff0,
-       0x0000f10,
-       0x0000f20,
-       0x0000f30,
-//        0x0000ff0,
-//        0x0000ff0,
-//        0x0000ff0,
-//        0x0000ff0
-};
-unsigned hc_possible_num;
-unsigned sbdn;
-unsigned hcdn[] = {            //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
-       0x20202020,
-       0x20202020,
-       0x20202020,
-       0x20202020,
-//        0x20202020,
-//        0x20202020,
-//        0x20202020,
-//        0x20202020,
-};
-
-unsigned sbdnx[7];             // for all 8131
-
-extern void get_sblk_pci1234(void);
-
-static unsigned get_bus_conf_done = 0;
-
-void get_bus_conf(void)
-{
-
-       unsigned apicid_base;
-
-       device_t dev;
-
-       int i;
-
-       if (get_bus_conf_done == 1)
-               return;         //do it only once
-
-       get_bus_conf_done = 1;
-
-       hc_possible_num = ARRAY_SIZE(pci1234);
-
-       get_sblk_pci1234();
-
-
-       sbdn = ((hcdn[0] >> 8) & 0xff); // first byte of first chain
-       sbdnx[0] = (hcdn[0] & 0xff);
-
-       for (i = 0; i < hc_possible_num; i++) {
-               sbdnx[i * 2 + 1] = hcdn[i] & 0xff;
-               sbdnx[i * 2 + 2] = (hcdn[i] >> 8) & 0xff;
-       }
-
-       bus_8131[0][0] = (pci1234[0] >> 16) & 0xff;
-       bus_8111_0 = bus_8131[0][0];
-
-       /* 8111 */
-       dev = dev_find_slot(bus_8111_0, PCI_DEVFN(sbdn, 0));
-       if (dev) {
-               bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-               bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
-               bus_isa++;
-//              printk_debug("bus_isa=%d\n",bus_isa);
-       } else {
-               printk_debug
-                   ("ERROR - could not find PCI %02x:03.0, using defaults\n",
-                    bus_8111_0);
-       }
-
-
-       /* 8131-1 */
-       bus_8131[0][0] = 1;
-       dev = dev_find_slot(bus_8131[0][0], PCI_DEVFN(sbdnx[1], 0));
-       if (dev) {
-               bus_8131[0][1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
-       } else {
-               printk_debug
-                   ("ERROR - could not find PCI %02x:01.0, using defaults\n",
-                    bus_8131[0][0]);
-       }
-
-
-       /* 8132-2 */
-       dev = dev_find_slot(bus_8131[0][0], PCI_DEVFN(sbdnx[1] + 1, 0));
-       if (dev) {
-               bus_8131[0][2] = pci_read_config8(dev, PCI_SECONDARY_BUS);
-               bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
-               bus_isa++;
-       } else {
-               printk_debug
-                   ("ERROR - could not find PCI %02x:02.0, using defaults\n",
-                    bus_8131[0][0]);
-       }
-
-       apicid_base = get_apicid_base(15);
-
-       apicid_8111 = apicid_base++;
-
-       apicid_8131[0][0] = apicid_base++;
-
-       apicid_8131[0][1] = apicid_base++;
-
-
-       /* HT chain 1 */
-       for (i = 1; i < 4; i++) {
-               if (pci1234[i] & 0x1) {
-                       int j = (i - 1) * 2 + 1;
-                       bus_8131[j][0] = (pci1234[i] >> 16) & 0xff;
-                       /* 8131 */
-                       dev = dev_find_slot(bus_8131[j][0], PCI_DEVFN(sbdnx[j], 0));
-                       if (dev) {
-                               bus_8131[j][1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
-                       }
-                       apicid_8131[j][0] = apicid_base++;
-                       dev = dev_find_slot(bus_8131[j][0], PCI_DEVFN(sbdnx[j] + 1, 0));
-                       if (dev) {
-                               bus_8131[j][2] = pci_read_config8(dev, PCI_SECONDARY_BUS);
-                       }
-                       apicid_8131[j][1] = apicid_base++;
-
-                       bus_8131[j + 1][0] = bus_8131[j][0];
-                       /* 8131 */
-                       dev = dev_find_slot(bus_8131[j + 1][0], PCI_DEVFN(sbdnx[j + 1], 0));
-                       if (dev) {
-                               bus_8131[j + 1][1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
-                       }
-                       apicid_8131[j + 1][0] = apicid_base++;
-
-                       dev = dev_find_slot(bus_8131[i + 1][0], PCI_DEVFN(sbdnx[j + 1] + 1, 0));
-                       if (dev) {
-                               bus_8131[j + 1][2] = pci_read_config8(dev, PCI_SECONDARY_BUS);
-                               bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
-                               bus_isa++;
-
-                       }
-                       apicid_8131[j + 1][0] = apicid_base++;
-               }
-       }
-}

diff --git a/src/mainboard/agami/aruma/irq_tables.c b/src/mainboard/agami/aruma/irq_tables.c
deleted file mode 100644 (file)
index 2ebb94f..0000000
--- a/src/mainboard/agami/aruma/irq_tables.c
+++ /dev/null
@@ -1,60 +0,0 @@
-#include <arch/pirq_routing.h>
-#include <device/pci.h>
-
-#define IRQ_ROUTER_BUS         1
-#define IRQ_ROUTER_DEVFN       PCI_DEVFN(4,3)
-#define IRQ_ROUTER_VENDOR      0x1022
-#define IRQ_ROUTER_DEVICE      0x746b
-
-#define AVAILABLE_IRQS 0xdef8
-#define IRQ_SLOT(slot, bus, dev, fn, linka, linkb, linkc, linkd) \
-       { bus, (dev<<3)|fn, {{ linka, AVAILABLE_IRQS}, { linkb, AVAILABLE_IRQS}, \
-       {linkc, AVAILABLE_IRQS}, {linkd, AVAILABLE_IRQS}}, slot, 0}
-
-/*  Each IRQ_SLOT entry consists of:
- *  bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu  
- */
-
-const struct irq_routing_table intel_irq_routing_table = {
-       PIRQ_SIGNATURE,         /* u32 signature */
-       PIRQ_VERSION,           /* u16 version   */
-       32+16*IRQ_SLOT_COUNT,   /* there can be total IRQ_SLOT_COUNT table entries */
-       IRQ_ROUTER_BUS,         /* Where the interrupt router lies (bus) */
-       IRQ_ROUTER_DEVFN,       /* Where the interrupt router lies (dev) */
-       0x00,                   /* IRQs devoted exclusively to PCI usage */
-       IRQ_ROUTER_VENDOR,      /* Vendor */
-       IRQ_ROUTER_DEVICE,      /* Device */
-       0x00,                   /* Crap (miniport) */
-       { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
-       0x6a,           /*  u8 checksum , mod 256 checksum must give zero */
-       {       /* slot(0=onboard), devfn, irqlinks (line id, 0=not routed) */
-               IRQ_SLOT(0, 0x01,4,0, 1,2,3,4 ), /* 8111 PCI bridge */
-               IRQ_SLOT(0, 0x04,0,0, 4,0,0,0 ), /* 8111 USB */
-               IRQ_SLOT(1, 0x06,1,0, 2,3,4,1 ), /* ???? was: bus A*/
-               IRQ_SLOT(2, 0x07,1,0, 2,3,4,1 ), /* ???? was: bus 9*/
-               IRQ_SLOT(3, 0x0a,1,0, 2,3,4,1 ), /* IBM PCI-X <-> PCI-X */
-               IRQ_SLOT(4, 0x08,1,0, 2,3,4,1 ), /* IBM PCI-X <-> PCI-X */
-               IRQ_SLOT(0, 0x04,4,0, 1,0,0,0 ), /* ATI Rage */
-               IRQ_SLOT(0, 0x06,2,0, 3,4,0,0 ), /* ???? was: bus A */
-               IRQ_SLOT(0, 0x07,2,0, 3,4,0,0 ), /* ???? was: bus 9 */
-               IRQ_SLOT(0, 0x0a,2,0, 3,4,0,0 ), /* Intel 82546EB GBit */
-               IRQ_SLOT(0, 0x08,2,0, 3,4,0,0 ), /* Intel 82546EB GBit */
-               IRQ_SLOT(0, 0x0d,1,0, 1,0,0,0 ), /* Marvell MV88SX5080 SATA */
-               IRQ_SLOT(0, 0x0d,2,0, 2,0,0,0 ), /* Marvell MV88SX5080 SATA */
-               IRQ_SLOT(0, 0x0e,1,0, 1,2,3,4 ), /* Intel Memory Controller 031a */
-               IRQ_SLOT(0, 0x0f,1,0, 1,0,0,0 ), /* Marvell MV88SX5080 SATA */
-               IRQ_SLOT(0, 0x04,5,0, 2,0,0,0 ), /* Intel 8255 Ethernet */
-               IRQ_SLOT(5, 0x10,1,0, 1,2,3,4 ), /* ???? was: bus C */
-               IRQ_SLOT(0, 0x12,1,0, 1,0,0,0 ), /* Marvell MV88SX5080 SATA */
-               IRQ_SLOT(0, 0x12,2,0, 2,0,0,0 ), /* Marvell MV88SX5080 SATA */
-               IRQ_SLOT(0, 0x13,1,0, 1,2,3,4 ), /* Intel Memory Controller 031b */
-               IRQ_SLOT(0, 0x14,1,0, 1,0,0,0 ), /* Marvell MV88SX5080 SATA */
-               IRQ_SLOT(6, 0x15,1,0, 1,2,3,4 ), /* ???? was: bus 11 */
-               /* Let Linux know about bus 1 */
-               IRQ_SLOT(0, 1,4,3, 0,0,0,0 ),
-       }
-};
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
-        return copy_pirq_routing_table(addr);
-}

diff --git a/src/mainboard/agami/aruma/mainboard.c b/src/mainboard/agami/aruma/mainboard.c
deleted file mode 100644 (file)
index 3bc65b3..0000000
--- a/src/mainboard/agami/aruma/mainboard.c
+++ /dev/null
@@ -1,330 +0,0 @@
-#include <console/console.h>
-#include <device/device.h>
-#include <device/pci.h>
-#include <device/pci_ids.h>
-#include <device/pci_ops.h>
-#include <cpu/x86/msr.h>
-#include <part/hard_reset.h>
-#include <device/smbus.h>
-#include <delay.h>
-
-#include <arch/io.h>
-#include "../../../northbridge/amd/amdk8/northbridge.h"
-#include <cpu/amd/model_fxx_rev.h>
-#include "chip.h"
-
-#include "pc80/mc146818rtc.h"
-
-
-#undef DEBUG
-#define DEBUG 0
-#if DEBUG 
-static void debug_init(device_t dev)
-{
-       unsigned bus;
-       unsigned devfn;
-#if 0
-       for(bus = 0; bus < 256; bus++) {
-               for(devfn = 0; devfn < 256; devfn++) {
-                       int i;
-                       dev = dev_find_slot(bus, devfn);
-                       if (!dev) {
-                               continue;
-                       }
-                       if (!dev->enabled) {
-                               continue;
-                       }
-                       printk_info("%02x:%02x.%0x aka %s\n", 
-                               bus, devfn >> 3, devfn & 7, dev_path(dev));
-                       for(i = 0; i < 256; i++) {
-                               if ((i & 0x0f) == 0) {
-                                       printk_info("%02x:", i);
-                               }
-                               printk_info(" %02x", pci_read_config8(dev, i));
-                               if ((i & 0x0f) == 0xf) {
-                                       printk_info("\n");
-                               }
-                       }
-                       printk_info("\n");
-               }
-       }
-#endif
-#if 0
-       msr_t msr;
-       unsigned index;
-       unsigned eax, ebx, ecx, edx;
-       index = 0x80000007;
-       printk_debug("calling cpuid 0x%08x\n", index);
-       asm volatile(
-               "cpuid"
-               : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
-               : "a" (index)
-               );
-       printk_debug("cpuid[%08x]: %08x %08x %08x %08x\n",
-               index, eax, ebx, ecx, edx);
-       if (edx & (3 << 1)) {
-               index = 0xC0010042;
-               printk_debug("Reading msr: 0x%08x\n", index);
-               msr = rdmsr(index);
-               printk_debug("msr[0x%08x]: 0x%08x%08x\n",
-                       index, msr.hi, msr.hi);
-       }
-#endif
-}
-
-static void debug_noop(device_t dummy)
-{
-}
-
-static struct device_operations debug_operations = {
-       .read_resources   = debug_noop,
-       .set_resources    = debug_noop,
-       .enable_resources = debug_noop,
-       .init             = debug_init,
-};
-
-static unsigned int scan_root_bus(device_t root, unsigned int max)
-{
-       struct device_path path;
-       device_t debug;
-       max = root_dev_scan_bus(root, max);
-       path.type = DEVICE_PATH_PNP;
-       path.u.pnp.port   = 0;
-       path.u.pnp.device = 0;
-       debug = alloc_dev(&root->link[1], &path);
-       debug->ops = &debug_operations;
-       return max;
-}
-#endif
-
-#if 1
-static void handle_smbus_error(int value, const char *msg)
-{
-       if (value >= 0) {
-               return;
-       }
-       switch(value) {
-       case SMBUS_WAIT_UNTIL_READY_TIMEOUT:
-               printk_emerg("SMBUS wait until ready timed out - resetting...");
-               hard_reset();
-               break;
-       case SMBUS_WAIT_UNTIL_DONE_TIMEOUT:
-               printk_emerg("SMBUS wait until done timed out - resetting...");
-               hard_reset();
-               break;
-       default:
-               die(msg);
-               break;
-       }
-}
-
-#define ADM1026_DEVICE 0x2d /* Either 0x2c, 0x2d or 0x2e. */
-#define ADM1026_REG_CONFIG1 0x00
-#define CFG1_MONITOR     0x01
-#define CFG1_INT_ENABLE  0x02
-#define CFG1_INT_CLEAR   0x04
-#define CFG1_AIN8_9      0x08
-#define CFG1_THERM_HOT   0x10
-#define CFT1_DAC_AFC     0x20
-#define CFG1_PWM_AFC     0x40
-#define CFG1_RESET       0x80
-#define ADM1026_REG_CONFIG2 0x01
-#define ADM1026_REG_CONFIG3 0x07
-
-
-
-#define BILLION 1000000000UL
-
-static void  verify_cpu_voltage(const char *name, 
-       device_t dev, unsigned int reg, 
-       unsigned factor, unsigned cpu_volts, unsigned delta)
-{
-       unsigned nvolts_lo, nvolts_hi;
-       unsigned cpuvolts_hi, cpuvolts_lo;
-       int value;
-       int loops;
-
-       loops = 1000;
-       do {
-               value = smbus_read_byte(dev, reg);
-               handle_smbus_error(value, "SMBUS read byte failed");
-       } while ((--loops > 0) && value == 0);
-       /* Convert the byte value to nanoVolts.
-        * My accuracy is nowhere near that good but I don't
-        * have to round so the math is simple. 
-        * I can only go up to about 4.2 Volts this way so my range is
-        * limited.
-        */
-       nvolts_lo = ((unsigned)value * factor);
-       nvolts_hi = nvolts_lo + factor - 1;
-       /* Get the range of acceptable cpu voltage values */
-       cpuvolts_lo = cpu_volts - delta;
-       cpuvolts_hi = cpu_volts + delta;
-       if ((nvolts_lo < cpuvolts_lo) || (nvolts_hi > cpuvolts_hi)) {
-               printk_emerg("%s at (%u.%09u-%u.%09u)Volts expected %u.%09u+/-%u.%09uVolts\n",
-                       name,
-                       nvolts_lo/BILLION, nvolts_lo%BILLION,
-                       nvolts_hi/BILLION, nvolts_hi%BILLION,
-                       cpu_volts/BILLION, cpu_volts%BILLION,
-                       delta/BILLION, delta%BILLION);
-               die("");
-       }
-       printk_info("%s at (%u.%09u-%u.%09u)Volts\n",
-               name,
-               nvolts_lo/BILLION, nvolts_lo%BILLION,
-               nvolts_hi/BILLION, nvolts_hi%BILLION);
-               
-}
-
-static void adm1026_enable_monitoring(device_t dev)
-{
-       int result;
-       result = smbus_read_byte(dev, ADM1026_REG_CONFIG1);
-       handle_smbus_error(result, "ADM1026: cannot read config1");
-
-       result = (result | CFG1_MONITOR) & ~(CFG1_INT_CLEAR | CFG1_RESET);
-       result = smbus_write_byte(dev, ADM1026_REG_CONFIG1, result);
-       handle_smbus_error(result, "ADM1026: cannot write to config1");
-
-       result = smbus_read_byte(dev, ADM1026_REG_CONFIG1);
-       handle_smbus_error(result, "ADM1026: cannot reread config1");
-       if (!(result & CFG1_MONITOR)) {
-               die("ADM1026: monitoring would not enable");
-       }
-}
-
-
-static unsigned k8_cpu_volts(void)
-{
-       unsigned volts = ~0;
-       if (is_cpu_c0()) {
-               volts = 1500000000;
-       }
-       if (is_cpu_b3()) {
-               volts = 1550000000;
-       }
-       return volts;
-}
-
-static void verify_cpu_voltages(device_t dev)
-{
-       unsigned cpu_volts;
-       unsigned delta;
-#if 0
-       delta =  50000000;
-#else
-       delta =  75000000;
-#endif
-       cpu_volts = k8_cpu_volts();
-       if (cpu_volts == ~0) {
-               printk_info("Required cpu voltage unknwon not checking\n");
-               return; 
-       }
-       /* I need to read registers 0x37 == Ain7CPU1 core 0x2d == VcppCPU0 core */
-       /* CPU1 core 
-        * The sensor has a range of 0-2.5V and reports in
-        * 256 distinct steps.
-        */
-       verify_cpu_voltage("CPU1 Vcore", dev, 0x37, 9765625, 
-               cpu_volts, delta);
-       /* CPU0 core 
-        * The sensor has range of 0-3.0V and reports in 
-        * 256 distinct steps.
-        */
-       verify_cpu_voltage("CPU0 Vcore", dev, 0x2d, 11718750, 
-               cpu_volts, delta);
-}
-
-#define SMBUS_MUX 0x71
-
-static void do_verify_cpu_voltages(void)
-{
-       device_t smbus_dev;
-       device_t mux, sensor;
-       struct device_path mux_path, sensor_path;
-       int result;
-       int mux_setting;
-       
-       /* Find the smbus controller */
-       smbus_dev = dev_find_device(0x1022, 0x746b, 0);
-       if (!smbus_dev) {
-               die("SMBUS controller not found\n");
-       }
-
-       /* Find the smbus mux */
-       mux_path.type         = DEVICE_PATH_I2C;
-       mux_path.u.i2c.device = SMBUS_MUX;
-       mux = find_dev_path(smbus_dev, &mux_path);
-       if (!mux) {
-               die("SMBUS mux not found\n");
-       }
-
-       /* Find the adm1026 sensor */
-       sensor_path.type         = DEVICE_PATH_I2C;
-       sensor_path.u.i2c.device = ADM1026_DEVICE;
-       sensor = find_dev_path(mux, &sensor_path);
-       if (!sensor) {
-               die("ADM1026 not found\n");
-       }
-       
-       /* Set the mux to see the temperature sensors */
-       mux_setting = 1;
-       result = smbus_send_byte(mux, mux_setting);
-       handle_smbus_error(result, "SMBUS send byte failed\n");
-
-       result = smbus_recv_byte(mux);
-       handle_smbus_error(result, "SMBUS recv byte failed\n");
-       if (result != mux_setting) {
-               printk_emerg("SMBUS mux would not set to %d\n", mux_setting);
-               die("");
-       }
-
-       adm1026_enable_monitoring(sensor);
-
-       /* It takes 11.38ms to read a new voltage sensor value */
-       mdelay(12);
-
-       /* Read the cpu voltages and make certain everything looks sane */
-       verify_cpu_voltages(sensor);
-}
-#else
-#define do_verify_cpu_voltages() do {} while(0)
-#endif
-
-
-static void fixup_aruma(void)
-{
-       msr_t msr;
-
-       /* bit 6 (0x40) in MSR 0xC0010015 
-        * disables the TLB cache flush filter
-        */
-       msr=rdmsr(0xC0010015);
-       msr.lo |= 0x40;
-       wrmsr(0xC0010015, msr);
-}
-
-
-static void mainboard_init(device_t dev)
-{
-       root_dev_init(dev);
-
-       printk_info("Initializing mainboard components... ");
-       // do_verify_cpu_voltages();
-       printk_info("ok\n");
-
-       printk_info("Initializing mainboard specific functions... ");
-       fixup_aruma();
-       printk_info("ok\n");
-}
-
-static void enable_dev(struct device *dev)
-{
-       dev->ops->init = mainboard_init;
-}
-
-struct chip_operations mainboard_agami_aruma_ops = {
-       CHIP_NAME("AGAMI Aruma Mainboard")
-       .enable_dev = enable_dev, 
-};
-

diff --git a/src/mainboard/agami/aruma/mptable.c b/src/mainboard/agami/aruma/mptable.c
deleted file mode 100644 (file)
index 37776cf..0000000
--- a/src/mainboard/agami/aruma/mptable.c
+++ /dev/null
@@ -1,246 +0,0 @@
-#include <console/console.h>
-#include <arch/smp/mpspec.h>
-#include <cpu/x86/lapic.h>
-#include <device/pci.h>
-#include <string.h>
-#include <stdint.h>
-
-#define WRITE_IOAPIC(bus,device,fn,id,version)         \
-do {                                                   \
-       device_t dev;                                   \
-       struct resource *res;                           \
-       dev = dev_find_slot(bus, PCI_DEVFN(device,fn)); \
-       if (!dev) break;                                \
-       res = find_resource(dev, PCI_BASE_ADDRESS_0);   \
-       if (!res) break;                                \
-       smp_write_ioapic(mc, id, version, res->base);   \
-} while(0);
-
-unsigned get_apicid_base(unsigned ioapic_num);
-
-void *smp_write_config_table(void *v)
-{
-        static const char sig[4] = "PCMP";
-        static const char oem[8] = "AGAMI   ";
-        static const char productid[12] = "ARUMA       ";
-        struct mp_config_table *mc;
-       int i;
-       unsigned apicid_base;
-       unsigned char bus_isa;
-       device_t dev;
-
-        mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
-        memset(mc, 0, sizeof(*mc));
-
-        memcpy(mc->mpc_signature, sig, sizeof(sig));
-        mc->mpc_length = sizeof(*mc); /* initially just the header */
-        mc->mpc_spec = 0x04;
-        mc->mpc_checksum = 0; /* not yet computed */
-        memcpy(mc->mpc_oem, oem, sizeof(oem));
-        memcpy(mc->mpc_productid, productid, sizeof(productid));
-        mc->mpc_oemptr = 0;
-        mc->mpc_oemsize = 0;
-        mc->mpc_entry_count = 0; /* No entries yet... */
-        mc->mpc_lapic = LAPIC_ADDR;
-        mc->mpe_length = 0;
-        mc->mpe_checksum = 0;
-        mc->reserved = 0;
-
-        smp_write_processors(mc);
-       
-       /* Write busses */
-       bus_isa=22; // ISA
-       for (i=0; i<bus_isa; i++)
-               smp_write_bus(mc, i, "PCI   ");
-       smp_write_bus(mc, bus_isa, "ISA   ");
-
-       /* enable ext_apic_id */
-#if 1
-       apicid_base = 1;
-#else  
-       apicid_base = get_apicid_base(15);
-        if(lapicid()>=0x10) { 
-               apicid_base = 0; 
-       }
-#endif
-
-       printk_info("APIC ID BASE=0x%x\n",apicid_base);
-
-       /* I/O APICs */
-       smp_write_ioapic(mc, apicid_base, 0x11, 0xfec00000); // 8111 IOAPIC
-       /* Write all 8131 IOAPICs */
-       /* (8131: bus, dev, fn) , id, version */
-       WRITE_IOAPIC(0x01,1,1, apicid_base+1, 0x11);
-       WRITE_IOAPIC(0x01,2,1, apicid_base+2, 0x11);
-       WRITE_IOAPIC(0x05,1,1, apicid_base+3, 0x11);
-       WRITE_IOAPIC(0x05,2,1, apicid_base+4, 0x11);
-       WRITE_IOAPIC(0x05,3,1, apicid_base+5, 0x11);
-       WRITE_IOAPIC(0x05,4,1, apicid_base+6, 0x11);
-       WRITE_IOAPIC(0x0c,1,1, apicid_base+7, 0x11);
-       WRITE_IOAPIC(0x0c,2,1, apicid_base+8, 0x11);
-       WRITE_IOAPIC(0x0c,3,1, apicid_base+9, 0x11);
-       WRITE_IOAPIC(0x0c,4,1, apicid_base+10, 0x11);
-       WRITE_IOAPIC(0x11,1,1, apicid_base+11, 0x11);
-       WRITE_IOAPIC(0x11,2,1, apicid_base+12, 0x11);
-       WRITE_IOAPIC(0x11,3,1, apicid_base+13, 0x11);
-       WRITE_IOAPIC(0x11,4,1, apicid_base+14, 0x11);
-       
-       /*I/O Ints:     Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN# */ 
-       smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_base, 0x0);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x1, apicid_base, 0x1);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_base, 0x2);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x3, apicid_base, 0x3);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x4, apicid_base, 0x4);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x6, apicid_base, 0x6);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x7, apicid_base, 0x7);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x8, apicid_base, 0x8);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xc, apicid_base, 0xc);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xd, apicid_base, 0xd);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xe, apicid_base, 0xe);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xf, apicid_base, 0xf);
-
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 1, (4<<2)|0, apicid_base, 0x13);
-       
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x1, 0x1f, apicid_base, 0x13);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x4, 0x03, apicid_base, 0x13);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x4, 0x10, apicid_base, 0x10);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x4, 0x14, apicid_base, 0x11);
-       
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0xb, 0x10, 0x5, 0x1);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0xb, 0x11, 0x5, 0x0);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0xb, 0x14, 0x5, 0x0);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0xb, 0x15, 0x5, 0x3);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0xb, 0x18, 0x5, 0x3);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0xb, 0x19, 0x5, 0x0);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0xa, 0x8, 0x5, 0x2);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0xa, 0x9, 0x5, 0x3);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x9, 0x10, 0x6, 0x1);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x9, 0x11, 0x6, 0x0);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x9, 0x14, 0x6, 0x0);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x9, 0x15, 0x6, 0x3);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x9, 0x18, 0x6, 0x3);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x9, 0x19, 0x6, 0x0);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x8, 0x8, 0x6, 0x2);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x8, 0x9, 0x6, 0x3);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0xd, 0x4, 0x7, 0x0);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0xd, 0x8, 0x7, 0x1);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0xe, 0x4, 0x8, 0x0);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0xf, 0x4, 0x9, 0x0);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x12, 0x4, 0xb, 0x0);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x12, 0x8, 0xb, 0x1);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x13, 0x4, 0xc, 0x0);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x14, 0x4, 0xd, 0x0);
-       
-       /*Local Ints:   Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN#*/
-       smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
-       smp_write_intsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
-
-       /*
-       MP Config Extended Table Entries:
-         --
-         System Address Space
-          bus ID: 0 address type: I/O address
-          address base: 0x9000
-          address range: 0x2000
-         --
-         System Address Space
-          bus ID: 0 address type: I/O address
-          address base: 0x0
-          address range: 0x100
-         --
-         System Address Space
-          bus ID: 0 address type: memory address
-          address base: 0xa0000
-          address range: 0x20000
-         --
-         System Address Space
-          bus ID: 0 address type: memory address
-          address base: 0xaed00000
-          address range: 0x2200000
-         --
-         System Address Space
-          bus ID: 0 address type: prefetch address
-          address base: 0xb0f00000
-          address range: 0x100000
-         --
-         System Address Space
-          bus ID: 4 address type: I/O address
-          address base: 0xb000
-          address range: 0x2000
-         --
-         System Address Space
-          bus ID: 4 address type: memory address
-          address base: 0xb1000000
-          address range: 0x700000
-         --
-         System Address Space
-          bus ID: 4 address type: prefetch address
-          address base: 0xb1700000
-          address range: 0x500000
-         --
-         System Address Space
-          bus ID: 11 address type: memory address
-          address base: 0xb1c00000
-          address range: 0x400000
-         --
-         System Address Space
-          bus ID: 11 address type: prefetch address
-          address base: 0xb2000000
-          address range: 0x2400000
-         --
-         System Address Space
-          bus ID: 16 address type: memory address
-          address base: 0xb4400000
-          address range: 0x400000
-         --
-         System Address Space
-          bus ID: 16 address type: prefetch address
-          address base: 0xb4800000
-          address range: 0x4a400000
-         --
-         Bus Heirarchy
-          bus ID: 21 bus info: 0x01 parent bus ID: 0--
-         Compatibility Bus Address
-          bus ID: 0 address modifier: add
-          predefined range: 0x00000000--
-         Compatibility Bus Address
-          bus ID: 4 address modifier: subtract
-          predefined range: 0x00000000--
-         Compatibility Bus Address
-          bus ID: 11 address modifier: subtract
-          predefined range: 0x00000000--
-         Compatibility Bus Address
-          bus ID: 16 address modifier: subtract
-          predefined range: 0x00000000--
-         Compatibility Bus Address
-          bus ID: 0 address modifier: add
-          predefined range: 0x00000001--
-         Compatibility Bus Address
-          bus ID: 4 address modifier: subtract
-          predefined range: 0x00000001--
-         Compatibility Bus Address
-          bus ID: 11 address modifier: subtract
-          predefined range: 0x00000001--
-         Compatibility Bus Address
-          bus ID: 16 address modifier: subtract
-          predefined range: 0x00000001 
-       */
-       
-       /* There is no extension information... */
-         
-       /* Compute the checksums */
-       mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
-       mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
-       printk_debug("Wrote the mp table end at: %p - %p\n",
-               mc, smp_next_mpe_entry(mc));
-       return smp_next_mpe_entry(mc);
-}
-
-unsigned long write_smp_table(unsigned long addr)
-{
-       void *v;
-       v = smp_write_floating_table(addr);
-       return (unsigned long)smp_write_config_table(v);
-}
-
-

diff --git a/src/mainboard/agami/aruma/resourcemap.c b/src/mainboard/agami/aruma/resourcemap.c
deleted file mode 100644 (file)
index a9ae3b4..0000000
--- a/src/mainboard/agami/aruma/resourcemap.c
+++ /dev/null
@@ -1,271 +0,0 @@
-/*
- * Agami Aruma needs a different resource map
- *
- */
-
-static void setup_aruma_resource_map(void)
-{
-       static const unsigned int register_values[] = {
-       /* Careful set limit registers before base registers which contain the enables */
-       /* DRAM Limit i Registers
-        * F1:0x44 i = 0
-        * F1:0x4C i = 1
-        * F1:0x54 i = 2
-        * F1:0x5C i = 3
-        * F1:0x64 i = 4
-        * F1:0x6C i = 5
-        * F1:0x74 i = 6
-        * F1:0x7C i = 7
-        * [ 2: 0] Destination Node ID
-        *         000 = Node 0
-        *         001 = Node 1
-        *         010 = Node 2
-        *         011 = Node 3
-        *         100 = Node 4
-        *         101 = Node 5
-        *         110 = Node 6
-        *         111 = Node 7
-        * [ 7: 3] Reserved
-        * [10: 8] Interleave select
-        *         specifies the values of A[14:12] to use with interleave enable.
-        * [15:11] Reserved
-        * [31:16] DRAM Limit Address i Bits 39-24
-        *         This field defines the upper address bits of a 40 bit  address
-        *         that define the end of the DRAM region.
-        */
-       PCI_ADDR(0, 0x18, 1, 0x44), 0x0000f8f8, 0x00000000,
-       PCI_ADDR(0, 0x18, 1, 0x4C), 0x0000f8f8, 0x00000001,
-       PCI_ADDR(0, 0x18, 1, 0x54), 0x0000f8f8, 0x00000002,
-       PCI_ADDR(0, 0x18, 1, 0x5C), 0x0000f8f8, 0x00000003,
-       PCI_ADDR(0, 0x18, 1, 0x64), 0x0000f8f8, 0x00000004,
-       PCI_ADDR(0, 0x18, 1, 0x6C), 0x0000f8f8, 0x00000005,
-       PCI_ADDR(0, 0x18, 1, 0x74), 0x0000f8f8, 0x00000006,
-       PCI_ADDR(0, 0x18, 1, 0x7C), 0x0000f8f8, 0x00000007,
-       /* DRAM Base i Registers
-        * F1:0x40 i = 0
-        * F1:0x48 i = 1
-        * F1:0x50 i = 2
-        * F1:0x58 i = 3
-        * F1:0x60 i = 4
-        * F1:0x68 i = 5
-        * F1:0x70 i = 6
-        * F1:0x78 i = 7
-        * [ 0: 0] Read Enable
-        *         0 = Reads Disabled
-        *         1 = Reads Enabled
-        * [ 1: 1] Write Enable
-        *         0 = Writes Disabled
-        *         1 = Writes Enabled
-        * [ 7: 2] Reserved
-        * [10: 8] Interleave Enable
-        *         000 = No interleave
-        *         001 = Interleave on A[12] (2 nodes)
-        *         010 = reserved
-        *         011 = Interleave on A[12] and A[14] (4 nodes)
-        *         100 = reserved
-        *         101 = reserved
-        *         110 = reserved
-        *         111 = Interleve on A[12] and A[13] and A[14] (8 nodes)
-        * [15:11] Reserved
-        * [13:16] DRAM Base Address i Bits 39-24
-        *         This field defines the upper address bits of a 40-bit address
-        *         that define the start of the DRAM region.
-        */
-       PCI_ADDR(0, 0x18, 1, 0x40), 0x0000f8fc, 0x00000000,
-       PCI_ADDR(0, 0x18, 1, 0x48), 0x0000f8fc, 0x00000000,
-       PCI_ADDR(0, 0x18, 1, 0x50), 0x0000f8fc, 0x00000000,
-       PCI_ADDR(0, 0x18, 1, 0x58), 0x0000f8fc, 0x00000000,
-       PCI_ADDR(0, 0x18, 1, 0x60), 0x0000f8fc, 0x00000000,
-       PCI_ADDR(0, 0x18, 1, 0x68), 0x0000f8fc, 0x00000000,
-       PCI_ADDR(0, 0x18, 1, 0x70), 0x0000f8fc, 0x00000000,
-       PCI_ADDR(0, 0x18, 1, 0x78), 0x0000f8fc, 0x00000000,
-
-       /* Memory-Mapped I/O Limit i Registers
-        * F1:0x84 i = 0
-        * F1:0x8C i = 1
-        * F1:0x94 i = 2
-        * F1:0x9C i = 3
-        * F1:0xA4 i = 4
-        * F1:0xAC i = 5
-        * F1:0xB4 i = 6
-        * F1:0xBC i = 7
-        * [ 2: 0] Destination Node ID
-        *         000 = Node 0
-        *         001 = Node 1
-        *         010 = Node 2
-        *         011 = Node 3
-        *         100 = Node 4
-        *         101 = Node 5
-        *         110 = Node 6
-        *         111 = Node 7
-        * [ 3: 3] Reserved
-        * [ 5: 4] Destination Link ID
-        *         00 = Link 0
-        *         01 = Link 1
-        *         10 = Link 2
-        *         11 = Reserved
-        * [ 6: 6] Reserved
-        * [ 7: 7] Non-Posted
-        *         0 = CPU writes may be posted
-        *         1 = CPU writes must be non-posted
-        * [31: 8] Memory-Mapped I/O Limit Address i (39-16)
-        *         This field defines the upp adddress bits of a 40-bit address that
-        *         defines the end of a memory-mapped I/O region n
-        */
-       PCI_ADDR(0, 0x18, 1, 0x84), 0x00000048, 0x00000000,
-       PCI_ADDR(0, 0x18, 1, 0x8C), 0x00000048, 0x00000000,
-       PCI_ADDR(0, 0x18, 1, 0x94), 0x00000048, 0x00000000,
-       PCI_ADDR(0, 0x18, 1, 0x9C), 0x00000048, 0x00000000,
-       PCI_ADDR(0, 0x18, 1, 0xA4), 0x00000048, 0x00000000,
-       PCI_ADDR(0, 0x18, 1, 0xAC), 0x00000048, 0x00000000,
-       PCI_ADDR(0, 0x18, 1, 0xB4), 0x00000048, 0x00000000,
-       PCI_ADDR(0, 0x18, 1, 0xBC), 0x00000048, 0x00ffff10, // Link 1 CPU 0
-
-       /* Memory-Mapped I/O Base i Registers
-        * F1:0x80 i = 0
-        * F1:0x88 i = 1
-        * F1:0x90 i = 2
-        * F1:0x98 i = 3
-        * F1:0xA0 i = 4
-        * F1:0xA8 i = 5
-        * F1:0xB0 i = 6
-        * F1:0xB8 i = 7
-        * [ 0: 0] Read Enable
-        *         0 = Reads disabled
-        *         1 = Reads Enabled
-        * [ 1: 1] Write Enable
-        *         0 = Writes disabled
-        *         1 = Writes Enabled
-        * [ 2: 2] Cpu Disable
-        *         0 = Cpu can use this I/O range
-        *         1 = Cpu requests do not use this I/O range
-        * [ 3: 3] Lock
-        *         0 = base/limit registers i are read/write
-        *         1 = base/limit registers i are read-only
-        * [ 7: 4] Reserved
-        * [31: 8] Memory-Mapped I/O Base Address i (39-16)
-        *         This field defines the upper address bits of a 40bit address 
-        *         that defines the start of memory-mapped I/O region i
-        */
-       PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,
-       PCI_ADDR(0, 0x18, 1, 0x88), 0x000000f0, 0x00000000,
-       PCI_ADDR(0, 0x18, 1, 0x90), 0x000000f0, 0x00000000,
-       PCI_ADDR(0, 0x18, 1, 0x98), 0x000000f0, 0x00000000,
-       PCI_ADDR(0, 0x18, 1, 0xA0), 0x000000f0, 0x00000000,
-       PCI_ADDR(0, 0x18, 1, 0xA8), 0x000000f0, 0x00000000,
-       PCI_ADDR(0, 0x18, 1, 0xB0), 0x000000f0, 0x00000000,
-       PCI_ADDR(0, 0x18, 1, 0xB8), 0x000000f0, 0x00fc0003,
-
-       /* PCI I/O Limit i Registers
-        * F1:0xC4 i = 0
-        * F1:0xCC i = 1
-        * F1:0xD4 i = 2
-        * F1:0xDC i = 3
-        * [ 2: 0] Destination Node ID
-        *         000 = Node 0
-        *         001 = Node 1
-        *         010 = Node 2
-        *         011 = Node 3
-        *         100 = Node 4
-        *         101 = Node 5
-        *         110 = Node 6
-        *         111 = Node 7
-        * [ 3: 3] Reserved
-        * [ 5: 4] Destination Link ID
-        *         00 = Link 0
-        *         01 = Link 1
-        *         10 = Link 2
-        *         11 = reserved
-        * [11: 6] Reserved
-        * [24:12] PCI I/O Limit Address i
-        *         This field defines the end of PCI I/O region n
-        * [31:25] Reserved
-        */
-       PCI_ADDR(0, 0x18, 1, 0xC4), 0xFE000FC8, 0x01fff010, // CPU0 LDT1
-       PCI_ADDR(0, 0x18, 1, 0xCC), 0xFE000FC8, 0x00000000,
-       PCI_ADDR(0, 0x18, 1, 0xD4), 0xFE000FC8, 0x00000000,
-       PCI_ADDR(0, 0x18, 1, 0xDC), 0xFE000FC8, 0x00000000,
-
-       /* PCI I/O Base i Registers
-        * F1:0xC0 i = 0
-        * F1:0xC8 i = 1
-        * F1:0xD0 i = 2
-        * F1:0xD8 i = 3
-        * [ 0: 0] Read Enable
-        *         0 = Reads Disabled
-        *         1 = Reads Enabled
-        * [ 1: 1] Write Enable
-        *         0 = Writes Disabled
-        *         1 = Writes Enabled
-        * [ 3: 2] Reserved
-        * [ 4: 4] VGA Enable
-        *         0 = VGA matches Disabled
-        *         1 = matches all address < 64K and where A[9:0] is in the 
-        *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
-        * [ 5: 5] ISA Enable
-        *         0 = ISA matches Disabled
-        *         1 = Blocks address < 64K and in the last 768 bytes of eack 1K block
-        *             from matching agains this base/limit pair
-        * [11: 6] Reserved
-        * [24:12] PCI I/O Base i
-        *         This field defines the start of PCI I/O region n 
-        * [31:25] Reserved
-        */
-       PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000003,
-       PCI_ADDR(0, 0x18, 1, 0xC8), 0xFE000FCC, 0x00000000,
-       PCI_ADDR(0, 0x18, 1, 0xD0), 0xFE000FCC, 0x00000000,
-       PCI_ADDR(0, 0x18, 1, 0xD8), 0xFE000FCC, 0x00000000,
-
-       /* Config Base and Limit i Registers
-        * F1:0xE0 i = 0
-        * F1:0xE4 i = 1
-        * F1:0xE8 i = 2
-        * F1:0xEC i = 3
-        * [ 0: 0] Read Enable
-        *         0 = Reads Disabled
-        *         1 = Reads Enabled
-        * [ 1: 1] Write Enable
-        *         0 = Writes Disabled
-        *         1 = Writes Enabled
-        * [ 2: 2] Device Number Compare Enable
-        *         0 = The ranges are based on bus number
-        *         1 = The ranges are ranges of devices on bus 0
-        * [ 3: 3] Reserved
-        * [ 6: 4] Destination Node
-        *         000 = Node 0
-        *         001 = Node 1
-        *         010 = Node 2
-        *         011 = Node 3
-        *         100 = Node 4
-        *         101 = Node 5
-        *         110 = Node 6
-        *         111 = Node 7
-        * [ 7: 7] Reserved
-        * [ 9: 8] Destination Link
-        *         00 = Link 0
-        *         01 = Link 1
-        *         10 = Link 2
-        *         11 - Reserved
-        * [15:10] Reserved
-        * [23:16] Bus Number Base i
-        *         This field defines the lowest bus number in configuration region i
-        * [31:24] Bus Number Limit i
-        *         This field defines the highest bus number in configuration regin i
-        */
-       
-        PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x04000103, // CPU0 LDT1
-        PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x0b050213, // CPU1 LDT2
-        PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x100c0223, // CPU2 LDT2
-        PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x15110133, // CPU3 LTD1
-
-       /* setup power management registers */
-       PCI_ADDR(0, 0x18, 3, 0x80), 0x80808080, 0x23070000, // PM control low
-       PCI_ADDR(0, 0x18, 3, 0x84), 0x80808080, 0x00132113, // PM control high
-       PCI_ADDR(0, 0x18, 3, 0xD8), 0x8E000000, 0x20002710, // Clock PM high
-
-       };
-       int max;
-       max = ARRAY_SIZE(register_values);
-       setup_resource_map(register_values, max);
-}
-

diff --git a/src/mainboard/agami/aruma/ssdt_lb_x.dsl b/src/mainboard/agami/aruma/ssdt_lb_x.dsl
deleted file mode 100644 (file)
index 7e835b6..0000000
--- a/src/mainboard/agami/aruma/ssdt_lb_x.dsl
+++ /dev/null
@@ -1,77 +0,0 @@
-/*
- * Copyright 2005 AMD
- */
-DefinitionBlock ("SSDT.aml", "SSDT", 1, "AMD-K8", "AMD-ACPI", 100925440)
-{
-    /*
-     * These objects were referenced but not defined in this table
-     */
-    External (\_SB_.PCI0, DeviceObj)
-
-    Scope (\_SB.PCI0)
-    {
-         Name (BUSN, Package (0x04)
-        {
-            0x11111111,
-            0x22222222,
-            0x33333333,
-            0x44444444
-        })
-        Name (MMIO, Package (0x10)
-        {
-            0x11111111,
-            0x22222222,
-            0x33333333,
-            0x44444444,
-            0x55555555,
-            0x66666666,
-            0x77777777,
-            0x88888888,
-            0x99999999,
-            0xaaaaaaaa,
-            0xbbbbbbbb,
-            0xcccccccc,
-            0xdddddddd,
-            0xeeeeeeee,
-            0x11111111,
-            0x22222222
-        })
-        Name (PCIO, Package (0x08)
-        {
-            0x77777777,
-            0x88888888,
-            0x99999999,
-            0xaaaaaaaa,
-            0xbbbbbbbb,
-            0xcccccccc,
-            0xdddddddd,
-            0xeeeeeeee
-        })
-        Name (SBLK, 0x11)
-        Name (TOM1, 0xaaaaaaaa)
-       Name (SBDN, 0xbbbbbbbb)
-       Name (HCLK, Package (0x08)
-       {
-           0x11111111,
-           0x22222222,
-           0x33333333,
-           0x44444444,
-            0x55555555,
-            0x66666666,
-            0x77777777,
-            0x88888888
-       })
-        Name (HCDN, Package (0x08)
-        {
-            0x11111111,
-            0x22222222,
-            0x33333333,
-            0x44444444,
-            0x55555555,
-            0x66666666,
-            0x77777777,
-            0x88888888
-        })
-    }
-}
-

diff --git a/targets/agami/aruma/Config-abuild.lb b/targets/agami/aruma/Config-abuild.lb
deleted file mode 100644 (file)
index 3fd0448..0000000
--- a/targets/agami/aruma/Config-abuild.lb
+++ /dev/null
@@ -1,26 +0,0 @@
-# This will make a target directory of ./VENDOR_MAINBOARD
-
-target VENDOR_MAINBOARD
-mainboard VENDOR/MAINBOARD
-
-option CC="CROSSCC"
-option CROSS_COMPILE="CROSS_PREFIX"
-option HOSTCC="CROSS_HOSTCC"
-
-__COMPRESSION__
-
-option DEFAULT_CONSOLE_LOGLEVEL=7
-option MAXIMUM_CONSOLE_LOGLEVEL=7
-
-option ROM_SIZE = (1024*1024)
-option FALLBACK_SIZE = (1024*1024)
-
-romimage "fallback" 
-       option USE_FALLBACK_IMAGE=1
-       option ROM_IMAGE_SIZE=0x16100
-       option XIP_ROM_SIZE=0x20000
-       option COREBOOT_EXTRA_VERSION=".0-fallback"
-       payload __PAYLOAD__
-end
-
-buildrom ./coreboot.rom ROM_SIZE "fallback"

diff --git a/targets/agami/aruma/Config.lb b/targets/agami/aruma/Config.lb
deleted file mode 100644 (file)
index 697ada9..0000000
--- a/targets/agami/aruma/Config.lb
+++ /dev/null
@@ -1,29 +0,0 @@
-# This will make a target directory of ./agami_aruma
-
-target agami_aruma
-mainboard agami/aruma
-
-option DEFAULT_CONSOLE_LOGLEVEL=8
-option MAXIMUM_CONSOLE_LOGLEVEL=8
-
-#option DEFAULT_CONSOLE_LOGLEVEL=7
-#option MAXIMUM_CONSOLE_LOGLEVEL=7
-
-romimage "normal"
-        option ROM_SIZE = 512*1024-36*1024
-       option USE_FALLBACK_IMAGE=0
-       option ROM_IMAGE_SIZE=0x17000
-       option XIP_ROM_SIZE=0x20000
-       option COREBOOT_EXTRA_VERSION=".0-normal"
-       payload ../../../../../../filo.elf
-end
-
-romimage "fallback" 
-       option USE_FALLBACK_IMAGE=1
-       option ROM_IMAGE_SIZE=0x17000
-       option XIP_ROM_SIZE=0x20000
-       option COREBOOT_EXTRA_VERSION=".0-fallback"
-       payload ../../../../../../filo.elf
-end
-
-buildrom ./coreboot.rom ROM_SIZE "normal" "fallback"

diff --git a/targets/agami/aruma/Config1M.lb b/targets/agami/aruma/Config1M.lb
deleted file mode 100644 (file)
index d28b4ae..0000000
--- a/targets/agami/aruma/Config1M.lb
+++ /dev/null
@@ -1,24 +0,0 @@
-# This will make a target directory of ./agami_aruma
-
-target agami_aruma
-mainboard agami/aruma
-
-#option DEFAULT_CONSOLE_LOGLEVEL=8
-#option MAXIMUM_CONSOLE_LOGLEVEL=8
-
-option DEFAULT_CONSOLE_LOGLEVEL=7
-option MAXIMUM_CONSOLE_LOGLEVEL=7
-
-option ROM_SIZE = (1024*1024)
-option FALLBACK_SIZE = (1024*1024)
-option CONFIG_COMPRESSED_PAYLOAD_LZMA = 1
-
-romimage "fallback" 
-       option USE_FALLBACK_IMAGE=1
-       option ROM_IMAGE_SIZE=0x14000
-       option XIP_ROM_SIZE=0x20000
-       option COREBOOT_EXTRA_VERSION=".0-big"
-       payload ../../../../../../linux.elf
-end
-
-buildrom ./coreboot.rom ROM_SIZE "fallback"

diff --git a/targets/agami/aruma/build b/targets/agami/aruma/build
deleted file mode 100755 (executable)
index 90b202c..0000000
--- a/targets/agami/aruma/build
+++ /dev/null
@@ -1,12 +0,0 @@
-#!/bin/bash
-#
-# script to generate rom image with builtin vga option rom.
-# call from freebios2/targets
-#
-rm -rf agami/aruma/agami_aruma
-./buildtarget agami/aruma/
-cd agami/aruma/agami_aruma
-make
-mv agami_aruma.rom agami_aruma_novga.rom
-cat ~/atiragexl.rom agami_aruma_novga.rom > agami_aruma.rom
-cd ../../..