export used
comment "Have hard reset"
end
+define HARD_RESET_BUS
+ default 1
+ export always
+ comment "Bus number of southbridge device doing reset"
+end
+define HARD_RESET_DEVICE
+ default 5
+ export always
+ comment "Device number of southbridge device doing reset"
+end
+define HARD_RESET_FUNCTION
+ default 0
+ export always
+ comment "Function number of southbridge device doing reset"
+end
define MEMORY_HOLE
default none
export used
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
uses HAVE_HARD_RESET
+uses HARD_RESET_BUS
+uses HARD_RESET_DEVICE
+uses HARD_RESET_FUNCTION
uses IRQ_SLOT_COUNT
uses HAVE_OPTION_TABLE
uses CONFIG_MAX_CPUS
##
default HAVE_HARD_RESET=1
+default HARD_RESET_BUS=1
+default HARD_RESET_DEVICE=4
+default HARD_RESET_FUNCTION=0
+
##
## Build code to export a programmable irq routing table
##
#object static_devices.o
if HAVE_MP_TABLE object mptable.o end
if HAVE_PIRQ_TABLE object irq_tables.o end
-object reset.o
##
## Romcc output
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
uses HAVE_HARD_RESET
+uses HARD_RESET_BUS
+uses HARD_RESET_DEVICE
+uses HARD_RESET_FUNCTION
uses IRQ_SLOT_COUNT
uses HAVE_OPTION_TABLE
uses CONFIG_MAX_CPUS
##
default HAVE_HARD_RESET=1
+default HARD_RESET_BUS=1
+default HARD_RESET_DEVICE=4
+default HARD_RESET_FUNCTION=0
+
##
## Build code to export a programmable irq routing table
##
#object static_devices.o
if HAVE_MP_TABLE object mptable.o end
if HAVE_PIRQ_TABLE object irq_tables.o end
-object reset.o
##
## Romcc output
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
uses HAVE_HARD_RESET
+uses HARD_RESET_BUS
+uses HARD_RESET_DEVICE
+uses HARD_RESET_FUNCTION
uses IRQ_SLOT_COUNT
uses HAVE_OPTION_TABLE
uses CONFIG_MAX_CPUS
##
default HAVE_HARD_RESET=1
+default HARD_RESET_BUS=1
+default HARD_RESET_DEVICE=4
+default HARD_RESET_FUNCTION=0
+
##
## Build code to export a programmable irq routing table
##
driver mainboard.o
if HAVE_MP_TABLE object mptable.o end
if HAVE_PIRQ_TABLE object irq_tables.o end
-object reset.o
##
## Romcc output
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
uses HAVE_HARD_RESET
+uses HARD_RESET_BUS
+uses HARD_RESET_DEVICE
+uses HARD_RESET_FUNCTION
uses IRQ_SLOT_COUNT
uses HAVE_OPTION_TABLE
uses CONFIG_MAX_CPUS
##
default HAVE_HARD_RESET=1
+default HARD_RESET_BUS=1
+default HARD_RESET_DEVICE=5
+default HARD_RESET_FUNCTION=0
+
##
## Build code to export a programmable irq routing table
##
##
## Clean up the motherboard id strings
##
-#default MAINBOARD_PART_NUMBER="SOLO7"
-#default MAINBOARD_VENDOR="AMD"
+default MAINBOARD_PART_NUMBER="SOLO"
+default MAINBOARD_VENDOR="AMD"
###
### LinuxBIOS layout values
driver mainboard.o
if HAVE_MP_TABLE object mptable.o end
if HAVE_PIRQ_TABLE object irq_tables.o end
-object reset.o
##
## Romcc output
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
uses HAVE_HARD_RESET
+uses HARD_RESET_BUS
+uses HARD_RESET_DEVICE
+uses HARD_RESET_FUNCTION
uses IRQ_SLOT_COUNT
uses HAVE_OPTION_TABLE
uses CONFIG_MAX_CPUS
##
default HAVE_HARD_RESET=1
+default HARD_RESET_BUS=1
+default HARD_RESET_DEVICE=4
+default HARD_RESET_FUNCTION=0
+
##
## Build code to export a programmable irq routing table
##
driver mainboard.o
if HAVE_MP_TABLE object mptable.o end
if HAVE_PIRQ_TABLE object irq_tables.o end
-object reset.o
##
## Romcc output
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
uses HAVE_HARD_RESET
+uses HARD_RESET_BUS
+uses HARD_RESET_DEVICE
+uses HARD_RESET_FUNCTION
uses IRQ_SLOT_COUNT
uses HAVE_OPTION_TABLE
uses CONFIG_MAX_CPUS
##
default HAVE_HARD_RESET=1
+default HARD_RESET_BUS=1
+default HARD_RESET_DEVICE=4
+default HARD_RESET_FUNCTION=0
+
##
## Build code to export a programmable irq routing table
##
driver mainboard.o
if HAVE_MP_TABLE object mptable.o end
if HAVE_PIRQ_TABLE object irq_tables.o end
-object reset.o
##
## Romcc output
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
uses HAVE_HARD_RESET
+uses HARD_RESET_BUS
+uses HARD_RESET_DEVICE
+uses HARD_RESET_FUNCTION
uses IRQ_SLOT_COUNT
uses HAVE_OPTION_TABLE
uses CONFIG_MAX_CPUS
##
default HAVE_HARD_RESET=1
+default HARD_RESET_BUS=1
+default HARD_RESET_DEVICE=4
+default HARD_RESET_FUNCTION=0
+
##
## Build code to export a programmable irq routing table
##
driver blade3d.o
if HAVE_MP_TABLE object mptable.o end
if HAVE_PIRQ_TABLE object irq_tables.o end
-object reset.o
##
## Romcc output
uses USE_FALLBACK_IMAGE
uses MAINBOARD
uses ARCH
+uses HARD_RESET_BUS
+uses HARD_RESET_DEVICE
+uses HARD_RESET_FUNCTION
#
#
###
driver promise_sata.o
driver intel_nic.o
driver broadcom_nic.o
-object reset.o
+#object reset.o
#object static_devices.o
if HAVE_MP_TABLE object mptable.o end
if HAVE_PIRQ_TABLE object irq_tables.o end
#
+default HARD_RESET_BUS=1
+default HARD_RESET_DEVICE=2
+default HARD_RESET_FUNCTION=0
+#
arch i386 end
#cpu k8 end
#
uses LB_CKS_LOC
uses MAINBOARD
uses ARCH
+uses HARD_RESET_BUS
+uses HARD_RESET_DEVICE
+uses HARD_RESET_FUNCTION
#
#
###
#driver adaptec_scsi.o
#driver promise_sata.o
#driver intel_nic.o
-object reset.o
+#object reset.o
if HAVE_MP_TABLE object mptable.o end
if HAVE_PIRQ_TABLE object irq_tables.o end
#
+default HARD_RESET_BUS=1
+default HARD_RESET_DEVICE=4
+default HARD_RESET_FUNCTION=0
+#
arch i386 end
#
###
uses LB_CKS_LOC
uses MAINBOARD
uses ARCH
+uses HARD_RESET_BUS
+uses HARD_RESET_DEVICE
+uses HARD_RESET_FUNCTION
#
#
###
#driver si_sata.o
#driver intel_nic.o
#driver broadcom_nic.o
-object reset.o
+#object reset.o
if HAVE_MP_TABLE object mptable.o end
if HAVE_PIRQ_TABLE object irq_tables.o end
#
+default HARD_RESET_BUS=1
+default HARD_RESET_DEVICE=4
+default HARD_RESET_FUNCTION=0
+#
arch i386 end
#cpu k8 end
#
uses LB_CKS_LOC
uses MAINBOARD
uses ARCH
+uses HARD_RESET_BUS
+uses HARD_RESET_DEVICE
+uses HARD_RESET_FUNCTION
#
#
###
#driver si_sata.o
driver intel_nic.o
#driver broadcom_nic.o
-object reset.o
+#object reset.o
if HAVE_MP_TABLE object mptable.o end
if HAVE_PIRQ_TABLE object irq_tables.o end
#
+default HARD_RESET_BUS=1
+default HARD_RESET_DEVICE=4
+default HARD_RESET_FUNCTION=0
+#
arch i386 end
#cpu k8 end
#
uses LB_CKS_LOC
uses MAINBOARD
uses ARCH
+uses HARD_RESET_BUS
+uses HARD_RESET_DEVICE
+uses HARD_RESET_FUNCTION
#
#
#driver adaptec_scsi.o
#driver si_sata.o
#driver intel_nic.o
-object reset.o
+#object reset.o
if HAVE_MP_TABLE object mptable.o end
if HAVE_PIRQ_TABLE object irq_tables.o end
-
+#
+default HARD_RESET_BUS=3
+default HARD_RESET_DEVICE=4
+default HARD_RESET_FUNCTION=0
+#
#
arch i386 end
uses LB_CKS_LOC
uses MAINBOARD
uses ARCH
+uses HARD_RESET_BUS
+uses HARD_RESET_DEVICE
+uses HARD_RESET_FUNCTION
#
#
###
#driver adaptec_scsi.o
#driver si_sata.o
#driver intel_nic.o
-object reset.o
+#object reset.o
if HAVE_MP_TABLE object mptable.o end
if HAVE_PIRQ_TABLE object irq_tables.o end
#
+default HARD_RESET_BUS=1
+default HARD_RESET_DEVICE=4
+default HARD_RESET_FUNCTION=0
+#
arch i386 end
#cpu k8 end
#
driver amd8111_ac97.o
driver amd8111_nic.o
driver amd8111_pci.o
+object amd8111_reset.o
--- /dev/null
+#include <arch/io.h>
+
+#define PCI_DEV(BUS, DEV, FN) ( \
+ (((BUS) & 0xFF) << 16) | \
+ (((DEV) & 0x1f) << 11) | \
+ (((FN) & 0x7) << 8))
+
+#define AMD8111_RESET PCI_DEV( \
+ HARD_RESET_BUS, \
+ HARD_RESET_DEVICE, \
+ HARD_RESET_FUNCTION)
+
+typedef unsigned device_t;
+
+static void pci_write_config8(device_t dev, unsigned where, unsigned char value)
+{
+ unsigned addr;
+ addr = dev | where;
+ outl(0x80000000 | (addr & ~3), 0xCF8);
+ outb(value, 0xCFC + (addr & 3));
+}
+
+static void pci_write_config32(device_t dev, unsigned where, unsigned value)
+{
+ unsigned addr;
+ addr = dev | where;
+ outl(0x80000000 | (addr & ~3), 0xCF8);
+ outl(value, 0xCFC);
+}
+
+static unsigned pci_read_config32(device_t dev, unsigned where)
+{
+ unsigned addr;
+ addr = dev | where;
+ outl(0x80000000 | (addr & ~3), 0xCF8);
+ return inl(0xCFC);
+}
+
+#include "../../../northbridge/amd/amdk8/reset_test.c"
+
+void hard_reset(void)
+{
+ set_bios_reset();
+ pci_write_config8(AMD8111_RESET, 0x47, 1);
+}
projects / coreboot.git / commitdiff