* mini-ops.h: Kill diplicated ops OP_SHUFLEPS.
* cpu-x86.md: Same.
* mini-x86.c: Same.
* simd-intrinsics.c: Same.
svn path=/trunk/mono/; revision=118778
* mini-ppc.c, cpu-ppc.md: Reserve space for the parameter area in
filters.
+2008-11-13 Rodrigo Kumpera <rkumpera@novell.com>
+
+ * mini-ops.h: Kill diplicated ops OP_SHUFLEPS.
+
+ * cpu-x86.md: Same.
+
+ * mini-x86.c: Same.
+
+ * simd-intrinsics.c: Same.
+
2008-11-13 Rodrigo Kumpera <rkumpera@novell.com>
* simd-intrinsics.c: Enable constructor intrinsics for all types.
sqrtps: dest:x src1:x len:4
rsqrtps: dest:x src1:x len:4
rcpps: dest:x src1:x len:4
-shuffleps: dest:x src1:x len:5
pshufflew_high: dest:x src1:x len:5
pshufflew_low: dest:x src1:x len:5
MINI_OP(OP_RSQRTPS, "rsqrtps", XREG, XREG, NONE)
MINI_OP(OP_SQRTPS, "sqrtps", XREG, XREG, NONE)
MINI_OP(OP_RCPPS, "rcpps", XREG, XREG, NONE)
-MINI_OP(OP_SHUFLEPS, "shuffleps", XREG, XREG, NONE)
MINI_OP(OP_PSHUFLEW_HIGH, "pshufflew_high", XREG, XREG, NONE)
MINI_OP(OP_PSHUFLEW_LOW, "pshufflew_low", XREG, XREG, NONE)
case OP_DUPPS_LOW:
x86_sse_alu_ss_reg_reg (code, X86_SSE_MOVSLDUP, ins->dreg, ins->sreg1);
break;
- case OP_SHUFLEPS:
- g_assert (ins->inst_c0 >= 0 && ins->inst_c0 <= 0xFF);
- x86_pshufd_reg_reg (code, ins->dreg, ins->sreg1, ins->inst_c0);
- break;
case OP_PSHUFLEW_HIGH:
g_assert (ins->inst_c0 >= 0 && ins->inst_c0 <= 0xFF);
{ SN_PrefetchTemporal2ndLevelCache, 0, SIMD_EMIT_PREFETCH, SIMD_VERSION_SSE1, SIMD_PREFETCH_MODE_2 },
{ SN_PrefetchNonTemporal, 0, SIMD_EMIT_PREFETCH, SIMD_VERSION_SSE1, SIMD_PREFETCH_MODE_NTA },
{ SN_Reciprocal, OP_RCPPS, SIMD_EMIT_UNARY },
- { SN_Shuffle, OP_SHUFLEPS, SIMD_EMIT_SHUFFLE },
+ { SN_Shuffle, OP_PSHUFLED, SIMD_EMIT_SHUFFLE },
{ SN_Sqrt, OP_SQRTPS, SIMD_EMIT_UNARY },
{ SN_StoreAligned, OP_STOREX_ALIGNED_MEMBASE_REG, SIMD_EMIT_STORE },
{ SN_StoreNonTemporal, OP_STOREX_NTA_MEMBASE_REG, SIMD_EMIT_STORE },
vreg = load_simd_vreg (cfg, cmethod, args [0]);
if (intrinsic->opcode) {
- MONO_INST_NEW (cfg, ins, OP_SHUFLEPS);
+ MONO_INST_NEW (cfg, ins, OP_PSHUFLED);
ins->klass = cmethod->klass;
ins->sreg1 = vreg;
ins->inst_c0 = intrinsic->opcode;