+
+Mon Sep 6 05:50:02 PDT 2004 Paolo Molaro <lupus@ximian.com>
+
+ * mini-*.c, mini-ops.h, inssel-long32.brg: introduced
+ OP_ADDCC_IMM and OP_SUBCC_IMM (add/sub immediate that will
+ set the carry/borrow flag). The sparc and s390 implementations
+ can now use optimized versions (and simplify the code). ppc bugfixes.
+
2004-09-06 Zoltan Varga <vargaz@freemail.hu>
* exceptions-ppc.c (mono_arch_find_jit_info): Fix memory leak.
return 1;
}
+ static int test_4_addcc_imm () {
+ long a = 3;
+ long b = 0;
+ return (int)(a - b + 1);
+ }
+
static int test_5_sub () {
long a = 8;
long b = 3;
addcc: dest:i src1:i src2:i len:4
subcc: dest:i src1:i src2:i len:4
adc_imm: dest:i src1:i len:12
+addcc_imm: dest:i src1:i len:12
+subcc_imm: dest:i src1:i len:12
sbb: dest:i src1:i src2:i len:4
sbb_imm: dest:i src1:i len:12
br_reg: src1:i len:8
loadr8_spill_membase: src1:b len:8
loadu4_mem: dest:i len:9
move: dest:i src1:i len:2
+addcc_imm: dest:i src1:i len:6 clob:1
add_imm: dest:i src1:i len:6 clob:1
+subcc_imm: dest:i src1:i len:6 clob:1
sub_imm: dest:i src1:i len:6 clob:1
mul_imm: dest:i src1:i len:6
# there is no actual support for division or reminder by immediate
add.ovf: len: 24 dest:i src1:i src2:i
add: dest:i src1:i src2:i len:4 clob:1
add_imm: dest:i src1:i len:18
+addcc_imm: dest:i src1:i len:18
add_ovf_carry: dest:i src1:1 src2:i len:28
add_ovf_un_carry: dest:i src1:1 src2:i len:12
addcc: dest:i src1:i src2:i len:6
sub.ovf: len:24 dest:i src1:i src2:i
sub: dest:i src1:i src2:i len:4 clob:1
sub_imm: dest:i src1:i len:18
+subcc_imm: dest:i src1:i len:18
sub_ovf_carry: dest:i src1:1 src2:i len:28
sub_ovf_un_carry: dest:i src1:1 src2:i len:12
subcc: dest:i src1:i src2:i len:6
loadu4_mem: dest:i len:8
move: dest:i src1:i len:4
add_imm: dest:i src1:i len:64
+addcc_imm: dest:i src1:i len:64
sub_imm: dest:i src1:i len:64
+subcc_imm: dest:i src1:i len:64
mul_imm: dest:i src1:i len:64
div_imm: dest:a src1:i src2:i len:64
div_un_imm: dest:a src1:i src2:i len:64
}
lreg: OP_LADD (lreg, i8con) {
- MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, state->reg1, state->left->reg1, state->right->tree->inst_ls_word);
+ MONO_EMIT_NEW_BIALU_IMM (s, OP_ADDCC_IMM, state->reg1, state->left->reg1, state->right->tree->inst_ls_word);
MONO_EMIT_BIALU_IMM (s, tree, OP_ADC_IMM, state->reg2, state->left->reg2, state->right->tree->inst_ms_word);
}
}
lreg: OP_LSUB (lreg, i8con) {
- MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, state->reg1, state->left->reg1, state->right->tree->inst_ls_word);
+ MONO_EMIT_NEW_BIALU_IMM (s, OP_SUBCC_IMM, state->reg1, state->left->reg1, state->right->tree->inst_ls_word);
MONO_EMIT_BIALU_IMM (s, tree, OP_SBB_IMM, state->reg2, state->left->reg2, state->right->tree->inst_ms_word);
}
MINI_OP(OP_SBB, "sbb")
MINI_OP(OP_SBB_IMM, "sbb_imm")
MINI_OP(OP_ADDCC, "addcc")
+MINI_OP(OP_ADDCC_IMM, "addcc_imm")
MINI_OP(OP_SUBCC, "subcc")
+MINI_OP(OP_SUBCC_IMM, "subcc_imm")
MINI_OP(OP_BR_REG, "br_reg")
MINI_OP(OP_SEXT_I1, "sext_i1")
MINI_OP(OP_SEXT_I2, "sext_i2")
case OP_ADC:
ppc_adde (code, ins->dreg, ins->sreg1, ins->sreg2);
break;
+ case OP_ADDCC_IMM:
+ if (ppc_is_imm16 (ins->inst_imm)) {
+ ppc_addic (code, ins->dreg, ins->sreg1, ins->inst_imm);
+ } else {
+ ppc_load (code, ppc_r11, ins->inst_imm);
+ ppc_addc (code, ins->dreg, ins->sreg1, ppc_r11);
+ }
+ break;
case OP_ADD_IMM:
if (ppc_is_imm16 (ins->inst_imm)) {
ppc_addi (code, ins->dreg, ins->sreg1, ins->inst_imm);
case OP_SUBCC:
ppc_subfc (code, ins->dreg, ins->sreg2, ins->sreg1);
break;
+ case OP_SUBCC_IMM:
+ ppc_load (code, ppc_r11, ins->inst_imm);
+ ppc_subfc (code, ins->dreg, ppc_r11, ins->sreg1);
+ break;
case CEE_SUB:
ppc_subf (code, ins->dreg, ins->sreg2, ins->sreg1);
break;
break;
case OP_SBB_IMM:
ppc_load (code, ppc_r11, ins->inst_imm);
- ppc_subfe (code, ins->dreg, ins->sreg2, ppc_r11);
+ ppc_subfe (code, ins->dreg, ppc_r11, ins->sreg1);
break;
case OP_PPC_SUBFIC:
g_assert (ppc_is_imm16 (ins->inst_imm));
MonoInst* mono_arch_get_thread_intrinsic (MonoCompile* cfg)
{
return NULL;
-}
\ No newline at end of file
+}
s390_alcr (code, ins->dreg, ins->sreg2);
}
break;
+ case OP_ADDCC_IMM:
case OP_ADD_IMM: {
if ((ins->next) &&
(ins->next->opcode == OP_ADC_IMM)) {
s390_slbr (code, ins->dreg, ins->sreg2);
}
break;
+ case OP_SUBCC_IMM:
case OP_SUB_IMM: {
if (s390_is_imm16 (-ins->inst_imm)) {
if (ins->dreg != ins->sreg1) {
MonoInst* mono_arch_get_thread_intrinsic (MonoCompile* cfg)
{
return NULL;
-}
\ No newline at end of file
+}
case OP_IADD:
sparc_add (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
break;
+ case OP_ADDCC_IMM:
case OP_ADD_IMM:
case OP_IADD_IMM:
/* according to inssel-long32.brg, this should set cc */
case OP_ISUB:
sparc_sub (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
break;
+ case OP_SUBCC_IMM:
case OP_SUB_IMM:
case OP_ISUB_IMM:
/* according to inssel-long32.brg, this should set cc */
MonoInst* mono_arch_get_thread_intrinsic (MonoCompile* cfg)
{
return NULL;
-}
\ No newline at end of file
+}
case OP_ADC:
x86_alu_reg_reg (code, X86_ADC, ins->sreg1, ins->sreg2);
break;
+ case OP_ADDCC_IMM:
case OP_ADD_IMM:
x86_alu_reg_imm (code, X86_ADD, ins->dreg, ins->inst_imm);
break;
case OP_SBB:
x86_alu_reg_reg (code, X86_SBB, ins->sreg1, ins->sreg2);
break;
+ case OP_SUBCC_IMM:
case OP_SUB_IMM:
x86_alu_reg_imm (code, X86_SUB, ins->dreg, ins->inst_imm);
break;