Improve smp detection code.

Use 'lock incw' to ensure proper synchronization between cpus.
Jump to the 0xf0000 segment for the halt (to ensure halt code isn't overwritten).
Improve code comments.

diff --git a/src/romlayout.S b/src/romlayout.S
index 6eda03681874de5b0906854b051e2f5a49de9f90..3eaf725d69d13805ea607a93ee054c0569b4b212 100644 (file)
--- a/src/romlayout.S
+++ b/src/romlayout.S
@@ -318,6 +318,16 @@ post32:
 
         .code16gcc
 
+// Shutdown a CPU.  We want this in the 0xf000 section to ensure that
+// the code wont be overwritten with something else.  (Should
+// something spurious wake up the CPU, we want to be sure that the hlt
+// insn will still be present and will shutdown the CPU.)
+        .global permanent_halt
+permanent_halt:
+        cli
+1:      hlt
+        jmp 1b
+
 
 /****************************************************************
  * GDT and IDT tables

diff --git a/src/smpdetect.c b/src/smpdetect.c
index c0f09037238f2e2bfe72e38c03588b4ff8a28b62..db47943a8e7c43282fe8228fe8f8bebb940e1152 100644 (file)
--- a/src/smpdetect.c
+++ b/src/smpdetect.c
@@ -54,12 +54,12 @@ asm(
     "  .code16\n"
 
     "smp_ap_boot_code_start:\n"
-    "  xor %ax, %ax\n"
-    "  mov %ax, %ds\n"
-    "  incw " __stringify(BUILD_CPU_COUNT_ADDR) "\n"
-    "1:\n"
-    "  hlt\n"
-    "  jmp 1b\n"
+    // Increament the counter at BUILD_CPU_COUNT_ADDR
+    "  xorw %ax, %ax\n"
+    "  movw %ax, %ds\n"
+    "  lock incw " __stringify(BUILD_CPU_COUNT_ADDR) "\n"
+    // Halt the processor.
+    "  ljmpl $" __stringify(SEG_BIOS) ", $(permanent_halt - " __stringify(BUILD_BIOS_ADDR) ")\n"
     "smp_ap_boot_code_end:\n"
 
     "  .code32\n"