unsigned nb_cfg_54;
int bsp_apic_id = lapicid(); // bsp apicid
- get_option(&disable_siblings, "dual_core");
+ get_option(&disable_siblings, "multi_core");
//get the nodes number
dev = dev_find_slot(0, PCI_DEVFN(0x18,0));
/* On the bootstrap processor see if I want sibling cpus enabled */
if (first_time) {
first_time = 0;
- get_option(&disable_siblings, "dual_core");
+ get_option(&disable_siblings, "multi_core");
}
result = cpuid(0x80000008);
/* See how many sibling cpus we have */
unsigned nodeid;
if (CONFIG_HAVE_OPTION_TABLE &&
- read_option(CMOS_VSTART_dual_core, CMOS_VLEN_dual_core, 0) != 0) {
- return; // disable dual_core
+ read_option(CMOS_VSTART_multi_core, CMOS_VLEN_multi_core, 0) != 0) {
+ return; // disable multi_core
}
nodes = get_nodes();
disable_siblings = !CONFIG_LOGICAL_CPUS;
#if CONFIG_LOGICAL_CPUS == 1
- if(read_option(CMOS_VSTART_quad_core, CMOS_VLEN_quad_core, 0) != 0) { // 0 mean quad core
+ if(read_option(CMOS_VSTART_multi_core, CMOS_VLEN_multi_core, 0) != 0) { // 0 mean multi core
disable_siblings = 1;
}
#endif
disable_siblings = !CONFIG_LOGICAL_CPUS;
#if CONFIG_LOGICAL_CPUS == 1 && CONFIG_HAVE_OPTION_TABLE == 1
- if(read_option(CMOS_VSTART_dual_core, CMOS_VLEN_dual_core, 0) != 0) { // 0 mean dual core
+ if(read_option(CMOS_VSTART_multi_core, CMOS_VLEN_multi_core, 0) != 0) { // 0 mean multi core
disable_siblings = 1;
}
#endif
u32 disable_siblings = !CONFIG_LOGICAL_CPUS;
- get_option(&disable_siblings, "quad_core");
+ get_option(&disable_siblings, "multi_core");
siblings = get_max_siblings(sysconf.nodes);
u32 nodes;
u32 nodeid;
- // disable quad_core
- if (read_option(CMOS_VSTART_quad_core, CMOS_VLEN_quad_core, 0) != 0) {
+ // disable multi_core
+ if (read_option(CMOS_VSTART_multi_core, CMOS_VLEN_multi_core, 0) != 0) {
printk(BIOS_DEBUG, "Skip additional core init\n");
return;
}
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
1008 16 h 0 check_sum
enumerations
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 quad_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
-440 1 e 0 dcon_present
+432 8 h 0 boot_countdown
+440 1 e 0 dcon_present
1008 16 h 0 check_sum
enumerations
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
1008 16 h 0 check_sum
enumerations
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 quad_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
1008 16 h 0 check_sum
enumerations
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
- 399 1 e 2 dual_core
+ 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
1008 16 h 0 check_sum
enumerations
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
1008 16 h 0 check_sum
enumerations
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
728 256 h 0 user_data
984 16 h 0 check_sum
# Reserve the extended AMD configuration registers
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
1008 16 h 0 check_sum
enumerations
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
1008 16 h 0 check_sum
enumerations
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
1008 16 h 0 check_sum
enumerations
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
1008 16 h 0 check_sum
enumerations
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
1008 16 h 0 check_sum
enumerations
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
1008 16 h 0 check_sum
enumerations
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
1008 16 h 0 check_sum
enumerations
#95 1 r 0 disable_clock_updates
#96 288 r 0 temporary_filler
0 376 r 0 reserved_memory
-376 1 e 1 power_up_watchdog
+376 1 e 1 power_up_watchdog
384 1 e 4 boot_option
385 1 e 4 last_boot
386 1 e 1 ECC_memory
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
728 256 h 0 user_data
984 16 h 0 check_sum
# Reserve the extended AMD configuration registers
# NOTE: This file must be in UNIX format (not DOS) or build_opt_tbl fails:
-# "Error - Name is an invalid identifier in line"
+# "Error - Name is an invalid identifier in line"
entries
#start-bit length config config-ID name
-0 512 r 0 reserved_memory1 # We know nothing about the factory BIOS
-512 512 r 0 reserved_memory2 # More factory BIOS
+0 512 r 0 reserved_memory1 # We know nothing about the factory BIOS
+512 512 r 0 reserved_memory2 # More factory BIOS
# Work in progress.
# This is where we would put the LB RTC_BOOT_BYTE options once the code
# supports finding them there.
-#1024 1 e 4 boot_option
+#1024 1 e 4 boot_option
#1025 1 e 4 last_boot
#1026 1 e 1 ECC_memory
#1028 4 r 0 reboot_bits
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
1008 16 h 0 check_sum
enumerations
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
1008 16 h 0 check_sum
enumerations
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 quad_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
-440 1 e 0 dcon_present
+432 8 h 0 boot_countdown
+440 1 e 0 dcon_present
1008 16 h 0 check_sum
enumerations
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
-440 1 e 0 dcon_present
+432 8 h 0 boot_countdown
+440 1 e 0 dcon_present
1008 16 h 0 check_sum
enumerations
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
1008 16 h 0 check_sum
enumerations
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 quad_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 quad_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
728 256 h 0 user_data
984 16 h 0 check_sum
# Reserve the extended AMD configuration registers
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
728 256 h 0 user_data
984 16 h 0 check_sum
# Reserve the extended AMD configuration registers
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
728 256 h 0 user_data
984 16 h 0 check_sum
# Reserve the extended AMD configuration registers
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
728 256 h 0 user_data
984 16 h 0 check_sum
# Reserve the extended AMD configuration registers
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
728 256 h 0 user_data
984 16 h 0 check_sum
# Reserve the extended AMD configuration registers
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
1008 16 h 0 check_sum
enumerations
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
#440 4 e 9 slow_cpu
444 1 e 1 nmi
728 256 h 0 user_data
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 quad_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
-399 1 e 2 dual_core
+399 1 e 2 multi_core
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
1008 16 h 0 check_sum
enumerations
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
1008 16 h 0 check_sum
enumerations
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
1008 16 h 0 check_sum
enumerations
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
1008 16 h 0 check_sum
enumerations
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
1008 16 h 0 check_sum
enumerations
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
-432 8 h 0 boot_countdown
+432 8 h 0 boot_countdown
1008 16 h 0 check_sum
enumerations
disable_siblings = !CONFIG_LOGICAL_CPUS;
#if CONFIG_LOGICAL_CPUS == 1
- get_option(&disable_siblings, "quad_core");
+ get_option(&disable_siblings, "multi_core");
#endif
// for pre_e0, nb_cfg_54 can not be set, ( even set, when you read it
unsigned total_cpus;
if ((!CONFIG_HAVE_OPTION_TABLE) ||
- read_option(CMOS_VSTART_dual_core, CMOS_VLEN_dual_core, 0) == 0) { /* dual_core */
+ read_option(CMOS_VSTART_multi_core, CMOS_VLEN_multi_core, 0) == 0) { /* multi_core */
total_cpus = verify_dualcore(nodes);
}
else {
disable_siblings = !CONFIG_LOGICAL_CPUS;
#if CONFIG_LOGICAL_CPUS == 1
- get_option(&disable_siblings, "dual_core");
+ get_option(&disable_siblings, "multi_core");
#endif
// for pre_e0, nb_cfg_54 can not be set, ( even set, when you read it still be 0)