Changes:
- $Id: arch.h 2626 2005-06-09 20:36:48Z twisti $
+ $Id: arch.h 3002 2005-07-12 16:02:45Z twisti $
*/
#define USEBUILTINTABLE
-#define SUPPORT_DIVISION 0
+#define SUPPORT_DIVISION 1
#define SUPPORT_LONG 1
#define SUPPORT_FLOAT 1
#define SUPPORT_DOUBLE 1
#define SUPPORT_LONG_LOGICAL 1
#define SUPPORT_LONG_SHIFT 1
#define SUPPORT_LONG_MUL 1
-#define SUPPORT_LONG_DIV 0
+#define SUPPORT_LONG_DIV 1
#define SUPPORT_LONG_ICVT 0
#define SUPPORT_LONG_FCVT 1
Changes: Christian Thalinger
- $Id: asmpart.S 2714 2005-06-15 14:12:59Z twisti $
+ $Id: asmpart.S 3002 2005-07-12 16:02:45Z twisti $
*/
#include "config.h"
+
#include "vm/jit/mips/offsets.h"
#include "vm/jit/mips/asmoffsets.h"
#include "vm/jit/mips/md-asm.h"
.globl asm_calljavafunction2double
.globl asm_call_jit_compiler
- .globl asm_dumpregistersandcall
.globl asm_handle_exception
.globl asm_handle_nat_exception
.globl asm_wrapper_patcher
- .globl asm_builtin_arraycheckcast
- .globl asm_builtin_aastore
-
- .globl asm_builtin_idiv
- .globl asm_builtin_irem
- .globl asm_builtin_ldiv
- .globl asm_builtin_lrem
-
.globl asm_perform_threadswitch
.globl asm_initialize_thread_stack
.globl asm_switchstackandcall
move t0,a3
move s7,a1
-
blez s7,calljava_argsloaded
+
ald a0,offjniitem(t0)
ldc1 fa0,offjniitem(t0)
daddi s7,s7,-1
ald itmp1,4*8(t8) /* pass method pointer via itmp1 */
ala mptr,asm_call_jit_compiler/* fake virtual function call (2 instr) */
- ast mptr,16(sp) /* store function address */
- ala mptr,8(t8) /* set method pointer */
+ ast mptr,2*8(sp) /* store function address */
+ ala mptr,1*8(sp) /* set method pointer */
.set noreorder
- ald pv,8(mptr) /* method call as in Java */
+ ald pv,1*8(mptr) /* method call as in Java */
jalr pv /* call JIT compiler */
nop
aaddiu pv,ra,-76*4 /* recompute procedure vector */
.ent asm_wrapper_patcher
asm_wrapper_patcher:
- daddiu sp,sp,-(16+21+4+1)*8 /* create stack frame */
+ aaddiu sp,sp,-(16+21+4+1)*8 /* create stack frame */
SAVE_ARGUMENT_REGISTERS(0) /* save 8 int/8 float argument registers */
SAVE_TEMPORARY_REGISTERS(16) /* save 5 int/16 float temporary registers */
- sd itmp1,(16+21+0)*8(sp) /* save itmp1 */
- sd itmp2,(16+21+1)*8(sp) /* save itmp2 */
- sd ra,(16+21+2+1)*8(sp) /* save method return address (for leafs) */
- sd pv,(16+21+3+1)*8(sp) /* save pv of calling java function */
+ ast itmp1,(16+21+0)*8(sp) /* save itmp1 */
+ ast itmp2,(16+21+1)*8(sp) /* save itmp2 */
+ ast ra,(16+21+2+1)*8(sp) /* save method return address (for leafs) */
+ ast pv,(16+21+3+1)*8(sp) /* save pv of calling java function */
- daddiu a0,sp,(1+16+21+4+1)*8 /* pass sp, skip patcher function pointer */
- ld itmp3,(0+16+21+4+1)*8(sp) /* get function pointer */
+ aaddiu a0,sp,(0+16+21+4+1)*8 /* pass sp */
+ ald itmp3,(0+16+21+4+1)*8(sp) /* get function pointer */
+ ald itmp1,(16+21+3+1)*8(sp) /* save pv to the position of fp */
+ ast itmp1,(0+16+21+4+1)*8(sp)
jalr itmp3
RESTORE_ARGUMENT_REGISTERS(0) /* restore 8 int/8 float argument registers */
RESTORE_TEMPORARY_REGISTERS(16) /* restore 5 int/16 float temporary reg. */
- ld itmp1,(16+21+0)*8(sp) /* restore itmp1 */
- ld itmp2,(16+21+1)*8(sp) /* restore itmp2 */
- ld ra,(16+21+2+1)*8(sp) /* restore method return address (for leafs)*/
- ld pv,(16+21+3+1)*8(sp) /* restore pv of calling java function */
+ ald itmp1,(16+21+0)*8(sp) /* restore itmp1 */
+ ald itmp2,(16+21+1)*8(sp) /* restore itmp2 */
+ ald ra,(16+21+2+1)*8(sp) /* restore method return address (for leafs)*/
+ ald pv,(16+21+3+1)*8(sp) /* restore pv of calling java function */
- ld itmp3,(4+16+21+4+1)*8(sp) /* get return address (into JIT code) */
- daddiu sp,sp,(5+16+21+4+1)*8 /* remove stack frame */
+ ald itmp3,(4+16+21+4+1)*8(sp) /* get return address (into JIT code) */
+ aaddiu sp,sp,(5+16+21+4+1)*8 /* remove stack frame */
beqz v0,L_asm_wrapper_patcher_exception
.end asm_wrapper_patcher
-/************************ function asm_builtin_idiv ****************************
-* *
-* Does null check and calls idiv or throws an exception *
-* *
-*******************************************************************************/
-
- .ent asm_builtin_idiv
-
-asm_builtin_idiv:
- beqz a1,nb_idiv /* if (null) throw exception */
- ala itmp3,builtin_idiv /* else call builtin_idiv */
- j itmp3
-
-nb_idiv:
- daddiu sp,sp,-2*8
- sd ra,0*8(sp)
- jal new_arithmeticexception
- move xptr,v0
- ld ra,0*8(sp)
- daddiu sp,sp,2*8
-
- aaddiu xpc,ra,-4 /* faulting address is return adress - 4*/
- b asm_handle_nat_exception
-
- .end asm_builtin_idiv
-
-
-/************************ function asm_builtin_ldiv ****************************
-* *
-* Does null check and calls ldiv or throws an exception *
-* *
-*******************************************************************************/
-
- .ent asm_builtin_ldiv
-
-asm_builtin_ldiv:
- beqz a1,nb_ldiv /* if (null) throw exception */
- ala itmp3,builtin_ldiv /* else call builtin_ldiv */
- j itmp3
-
-nb_ldiv:
- daddiu sp,sp,-2*8
- sd ra,0*8(sp)
- jal new_arithmeticexception
- move xptr,v0
- ld ra,0*8(sp)
- daddiu sp,sp,2*8
-
- aaddiu xpc,ra,-4 /* faulting address is return adress - 4*/
- b asm_handle_nat_exception
-
- .end asm_builtin_ldiv
-
-
-/************************ function asm_builtin_irem ****************************
-* *
-* Does null check and calls irem or throws an exception *
-* *
-*******************************************************************************/
-
- .ent asm_builtin_irem
-
-asm_builtin_irem:
- beqz a1,nb_irem /* if (null) throw exception */
- ala t9,builtin_irem /* else call builtin_irem */
- j t9
-
-nb_irem:
- daddiu sp,sp,-2*8
- sd ra,0*8(sp)
- jal new_arithmeticexception
- move xptr,v0
- ld ra,0*8(sp)
- daddiu sp,sp,2*8
-
- aaddiu xpc,ra,-4 /* faulting address is return adress - 4*/
- b asm_handle_nat_exception
-
- .end asm_builtin_irem
-
-
-/************************ function asm_builtin_lrem ****************************
-* *
-* Does null check and calls lrem or throws an exception *
-* *
-*******************************************************************************/
-
- .ent asm_builtin_lrem
-
-asm_builtin_lrem:
- beqz a1,nb_lrem /* if (null) throw exception */
- ala t9,builtin_lrem /* else call builtin_lrem */
- j t9
-
-nb_lrem:
- daddiu sp,sp,-2*8
- sd ra,0*8(sp)
- jal new_arithmeticexception
- move xptr,v0
- ld ra,0*8(sp)
- daddiu sp,sp,2*8
-
- aaddiu xpc,ra,-4 /* faulting address is return adress - 4*/
- b asm_handle_nat_exception
-
- .end asm_builtin_lrem
-
-
-/* asm_builtin_arraycheckcast **************************************************
-
- Does the cast check and eventually throws an exception.
-
-*******************************************************************************/
-
- .ent asm_builtin_arraycheckcast
-
-asm_builtin_arraycheckcast:
- aaddiu sp,sp,-16 /* allocate stack space */
- sd ra,0(sp) /* save return address */
- sd a0,8(sp) /* save object pointer */
- jal builtin_arraycheckcast /* builtin_arraycheckcast */
- beqz v0,nb_carray_throw /* if (false) throw exception */
- ld ra,0(sp) /* restore return address */
- ld v0,8(sp) /* return object pointer */
- aaddiu sp,sp,16 /* deallocate stack */
- j ra /* return */
-
-nb_carray_throw:
- jal new_classcastexception
- move xptr,v0
-
- ld ra,0(sp) /* restore return address */
- aaddiu sp,sp,16 /* free stack space */
- aaddiu xpc,ra,-4 /* faulting address is return adress - 4*/
- b asm_handle_nat_exception
-
- .end asm_builtin_arraycheckcast
-
-
-/******************* function asm_builtin_aastore ******************************
-* *
-* Does the cast check and eventually throws an exception *
-* a0 = arrayref, a1 = index, a2 = value *
-* *
-*******************************************************************************/
-
- .ent asm_builtin_aastore
-
-asm_builtin_aastore:
- beqz a0,nb_aastore_null /* if null pointer throw exception */
- lw t0,offarraysize(a0) /* load size */
- aaddiu sp,sp,-32 /* allocate stack space */
- sd ra,0(sp) /* save return address */
- asll t1,a1,ashift /* add index*8 to arrayref */
- aaddu t1,a0,t1 /* add index * ashift to arrayref */
- sltu t0,a1,t0 /* do bound check */
- beqz t0,nb_aastore_bound /* if out of bounds throw exception */
- move a1,a2 /* object is second argument */
- sd t1,8(sp) /* save store position */
- sd a1,16(sp) /* save object */
- jal builtin_canstore /* builtin_canstore(arrayref,object) */
- ld ra,0(sp) /* restore return address */
- ld a0,8(sp) /* restore store position */
- ld a1,16(sp) /* restore object */
- aaddiu sp,sp,32 /* free stack space */
- beqz v0,nb_aastore_store /* if (false) throw exception */
- ast a1,offobjarrdata(a0) /* store objectptr in array */
- j ra /* return */
-
-nb_aastore_null:
- daddiu sp,sp,-2*8
- sd ra,0*8(sp)
- jal new_nullpointerexception
- move xptr,v0
- ld ra,0*8(sp)
- daddiu sp,sp,2*8
-
- move xpc,ra /* faulting address is return adress */
- b asm_handle_nat_exception
-
-nb_aastore_bound:
- daddiu sp,sp,-2*8
- sd ra,0*8(sp)
- move a0,a1 /* move index into a0 */
- jal new_arrayindexoutofboundsexception
- move xptr,v0
- ld ra,0*8(sp)
- daddiu sp,sp,2*8
-
- aaddiu sp,sp,32 /* free stack space */
- move xpc,ra /* faulting address is return adress */
- b asm_handle_nat_exception
-
-nb_aastore_store:
- daddiu sp,sp,-2*8
- sd ra,0*8(sp)
- jal new_arraystoreexception
- move xptr,v0
- ld ra,0*8(sp)
- daddiu sp,sp,2*8
-
- move xpc,ra /* faulting address is return adress */
- b asm_handle_nat_exception
-
- .end asm_builtin_aastore
-
-
/******************* function asm_initialize_thread_stack **********************
* *
* u1* asm_initialize_thread_stack (void *func, u1 *stack); *
Reinhard Grafl
Changes: Christian Thalinger
- Christian Ullrich
+ Christian Ullrich
Contains the codegenerator for an MIPS (R4000 or higher) processor.
This module generates MIPS machine code for a sequence of
intermediate code commands (ICMDs).
- $Id: codegen.c 2860 2005-06-28 18:37:28Z twisti $
+ $Id: codegen.c 3002 2005-07-12 16:02:45Z twisti $
*/
void codegen(methodinfo *m, codegendata *cd, registerdata *rd)
{
- s4 len, s1, s2, s3, d;
+ s4 len, s1, s2, s3, d, disp;
ptrint a;
s4 parentargs_base;
s4 *mcodeptr;
var_to_reg_int(s1, src->prev, REG_ITMP1);
var_to_reg_int(s2, src, REG_ITMP2);
d = reg_of_var(rd, iptr->dst, REG_ITMP3);
+ gen_div_check(s2);
M_IDIV(s1, s2);
M_MFLO(d);
M_NOP;
M_NOP;
store_reg_to_var_int(iptr->dst, d);
break;
-#if 0
- case ICMD_IDIVCONST: /* ..., value ==> ..., value / constant */
- /* val.i = constant */
- var_to_reg_int(s1, src, REG_ITMP1);
- d = reg_of_var(rd, iptr->dst, REG_ITMP3);
- ICONST(REG_ITMP2, iptr->val.i);
- M_IDIV(s1, REG_ITMP2);
- M_MFLO(d);
- M_NOP;
- M_NOP;
- store_reg_to_var_int(iptr->dst, d);
- break;
-#endif
case ICMD_LDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
var_to_reg_int(s1, src->prev, REG_ITMP1);
var_to_reg_int(s2, src, REG_ITMP2);
d = reg_of_var(rd, iptr->dst, REG_ITMP3);
+ gen_div_check(s2);
M_LDIV(s1, s2);
M_MFLO(d);
M_NOP;
M_NOP;
store_reg_to_var_int(iptr->dst, d);
break;
-#if 0
- case ICMD_LDIVCONST: /* ..., value ==> ..., value / constant */
- /* val.l = constant */
- var_to_reg_int(s1, src, REG_ITMP1);
- d = reg_of_var(rd, iptr->dst, REG_ITMP3);
- LCONST(REG_ITMP2, iptr->val.l);
- M_LDIV(s1, REG_ITMP2);
- M_MFLO(d);
- M_NOP;
- M_NOP;
- store_reg_to_var_int(iptr->dst, d);
- break;
-#endif
case ICMD_IREM: /* ..., val1, val2 ==> ..., val1 % val2 */
var_to_reg_int(s1, src->prev, REG_ITMP1);
var_to_reg_int(s2, src, REG_ITMP2);
d = reg_of_var(rd, iptr->dst, REG_ITMP3);
+ gen_div_check(s2);
M_IDIV(s1, s2);
M_MFHI(d);
M_NOP;
M_NOP;
store_reg_to_var_int(iptr->dst, d);
break;
-#if 0
- case ICMD_IREMCONST: /* ..., value ==> ..., value % constant */
- /* val.i = constant */
- var_to_reg_int(s1, src, REG_ITMP1);
- d = reg_of_var(rd, iptr->dst, REG_ITMP3);
- ICONST(REG_ITMP2, iptr->val.i);
- M_IDIV(s1, REG_ITMP2);
- M_MFHI(d);
- M_NOP;
- M_NOP;
- store_reg_to_var_int(iptr->dst, d);
- break;
-#endif
case ICMD_LREM: /* ..., val1, val2 ==> ..., val1 % val2 */
var_to_reg_int(s1, src->prev, REG_ITMP1);
var_to_reg_int(s2, src, REG_ITMP2);
d = reg_of_var(rd, iptr->dst, REG_ITMP3);
+ gen_div_check(s2);
M_LDIV(s1, s2);
M_MFHI(d);
M_NOP;
M_NOP;
store_reg_to_var_int(iptr->dst, d);
break;
-#if 0
- case ICMD_LREMCONST: /* ..., value ==> ..., value % constant */
- /* val.l = constant */
- var_to_reg_int(s1, src, REG_ITMP1);
- d = reg_of_var(rd, iptr->dst, REG_ITMP3);
- LCONST(REG_ITMP2, iptr->val.l);
- M_LDIV(s1, REG_ITMP2);
- M_MFHI(d);
- M_NOP;
- M_NOP;
- store_reg_to_var_int(iptr->dst, d);
- break;
-#endif
case ICMD_IDIVPOW2: /* ..., value ==> ..., value << constant */
case ICMD_LDIVPOW2: /* val.i = constant */
if (iptr->op1 == 0) {
gen_nullptr_check(s1);
gen_bound_check;
- }
+ }
M_ASLL_IMM(s2, POINTERSHIFT, REG_ITMP2);
M_AADD(REG_ITMP2, s1, REG_ITMP1);
M_ALD(d, REG_ITMP1, OFFSET(java_objectarray, data[0]));
if (iptr->op1 == 0) {
gen_nullptr_check(s1);
gen_bound_check;
- }
+ }
M_ASLL_IMM(s2, 2, REG_ITMP2);
M_AADD(REG_ITMP2, s1, REG_ITMP1);
M_ILD(d, REG_ITMP1, OFFSET(java_intarray, data[0]));
if (iptr->op1 == 0) {
gen_nullptr_check(s1);
gen_bound_check;
- }
+ }
M_ASLL_IMM(s2, 3, REG_ITMP2);
M_AADD(REG_ITMP2, s1, REG_ITMP1);
M_LLD(d, REG_ITMP1, OFFSET(java_longarray, data[0]));
if (iptr->op1 == 0) {
gen_nullptr_check(s1);
gen_bound_check;
- }
+ }
M_ASLL_IMM(s2, 2, REG_ITMP2);
M_AADD(REG_ITMP2, s1, REG_ITMP1);
M_FLD(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
if (iptr->op1 == 0) {
gen_nullptr_check(s1);
gen_bound_check;
- }
+ }
M_ASLL_IMM(s2, 3, REG_ITMP2);
M_AADD(REG_ITMP2, s1, REG_ITMP1);
M_DLD(d, REG_ITMP1, OFFSET(java_doublearray, data[0]));
if (iptr->op1 == 0) {
gen_nullptr_check(s1);
gen_bound_check;
- }
+ }
M_AADD(s2, s1, REG_ITMP1);
M_AADD(s2, REG_ITMP1, REG_ITMP1);
M_SLDU(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
if (iptr->op1 == 0) {
gen_nullptr_check(s1);
gen_bound_check;
- }
+ }
M_AADD(s2, s1, REG_ITMP1);
M_AADD(s2, REG_ITMP1, REG_ITMP1);
M_SLDS(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
if (iptr->op1 == 0) {
gen_nullptr_check(s1);
gen_bound_check;
- }
+ }
M_AADD(s2, s1, REG_ITMP1);
M_BLDS(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
store_reg_to_var_int(iptr->dst, d);
break;
- case ICMD_AASTORE: /* ..., arrayref, index, value ==> ... */
-
- var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
- var_to_reg_int(s2, src->prev, REG_ITMP2);
- if (iptr->op1 == 0) {
- gen_nullptr_check(s1);
- gen_bound_check;
- }
- var_to_reg_int(s3, src, REG_ITMP3);
- M_ASLL_IMM(s2, POINTERSHIFT, REG_ITMP2);
- M_AADD(REG_ITMP2, s1, REG_ITMP1);
- M_AST(s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
- break;
-
case ICMD_IASTORE: /* ..., arrayref, index, value ==> ... */
var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
if (iptr->op1 == 0) {
gen_nullptr_check(s1);
gen_bound_check;
- }
+ }
var_to_reg_int(s3, src, REG_ITMP3);
M_ASLL_IMM(s2, 2, REG_ITMP2);
M_AADD(REG_ITMP2, s1, REG_ITMP1);
if (iptr->op1 == 0) {
gen_nullptr_check(s1);
gen_bound_check;
- }
+ }
var_to_reg_int(s3, src, REG_ITMP3);
M_ASLL_IMM(s2, 3, REG_ITMP2);
M_AADD(REG_ITMP2, s1, REG_ITMP1);
if (iptr->op1 == 0) {
gen_nullptr_check(s1);
gen_bound_check;
- }
+ }
var_to_reg_flt(s3, src, REG_FTMP3);
M_ASLL_IMM(s2, 2, REG_ITMP2);
M_AADD(REG_ITMP2, s1, REG_ITMP1);
if (iptr->op1 == 0) {
gen_nullptr_check(s1);
gen_bound_check;
- }
+ }
var_to_reg_flt(s3, src, REG_FTMP3);
M_ASLL_IMM(s2, 3, REG_ITMP2);
M_AADD(REG_ITMP2, s1, REG_ITMP1);
if (iptr->op1 == 0) {
gen_nullptr_check(s1);
gen_bound_check;
- }
+ }
var_to_reg_int(s3, src, REG_ITMP3);
M_AADD(s2, s1, REG_ITMP1);
M_AADD(s2, REG_ITMP1, REG_ITMP1);
if (iptr->op1 == 0) {
gen_nullptr_check(s1);
gen_bound_check;
- }
+ }
var_to_reg_int(s3, src, REG_ITMP3);
M_AADD(s2, s1, REG_ITMP1);
M_BST(s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
break;
+ case ICMD_AASTORE: /* ..., arrayref, index, value ==> ... */
+
+ var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
+ var_to_reg_int(s2, src->prev, REG_ITMP2);
+/* if (iptr->op1 == 0) { */
+ gen_nullptr_check(s1);
+ gen_bound_check;
+/* } */
+ var_to_reg_int(s3, src, REG_ITMP3);
+
+ M_MOV(s1, rd->argintregs[0]);
+ M_MOV(s3, rd->argintregs[1]);
+ bte = iptr->val.a;
+ disp = dseg_addaddress(cd, bte->fp);
+ M_ALD(REG_ITMP3, REG_PV, disp);
+ M_JSR(REG_RA, REG_ITMP3);
+ M_NOP;
+
+ M_BEQZ(REG_RESULT, 0);
+ codegen_addxstorerefs(cd, mcodeptr);
+ M_NOP;
+
+ var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
+ var_to_reg_int(s2, src->prev, REG_ITMP2);
+ var_to_reg_int(s3, src, REG_ITMP3);
+ M_ASLL_IMM(s2, POINTERSHIFT, REG_ITMP2);
+ M_AADD(REG_ITMP2, s1, REG_ITMP1);
+ M_AST(s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
+ break;
+
+
case ICMD_IASTORECONST: /* ..., arrayref, index ==> ... */
var_to_reg_int(s1, src->prev, REG_ITMP1);
PATCHER_get_putstatic,
(unresolved_field *) iptr->target);
- if (showdisassemble) {
+ if (opt_showdisassemble) {
M_NOP; M_NOP;
}
codegen_addpatchref(cd, mcodeptr,
PATCHER_clinit, fi->class);
- if (showdisassemble) {
+ if (opt_showdisassemble) {
M_NOP; M_NOP;
}
}
PATCHER_get_putstatic,
(unresolved_field *) iptr->target);
- if (showdisassemble) {
+ if (opt_showdisassemble) {
M_NOP; M_NOP;
}
codegen_addpatchref(cd, mcodeptr,
PATCHER_clinit, fi->class);
- if (showdisassemble) {
+ if (opt_showdisassemble) {
M_NOP; M_NOP;
}
}
PATCHER_get_putstatic,
(unresolved_field *) iptr[1].target);
- if (showdisassemble) {
+ if (opt_showdisassemble) {
M_NOP; M_NOP;
}
codegen_addpatchref(cd, mcodeptr,
PATCHER_clinit, fi->class);
- if (showdisassemble) {
+ if (opt_showdisassemble) {
M_NOP; M_NOP;
}
}
PATCHER_get_putfield,
(unresolved_field *) iptr->target);
- if (showdisassemble) {
+ if (opt_showdisassemble) {
M_NOP; M_NOP;
}
PATCHER_get_putfield,
(unresolved_field *) iptr->target);
- if (showdisassemble) {
+ if (opt_showdisassemble) {
M_NOP; M_NOP;
}
PATCHER_get_putfield,
(unresolved_field *) iptr[1].target);
- if (showdisassemble) {
+ if (opt_showdisassemble) {
M_NOP; M_NOP;
}
if (iptr->target) {
codegen_addpatchref(cd, mcodeptr, bte->fp, iptr->target);
- if (showdisassemble) {
+ if (opt_showdisassemble) {
M_NOP; M_NOP;
}
codegen_addpatchref(cd, mcodeptr,
PATCHER_invokestatic_special, um);
- if (showdisassemble) {
+ if (opt_showdisassemble) {
M_NOP; M_NOP;
}
codegen_addpatchref(cd, mcodeptr,
PATCHER_invokevirtual, um);
- if (showdisassemble) {
+ if (opt_showdisassemble) {
M_NOP; M_NOP;
}
codegen_addpatchref(cd, mcodeptr,
PATCHER_invokeinterface, um);
- if (showdisassemble) {
+ if (opt_showdisassemble) {
M_NOP; M_NOP;
}
s2 = 8;
if (!super)
- s2 += (showdisassemble ? 2 : 0);
+ s2 += (opt_showdisassemble ? 2 : 0);
/* calculate class checkcast code size */
s3 = 10 /* 10 + (s1 == REG_ITMP1) */;
if (!super)
- s3 += (showdisassemble ? 2 : 0);
+ s3 += (opt_showdisassemble ? 2 : 0);
/* if class is not resolved, check which code to call */
if (!super) {
- M_BEQZ(s1, 5 + (showdisassemble ? 2 : 0) + s2 + 2 + s3);
+ M_BEQZ(s1, 5 + (opt_showdisassemble ? 2 : 0) + s2 + 2 + s3);
M_NOP;
codegen_addpatchref(cd, mcodeptr,
PATCHER_checkcast_instanceof_flags,
(constant_classref *) iptr->target);
- if (showdisassemble) {
+ if (opt_showdisassemble) {
M_NOP; M_NOP;
}
PATCHER_checkcast_instanceof_interface,
(constant_classref *) iptr->target);
- if (showdisassemble) {
+ if (opt_showdisassemble) {
M_NOP; M_NOP;
}
}
PATCHER_checkcast_instanceof_class,
(constant_classref *) iptr->target);
- if (showdisassemble) {
+ if (opt_showdisassemble) {
M_NOP; M_NOP;
}
}
}
break;
+ case ICMD_ARRAYCHECKCAST: /* ..., objectref ==> ..., objectref */
+ /* op1: 1... resolved, 0... not resolved */
+
+ var_to_reg_int(s1, src, rd->argintregs[0]);
+ M_INTMOVE(s1, rd->argintregs[0]);
+
+ bte = iptr->val.a;
+
+ if (!iptr->op1) {
+ codegen_addpatchref(cd, mcodeptr, bte->fp, iptr->target);
+
+ if (opt_showdisassemble) {
+ M_NOP; M_NOP;
+ }
+
+ a = 0;
+
+ } else {
+ a = (ptrint) bte->fp;
+ }
+
+ disp = dseg_addaddress(cd, iptr->target);
+ M_ALD(rd->argintregs[1], REG_PV, disp);
+ disp = dseg_addaddress(cd, a);
+ M_ALD(REG_ITMP3, REG_PV, disp);
+ M_JSR(REG_RA, REG_ITMP3);
+ M_NOP;
+
+ M_BEQZ(REG_RESULT, 0);
+ codegen_addxcastrefs(cd, mcodeptr);
+ M_NOP;
+
+ var_to_reg_int(s1, src, REG_ITMP1);
+ d = reg_of_var(rd, iptr->dst, s1);
+ M_INTMOVE(s1, d);
+ store_reg_to_var_int(iptr->dst, d);
+ break;
+
case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult */
/* op1: 0 == array, 1 == class */
/* val.a: (classinfo*) superclass */
s2 = 7;
if (!super)
- s2 += (showdisassemble ? 2 : 0);
+ s2 += (opt_showdisassemble ? 2 : 0);
/* calculate class instanceof code size */
s3 = 8;
if (!super)
- s3 += (showdisassemble ? 2 : 0);
+ s3 += (opt_showdisassemble ? 2 : 0);
M_CLR(d);
/* if class is not resolved, check which code to call */
if (!super) {
- M_BEQZ(s1, 5 + (showdisassemble ? 2 : 0) + s2 + 2 + s3);
+ M_BEQZ(s1, 5 + (opt_showdisassemble ? 2 : 0) + s2 + 2 + s3);
M_NOP;
codegen_addpatchref(cd, mcodeptr,
PATCHER_checkcast_instanceof_flags,
(constant_classref *) iptr->target);
- if (showdisassemble) {
+ if (opt_showdisassemble) {
M_NOP; M_NOP;
}
PATCHER_checkcast_instanceof_interface,
(constant_classref *) iptr->target);
- if (showdisassemble) {
+ if (opt_showdisassemble) {
M_NOP; M_NOP;
}
}
PATCHER_checkcast_instanceof_class,
(constant_classref *) iptr->target);
- if (showdisassemble) {
+ if (opt_showdisassemble) {
M_NOP; M_NOP;
}
}
codegen_addpatchref(cd, mcodeptr,
(functionptr) iptr->target, iptr->val.a);
- if (showdisassemble) {
+ if (opt_showdisassemble) {
M_NOP; M_NOP;
}
} /* for basic block */
{
+ s4 *xcodeptr;
+ branchref *bref;
+
+ /* generate ArithmeticException stubs */
+
+ xcodeptr = NULL;
+
+ for (bref = cd->xdivrefs; bref != NULL; bref = bref->next) {
+ if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) {
+ gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
+ bref->branchpos,
+ (u1 *) xcodeptr - cd->mcodebase - 4);
+ continue;
+ }
+
+ gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
+ bref->branchpos,
+ (u1 *) mcodeptr - cd->mcodebase);
+
+ MCODECHECK(12);
+
+ M_AADD_IMM(REG_PV, bref->branchpos - 4, REG_ITMP2_XPC);
+
+ if (xcodeptr != NULL) {
+ M_BR(xcodeptr - mcodeptr);
+ M_NOP;
+
+ } else {
+ xcodeptr = mcodeptr;
+
+ M_ASUB_IMM(REG_SP, 1 * 8, REG_SP);
+ M_AST(REG_ITMP2_XPC, REG_SP, 0 * 8);
+
+ a = dseg_addaddress(cd, new_arithmeticexception);
+ M_ALD(REG_ITMP3, REG_PV, a);
+ M_JSR(REG_RA, REG_ITMP3);
+ M_NOP;
+ M_MOV(REG_RESULT, REG_ITMP1_XPTR);
+
+ M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
+ M_AADD_IMM(REG_SP, 1 * 8, REG_SP);
+
+ a = dseg_addaddress(cd, asm_handle_exception);
+ M_ALD(REG_ITMP3, REG_PV, a);
+ M_JMP(REG_ITMP3);
+ M_NOP;
+ }
+ }
+
/* generate bound check stubs */
- s4 *xcodeptr = NULL;
- branchref *bref;
+ xcodeptr = NULL;
for (bref = cd->xboundrefs; bref != NULL; bref = bref->next) {
gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
}
}
+ /* generate ArithmeticException stubs */
+
+ xcodeptr = NULL;
+
+ for (bref = cd->xstorerefs; bref != NULL; bref = bref->next) {
+ if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) {
+ gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
+ bref->branchpos,
+ (u1 *) xcodeptr - cd->mcodebase - 4);
+ continue;
+ }
+
+ gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
+ bref->branchpos,
+ (u1 *) mcodeptr - cd->mcodebase);
+
+ MCODECHECK(12);
+
+ M_AADD_IMM(REG_PV, bref->branchpos - 4, REG_ITMP2_XPC);
+
+ if (xcodeptr != NULL) {
+ M_BR(xcodeptr - mcodeptr);
+ M_NOP;
+
+ } else {
+ xcodeptr = mcodeptr;
+
+ M_ASUB_IMM(REG_SP, 1 * 8, REG_SP);
+ M_AST(REG_ITMP2_XPC, REG_SP, 0 * 8);
+
+ a = dseg_addaddress(cd, new_arraystoreexception);
+ M_ALD(REG_ITMP3, REG_PV, a);
+ M_JSR(REG_RA, REG_ITMP3);
+ M_NOP;
+ M_MOV(REG_RESULT, REG_ITMP1_XPTR);
+
+ M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
+ M_AADD_IMM(REG_SP, 1 * 8, REG_SP);
+
+ a = dseg_addaddress(cd, asm_handle_exception);
+ M_ALD(REG_ITMP3, REG_PV, a);
+ M_JMP(REG_ITMP3);
+ M_NOP;
+ }
+ }
+
/* generate negative array size check stubs */
xcodeptr = NULL;
if ((m->flags & ACC_STATIC) && !m->class->initialized) {
codegen_addpatchref(cd, mcodeptr, PATCHER_clinit, m->class);
- if (showdisassemble) {
+ if (opt_showdisassemble) {
M_NOP; M_NOP;
}
}
M_TFLTMOVE(t, s1, s2);
} else {
s2 = nmd->params[j].regoff;
- M_DST(s1, REG_SP, s2 * 8);
+ if (IS_2_WORD_TYPE(t))
+ M_DST(s1, REG_SP, s2 * 8);
+ else
+ M_FST(s1, REG_SP, s2 * 8);
}
} else {
s1 = md->params[i].regoff + stackframesize;
s2 = nmd->params[j].regoff;
M_DLD(REG_FTMP1, REG_SP, s1 * 8);
- M_DST(REG_FTMP1, REG_SP, s2 * 8);
+ if (IS_2_WORD_TYPE(t))
+ M_DST(REG_FTMP1, REG_SP, s2 * 8);
+ else
+ M_FST(REG_FTMP1, REG_SP, s2 * 8);
}
}
}
if (f == NULL) {
codegen_addpatchref(cd, mcodeptr, PATCHER_resolve_native, m);
- if (showdisassemble) {
+ if (opt_showdisassemble) {
M_NOP; M_NOP;
}
}
Authors: Andreas Krall
- $Id: codegen.h 2715 2005-06-15 14:13:23Z twisti $
+ $Id: codegen.h 3002 2005-07-12 16:02:45Z twisti $
*/
M_NOP; \
}
+#define gen_div_check(r) \
+ M_BEQZ((r), 0); \
+ codegen_addxdivrefs(cd, mcodeptr); \
+ M_NOP;
+
/* MCODECHECK(icnt) */
Changes: Christian Thalinger
- $Id: md.c 2827 2005-06-25 13:43:51Z twisti $
+ $Id: md.c 3002 2005-07-12 16:02:45Z twisti $
*/
+#include <assert.h>
#include <signal.h>
#include <sys/fpu.h>
#include <sys/mman.h>
#include <unistd.h>
#include "config.h"
+
#include "vm/jit/mips/md-abi.h"
#include "vm/jit/mips/types.h"
}
+/* md_stacktrace_get_returnaddress *********************************************
+
+ Returns the return address of the current stackframe, specified by
+ the passed stack pointer and the stack frame size.
+
+*******************************************************************************/
+
+functionptr md_stacktrace_get_returnaddress(u1 *sp, u4 framesize)
+{
+ functionptr ra;
+
+ /* on MIPS the return address is located on the top of the stackframe */
+
+ ra = (functionptr) *((u1 **) (sp + framesize - SIZEOF_VOID_P));
+
+ return ra;
+}
+
+
+/* codegen_findmethod **********************************************************
+
+ Machine code:
+
+ 6b5b4000 jsr (pv)
+ 237affe8 lda pv,-24(ra)
+
+*******************************************************************************/
+
+functionptr codegen_findmethod(functionptr pc)
+{
+ u1 *ra;
+ u1 *pv;
+ u4 mcode;
+ s2 offset;
+
+ ra = (u1 *) pc;
+ pv = ra;
+
+ /* get offset of first instruction (lda) */
+
+ mcode = *((u4 *) ra);
+
+ if ((mcode >> 16) != 0x237a) {
+ log_text("No `lda pv,x(ra)' instruction found on return address!");
+ assert(0);
+ }
+
+ offset = (s2) (mcode & 0x0000ffff);
+ pv += offset;
+
+ /* check for second instruction (ldah) */
+
+ mcode = *((u4 *) (ra + 1 * 4));
+
+ if ((mcode >> 16) == 0x177b) {
+ offset = (s2) (mcode << 16);
+ pv += offset;
+ }
+
+ return (functionptr) pv;
+}
+
+
/*
* These are local overrides for various environment variables in Emacs.
* Please do not remove this and leave it at the end of the file, where
Changes:
- $Id: patcher.c 2708 2005-06-15 13:44:10Z twisti $
+ $Id: patcher.c 3002 2005-07-12 16:02:45Z twisti $
*/
/* get stuff from the stack */
- ra = (u1 *) *((ptrint *) (sp + 3 * 8));
- o = (java_objectheader *) *((ptrint *) (sp + 2 * 8));
- mcode = *((u8 *) (sp + 1 * 8));
- uf = (unresolved_field *) *((ptrint *) (sp + 0 * 8));
- pv = (u1 *) *((ptrint *) (sp - 2 * 8));
+ ra = (u1 *) *((ptrint *) (sp + 4 * 8));
+ o = (java_objectheader *) *((ptrint *) (sp + 3 * 8));
+ mcode = *((u8 *) (sp + 2 * 8));
+ uf = (unresolved_field *) *((ptrint *) (sp + 1 * 8));
+ pv = (u1 *) *((ptrint *) (sp + 0 * 8));
/* calculate and set the new return address */
ra = ra - 2 * 4;
- *((ptrint *) (sp + 3 * 8)) = (ptrint) ra;
+ *((ptrint *) (sp + 4 * 8)) = (ptrint) ra;
PATCHER_MONITORENTER;
/* if we show disassembly, we have to skip the nop's */
- if (showdisassemble)
+ if (opt_showdisassemble)
ra = ra + 2 * 4;
/* get the offset from machine instruction */
unresolved_field *uf;
fieldinfo *fi;
- ra = (u1 *) *((ptrint *) (sp + 3 * 8));
- o = (java_objectheader *) *((ptrint *) (sp + 2 * 8));
- mcode = *((u8 *) (sp + 1 * 8));
- uf = (unresolved_field *) *((ptrint *) (sp + 0 * 8));
+ ra = (u1 *) *((ptrint *) (sp + 4 * 8));
+ o = (java_objectheader *) *((ptrint *) (sp + 3 * 8));
+ mcode = *((u8 *) (sp + 2 * 8));
+ uf = (unresolved_field *) *((ptrint *) (sp + 1 * 8));
/* calculate and set the new return address */
ra = ra - 2 * 4;
- *((ptrint *) (sp + 3 * 8)) = (ptrint) ra;
+ *((ptrint *) (sp + 4 * 8)) = (ptrint) ra;
PATCHER_MONITORENTER;
/* if we show disassembly, we have to skip the nop's */
- if (showdisassemble)
+ if (opt_showdisassemble)
ra = ra + 2 * 4;
/* patch the field's offset */
/* get stuff from the stack */
- ra = (u1 *) *((ptrint *) (sp + 3 * 8));
- o = (java_objectheader *) *((ptrint *) (sp + 2 * 8));
- mcode = *((u8 *) (sp + 1 * 8));
- cr = (constant_classref *) *((ptrint *) (sp + 0 * 8));
- pv = (u1 *) *((ptrint *) (sp - 2 * 8));
+ ra = (u1 *) *((ptrint *) (sp + 4 * 8));
+ o = (java_objectheader *) *((ptrint *) (sp + 3 * 8));
+ mcode = *((u8 *) (sp + 2 * 8));
+ cr = (constant_classref *) *((ptrint *) (sp + 1 * 8));
+ pv = (u1 *) *((ptrint *) (sp + 0 * 8));
/* calculate and set the new return address */
ra = ra - (4 + 2 * 4);
- *((ptrint *) (sp + 3 * 8)) = (ptrint) ra;
+ *((ptrint *) (sp + 4 * 8)) = (ptrint) ra;
PATCHER_MONITORENTER;
/* if we show disassembly, we have to skip the nop's */
- if (showdisassemble)
+ if (opt_showdisassemble)
ra = ra + 2 * 4;
/* get the offset from machine instruction */
/* get stuff from the stack */
- ra = (u1 *) *((ptrint *) (sp + 3 * 8));
- o = (java_objectheader *) *((ptrint *) (sp + 2 * 8));
- mcode = *((u8 *) (sp + 1 * 8));
- cr = (constant_classref *) *((ptrint *) (sp + 0 * 8));
- pv = (u1 *) *((ptrint *) (sp - 2 * 8));
+ ra = (u1 *) *((ptrint *) (sp + 4 * 8));
+ o = (java_objectheader *) *((ptrint *) (sp + 3 * 8));
+ mcode = *((u8 *) (sp + 2 * 8));
+ cr = (constant_classref *) *((ptrint *) (sp + 1 * 8));
+ pv = (u1 *) *((ptrint *) (sp + 0 * 8));
/* calculate and set the new return address */
ra = ra - (4 + 2 * 4);
- *((ptrint *) (sp + 3 * 8)) = (ptrint) ra;
+ *((ptrint *) (sp + 4 * 8)) = (ptrint) ra;
PATCHER_MONITORENTER;
/* if we show disassembly, we have to skip the nop */
- if (showdisassemble)
+ if (opt_showdisassemble)
ra = ra + 2 * 4;
/* get the offset from machine instruction */
/* get stuff from the stack */
- ra = (u1 *) *((ptrint *) (sp + 3 * 8));
- o = (java_objectheader *) *((ptrint *) (sp + 2 * 8));
- mcode = *((u8 *) (sp + 1 * 8));
- cr = (constant_classref *) *((ptrint *) (sp + 0 * 8));
- pv = (u1 *) *((ptrint *) (sp - 2 * 8));
+ ra = (u1 *) *((ptrint *) (sp + 4 * 8));
+ o = (java_objectheader *) *((ptrint *) (sp + 3 * 8));
+ mcode = *((u8 *) (sp + 2 * 8));
+ cr = (constant_classref *) *((ptrint *) (sp + 1 * 8));
+ pv = (u1 *) *((ptrint *) (sp + 0 * 8));
/* calculate and set the new return address */
ra = ra - 2 * 4;
- *((ptrint *) (sp + 3 * 8)) = (ptrint) ra;
+ *((ptrint *) (sp + 4 * 8)) = (ptrint) ra;
PATCHER_MONITORENTER;
/* if we show disassembly, we have to skip the nop's */
- if (showdisassemble)
+ if (opt_showdisassemble)
ra = ra + 2 * 4;
/* get the offset from machine instruction */
Machine code:
- dfc5ffc0 ld a1,-64(s8)
<patched call position>
+ dfc5ffc0 ld a1,-64(s8)
dfd9ffb8 ld t9,-72(s8)
0320f809 jalr t9
00000000 nop
/* get stuff from the stack */
- ra = (u1 *) *((ptrint *) (sp + 3 * 8));
- o = (java_objectheader *) *((ptrint *) (sp + 2 * 8));
- mcode = *((u8 *) (sp + 1 * 8));
- cr = (constant_classref *) *((ptrint *) (sp + 0 * 8));
- pv = (u1 *) *((ptrint *) (sp - 2 * 8));
+ ra = (u1 *) *((ptrint *) (sp + 4 * 8));
+ o = (java_objectheader *) *((ptrint *) (sp + 3 * 8));
+ mcode = *((u8 *) (sp + 2 * 8));
+ cr = (constant_classref *) *((ptrint *) (sp + 1 * 8));
+ pv = (u1 *) *((ptrint *) (sp + 0 * 8));
/* calculate and set the new return address */
- ra = ra - 3 * 4;
- *((ptrint *) (sp + 3 * 8)) = (ptrint) ra;
+ ra = ra - 2 * 4;
+ *((ptrint *) (sp + 4 * 8)) = (ptrint) ra;
PATCHER_MONITORENTER;
/* patch back original code */
- *((u4 *) (ra + 1 * 4)) = mcode;
- *((u4 *) (ra + 2 * 4)) = mcode >> 32;
+ *((u4 *) (ra + 0 * 4)) = mcode;
+ *((u4 *) (ra + 1 * 4)) = mcode >> 32;
+
+ /* if we show disassembly, we have to skip the nop's */
+
+ if (opt_showdisassemble)
+ ra = ra + 2 * 4;
/* get the offset from machine instruction */
*((ptrint *) (pv + offset)) = (ptrint) c->vftbl;
- /* if we show disassembly, we have to skip the nop */
-
- if (showdisassemble)
- ra = ra + 2 * 4;
-
/* get the offset from machine instruction */
offset = (s2) (*((u4 *) (ra + 1 * 4)) & 0x0000ffff);
/* synchronize instruction cache */
- docacheflush(ra + 4, 2 * 4);
+ docacheflush(ra, 2 * 4);
PATCHER_MARK_PATCHED_MONITOREXIT;
/* get stuff from the stack */
- ra = (u1 *) *((ptrint *) (sp + 3 * 8));
- o = (java_objectheader *) *((ptrint *) (sp + 2 * 8));
- mcode = *((u8 *) (sp + 1 * 8));
- cr = (constant_classref *) *((ptrint *) (sp + 0 * 8));
- pv = (u1 *) *((ptrint *) (sp - 2 * 8));
+ ra = (u1 *) *((ptrint *) (sp + 4 * 8));
+ o = (java_objectheader *) *((ptrint *) (sp + 3 * 8));
+ mcode = *((u8 *) (sp + 2 * 8));
+ cr = (constant_classref *) *((ptrint *) (sp + 1 * 8));
+ pv = (u1 *) *((ptrint *) (sp + 0 * 8));
/* calculate and set the new return address */
ra = ra - 3 * 4;
- *((ptrint *) (sp + 3 * 8)) = (ptrint) ra;
+ *((ptrint *) (sp + 4 * 8)) = (ptrint) ra;
PATCHER_MONITORENTER;
/* if we show disassembly, we have to skip the nop's */
- if (showdisassemble)
+ if (opt_showdisassemble)
ra = ra + 2 * 4;
/* get the offset from machine instruction */
/* get stuff from the stack */
- ra = (u1 *) *((ptrint *) (sp + 3 * 8));
- o = (java_objectheader *) *((ptrint *) (sp + 2 * 8));
- mcode = *((u8 *) (sp + 1 * 8));
- um = (unresolved_method *) *((ptrint *) (sp + 0 * 8));
- pv = (u1 *) *((ptrint *) (sp - 2 * 8));
+ ra = (u1 *) *((ptrint *) (sp + 4 * 8));
+ o = (java_objectheader *) *((ptrint *) (sp + 3 * 8));
+ mcode = *((u8 *) (sp + 2 * 8));
+ um = (unresolved_method *) *((ptrint *) (sp + 1 * 8));
+ pv = (u1 *) *((ptrint *) (sp + 0 * 8));
/* calculate and set the new return address */
ra = ra - 2 * 4;
- *((ptrint *) (sp + 3 * 8)) = (ptrint) ra;
+ *((ptrint *) (sp + 4 * 8)) = (ptrint) ra;
PATCHER_MONITORENTER;
/* if we show disassembly, we have to skip the nop's */
- if (showdisassemble)
+ if (opt_showdisassemble)
ra = ra + 2 * 4;
/* get the offset from machine instruction */
/* get stuff from the stack */
- ra = (u1 *) *((ptrint *) (sp + 3 * 8));
- o = (java_objectheader *) *((ptrint *) (sp + 2 * 8));
- mcode = *((u8 *) (sp + 1 * 8));
- um = (unresolved_method *) *((ptrint *) (sp + 0 * 8));
+ ra = (u1 *) *((ptrint *) (sp + 4 * 8));
+ o = (java_objectheader *) *((ptrint *) (sp + 3 * 8));
+ mcode = *((u8 *) (sp + 2 * 8));
+ um = (unresolved_method *) *((ptrint *) (sp + 1 * 8));
/* calculate and set the new return address */
ra = ra - 2 * 4;
- *((ptrint *) (sp + 3 * 8)) = (ptrint) ra;
+ *((ptrint *) (sp + 4 * 8)) = (ptrint) ra;
PATCHER_MONITORENTER;
/* if we show disassembly, we have to skip the nop's */
- if (showdisassemble)
+ if (opt_showdisassemble)
ra = ra + 2 * 4;
/* patch vftbl index */
/* get stuff from the stack */
- ra = (u1 *) *((ptrint *) (sp + 3 * 8));
- o = (java_objectheader *) *((ptrint *) (sp + 2 * 8));
- mcode = *((u8 *) (sp + 1 * 8));
- um = (unresolved_method *) *((ptrint *) (sp + 0 * 8));
+ ra = (u1 *) *((ptrint *) (sp + 4 * 8));
+ o = (java_objectheader *) *((ptrint *) (sp + 3 * 8));
+ mcode = *((u8 *) (sp + 2 * 8));
+ um = (unresolved_method *) *((ptrint *) (sp + 1 * 8));
/* calculate and set the new return address */
ra = ra - 2 * 4;
- *((ptrint *) (sp + 3 * 8)) = (ptrint) ra;
+ *((ptrint *) (sp + 4 * 8)) = (ptrint) ra;
PATCHER_MONITORENTER;
/* if we show disassembly, we have to skip the nop's */
- if (showdisassemble)
+ if (opt_showdisassemble)
ra = ra + 2 * 4;
/* patch interfacetable index */
/* get stuff from the stack */
- ra = (u1 *) *((ptrint *) (sp + 3 * 8));
- o = (java_objectheader *) *((ptrint *) (sp + 2 * 8));
- mcode = *((u8 *) (sp + 1 * 8));
- cr = (constant_classref *) *((ptrint *) (sp + 0 * 8));
- pv = (u1 *) *((ptrint *) (sp - 2 * 8));
+ ra = (u1 *) *((ptrint *) (sp + 4 * 8));
+ o = (java_objectheader *) *((ptrint *) (sp + 3 * 8));
+ mcode = *((u8 *) (sp + 2 * 8));
+ cr = (constant_classref *) *((ptrint *) (sp + 1 * 8));
+ pv = (u1 *) *((ptrint *) (sp + 0 * 8));
/* calculate and set the new return address */
ra = ra - 2 * 4;
- *((ptrint *) (sp + 3 * 8)) = (ptrint) ra;
+ *((ptrint *) (sp + 4 * 8)) = (ptrint) ra;
PATCHER_MONITORENTER;
/* if we show disassembly, we have to skip the nop's */
- if (showdisassemble)
+ if (opt_showdisassemble)
ra = ra + 2 * 4;
/* get the offset from machine instruction */
/* get stuff from the stack */
- ra = (u1 *) *((ptrint *) (sp + 3 * 8));
- o = (java_objectheader *) *((ptrint *) (sp + 2 * 8));
- mcode = *((u8 *) (sp + 1 * 8));
- cr = (constant_classref *) *((ptrint *) (sp + 0 * 8));
+ ra = (u1 *) *((ptrint *) (sp + 4 * 8));
+ o = (java_objectheader *) *((ptrint *) (sp + 3 * 8));
+ mcode = *((u8 *) (sp + 2 * 8));
+ cr = (constant_classref *) *((ptrint *) (sp + 1 * 8));
/* calculate and set the new return address */
ra = ra - 2 * 4;
- *((ptrint *) (sp + 3 * 8)) = (ptrint) ra;
+ *((ptrint *) (sp + 4 * 8)) = (ptrint) ra;
PATCHER_MONITORENTER;
/* if we show disassembly, we have to skip the nop's */
- if (showdisassemble)
+ if (opt_showdisassemble)
ra = ra + 2 * 4;
/* patch super class index */
/* get stuff from the stack */
- ra = (u1 *) *((ptrint *) (sp + 3 * 8));
- o = (java_objectheader *) *((ptrint *) (sp + 2 * 8));
- mcode = *((u8 *) (sp + 1 * 8));
- cr = (constant_classref *) *((ptrint *) (sp + 0 * 8));
- pv = (u1 *) *((ptrint *) (sp - 2 * 8));
+ ra = (u1 *) *((ptrint *) (sp + 4 * 8));
+ o = (java_objectheader *) *((ptrint *) (sp + 3 * 8));
+ mcode = *((u8 *) (sp + 2 * 8));
+ cr = (constant_classref *) *((ptrint *) (sp + 1 * 8));
+ pv = (u1 *) *((ptrint *) (sp + 0 * 8));
/* calculate and set the new return address */
ra = ra - 2 * 4;
- *((ptrint *) (sp + 3 * 8)) = (ptrint) ra;
+ *((ptrint *) (sp + 4 * 8)) = (ptrint) ra;
PATCHER_MONITORENTER;
/* if we show disassembly, we have to skip the nop's */
- if (showdisassemble)
+ if (opt_showdisassemble)
ra = ra + 2 * 4;
/* get the offset from machine instruction */
/* get stuff from the stack */
- ra = (u1 *) *((ptrint *) (sp + 3 * 8));
- o = (java_objectheader *) *((ptrint *) (sp + 2 * 8));
- mcode = *((u8 *) (sp + 1 * 8));
- c = (classinfo *) *((ptrint *) (sp + 0 * 8));
+ ra = (u1 *) *((ptrint *) (sp + 4 * 8));
+ o = (java_objectheader *) *((ptrint *) (sp + 3 * 8));
+ mcode = *((u8 *) (sp + 2 * 8));
+ c = (classinfo *) *((ptrint *) (sp + 1 * 8));
/* calculate and set the new return address */
ra = ra - 2 * 4;
- *((ptrint *) (sp + 3 * 8)) = (ptrint) ra;
+ *((ptrint *) (sp + 4 * 8)) = (ptrint) ra;
PATCHER_MONITORENTER;
*******************************************************************************/
+#if !defined(ENABLE_STATICVM)
bool patcher_resolve_native(u1 *sp)
{
u1 *ra;
/* get stuff from the stack */
- ra = (u1 *) *((ptrint *) (sp + 3 * 8));
- o = (java_objectheader *) *((ptrint *) (sp + 2 * 8));
- mcode = *((u8 *) (sp + 1 * 8));
- m = (methodinfo *) *((ptrint *) (sp + 0 * 8));
- pv = (u1 *) *((ptrint *) (sp - 2 * 8));
+ ra = (u1 *) *((ptrint *) (sp + 4 * 8));
+ o = (java_objectheader *) *((ptrint *) (sp + 3 * 8));
+ mcode = *((u8 *) (sp + 2 * 8));
+ m = (methodinfo *) *((ptrint *) (sp + 1 * 8));
+ pv = (u1 *) *((ptrint *) (sp + 0 * 8));
/* calculate and set the new return address */
ra = ra - 2 * 4;
- *((ptrint *) (sp + 3 * 8)) = (ptrint) ra;
+ *((ptrint *) (sp + 4 * 8)) = (ptrint) ra;
PATCHER_MONITORENTER;
/* if we show disassembly, we have to skip the nop's */
- if (showdisassemble)
+ if (opt_showdisassemble)
ra = ra + 2 * 4;
/* get the offset from machine instruction */
return true;
}
+#endif /* !defined(ENABLE_STATICVM) */
/*
projects / cacao.git / commitdiff