Enable mahogany_fam10 and Kino family 10h to run the SB HT link at the expected HT3...

The patch makes these changes:

1) Remove the BUID swap list from ht_wrapper.c and put it in each of 15
   romstage.c files where it is used (AMD family 10h projects).
2) Add a prototype to amdfam10.h.
3) Modify the swap list and test in real hardware for mahogany_fam10 and
   kino family 10h and confirm HT3 operation for the SB link.

Abuild tested.

Signed-off-by: Scott Duplichan <sc...@notabs.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6439 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/src/mainboard/amd/bimini_fam10/romstage.c b/src/mainboard/amd/bimini_fam10/romstage.c
index e3955748b5a5749b3dfddacfbd5551f35e913d29..aba31fcb3ca41a762aca0c83e9314c5e839d8a80 100644 (file)
--- a/src/mainboard/amd/bimini_fam10/romstage.c
+++ b/src/mainboard/amd/bimini_fam10/romstage.c
@@ -237,3 +237,34 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        post_cache_as_ram();    // BSP switch stack to ram, copy then execute LB.
        post_code(0x43);        // Should never see this post code.
 }
+
+/**
+ * BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, u8 **List)
+ * Description:
+ *     This routine is called every time a non-coherent chain is processed.
+ *     BUID assignment may be controlled explicitly on a non-coherent chain. Provide a
+ *     swap list. The first part of the list controls the BUID assignment and the
+ *     second part of the list provides the device to device linking.  Device orientation
+ *     can be detected automatically, or explicitly.  See documentation for more details.
+ *
+ *     Automatic non-coherent init assigns BUIDs starting at 1 and incrementing sequentially
+ *     based on each device's unit count.
+ *
+ * Parameters:
+ *     @param[in]  u8  node    = The node on which this chain is located
+ *     @param[in]  u8  link    = The link on the host for this chain
+ *     @param[out] u8** list   = supply a pointer to a list
+ *     @param[out] BOOL result = true to use a manual list
+ *                               false to initialize the link automatically
+ */
+BOOL AMD_CB_ManualBUIDSwapList (u8 node, u8 link, const u8 **List)
+{
+       static const u8 swaplist[] = { 0xFF, CONFIG_HT_CHAIN_UNITID_BASE, CONFIG_HT_CHAIN_END_UNITID_BASE, 0xFF };
+       /* If the BUID was adjusted in early_ht we need to do the manual override */
+               if ((node == 0) && (link == 0)) {       /* BSP SB link */
+                       *List = swaplist;
+                       return 1;
+               }
+
+       return 0;
+}

diff --git a/src/mainboard/amd/mahogany_fam10/romstage.c b/src/mainboard/amd/mahogany_fam10/romstage.c
index c8296441e30af6cc6e3998018f461aedca6c2426..40e8a170b5e7ae17e96e75f7f2293e81a67a60f3 100644 (file)
--- a/src/mainboard/amd/mahogany_fam10/romstage.c
+++ b/src/mainboard/amd/mahogany_fam10/romstage.c
@@ -232,3 +232,34 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        post_cache_as_ram();    // BSP switch stack to ram, copy then execute LB.
        post_code(0x43);        // Should never see this post code.
 }
+
+/**
+ * BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, u8 **List)
+ * Description:
+ *     This routine is called every time a non-coherent chain is processed.
+ *     BUID assignment may be controlled explicitly on a non-coherent chain. Provide a
+ *     swap list. The first part of the list controls the BUID assignment and the
+ *     second part of the list provides the device to device linking.  Device orientation
+ *     can be detected automatically, or explicitly.  See documentation for more details.
+ *
+ *     Automatic non-coherent init assigns BUIDs starting at 1 and incrementing sequentially
+ *     based on each device's unit count.
+ *
+ * Parameters:
+ *     @param[in]  u8  node    = The node on which this chain is located
+ *     @param[in]  u8  link    = The link on the host for this chain
+ *     @param[out] u8** list   = supply a pointer to a list
+ *     @param[out] BOOL result = true to use a manual list
+ *                               false to initialize the link automatically
+ */
+BOOL AMD_CB_ManualBUIDSwapList (u8 node, u8 link, const u8 **List)
+{
+       static const u8 swaplist[] = {0, 1, 0xFF, 0, 0xFF};
+       /* If the BUID was adjusted in early_ht we need to do the manual override */
+               if ((node == 0) && (link == 0)) {       /* BSP SB link */
+                       *List = swaplist;
+                       return 1;
+               }
+
+       return 0;
+}

diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
index cbffa8db37ac6b5feceaf2ebe8dcd2403ef19f78..b64e16e183af25b56329f388f6f7f99bc51c2bb7 100644 (file)
--- a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
@@ -337,3 +337,37 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        post_cache_as_ram();    // BSP switch stack to ram, copy then execute LB.
        post_code(0x43);        // Should never see this post code.
 }
+
+/**
+ * BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, u8 **List)
+ * Description:
+ *     This routine is called every time a non-coherent chain is processed.
+ *     BUID assignment may be controlled explicitly on a non-coherent chain. Provide a
+ *     swap list. The first part of the list controls the BUID assignment and the
+ *     second part of the list provides the device to device linking.  Device orientation
+ *     can be detected automatically, or explicitly.  See documentation for more details.
+ *
+ *     Automatic non-coherent init assigns BUIDs starting at 1 and incrementing sequentially
+ *     based on each device's unit count.
+ *
+ * Parameters:
+ *     @param[in]  u8  node    = The node on which this chain is located
+ *     @param[in]  u8  link    = The link on the host for this chain
+ *     @param[out] u8** list   = supply a pointer to a list
+ *     @param[out] BOOL result = true to use a manual list
+ *                               false to initialize the link automatically
+ */
+BOOL AMD_CB_ManualBUIDSwapList (u8 node, u8 link, const u8 **List)
+{
+       static const u8 swaplist[] = { 0xFF, CONFIG_HT_CHAIN_UNITID_BASE, CONFIG_HT_CHAIN_END_UNITID_BASE, 0xFF };
+       /* If the BUID was adjusted in early_ht we need to do the manual override */
+       if ((CONFIG_HT_CHAIN_UNITID_BASE != 0) && (CONFIG_HT_CHAIN_END_UNITID_BASE != 0)) {
+               printk(BIOS_DEBUG, "AMD_CB_ManualBUIDSwapList()\n");
+               if ((node == 0) && (link == 0)) {       /* BSP SB link */
+                       *List = swaplist;
+                       return 1;
+               }
+       }
+
+       return 0;
+}

diff --git a/src/mainboard/amd/tilapia_fam10/romstage.c b/src/mainboard/amd/tilapia_fam10/romstage.c
index 67a1e4eb61c5b206abab8028b6caed9c617cf3af..ea8ec41fdd48fd0710b055d6b0a143e7bcf40115 100644 (file)
--- a/src/mainboard/amd/tilapia_fam10/romstage.c
+++ b/src/mainboard/amd/tilapia_fam10/romstage.c
@@ -231,3 +231,37 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        post_cache_as_ram();    // BSP switch stack to ram, copy then execute LB.
        post_code(0x43);        // Should never see this post code.
 }
+
+/**
+ * BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, u8 **List)
+ * Description:
+ *     This routine is called every time a non-coherent chain is processed.
+ *     BUID assignment may be controlled explicitly on a non-coherent chain. Provide a
+ *     swap list. The first part of the list controls the BUID assignment and the
+ *     second part of the list provides the device to device linking.  Device orientation
+ *     can be detected automatically, or explicitly.  See documentation for more details.
+ *
+ *     Automatic non-coherent init assigns BUIDs starting at 1 and incrementing sequentially
+ *     based on each device's unit count.
+ *
+ * Parameters:
+ *     @param[in]  u8  node    = The node on which this chain is located
+ *     @param[in]  u8  link    = The link on the host for this chain
+ *     @param[out] u8** list   = supply a pointer to a list
+ *     @param[out] BOOL result = true to use a manual list
+ *                               false to initialize the link automatically
+ */
+BOOL AMD_CB_ManualBUIDSwapList (u8 node, u8 link, const u8 **List)
+{
+       static const u8 swaplist[] = { 0xFF, CONFIG_HT_CHAIN_UNITID_BASE, CONFIG_HT_CHAIN_END_UNITID_BASE, 0xFF };
+       /* If the BUID was adjusted in early_ht we need to do the manual override */
+       if ((CONFIG_HT_CHAIN_UNITID_BASE != 0) && (CONFIG_HT_CHAIN_END_UNITID_BASE != 0)) {
+               printk(BIOS_DEBUG, "AMD_CB_ManualBUIDSwapList()\n");
+               if ((node == 0) && (link == 0)) {       /* BSP SB link */
+                       *List = swaplist;
+                       return 1;
+               }
+       }
+
+       return 0;
+}

diff --git a/src/mainboard/asus/m4a78-em/romstage.c b/src/mainboard/asus/m4a78-em/romstage.c
index 99cd4050640db81b88d414bee64023ec7422814d..4c9543beb1e718fcb427f65556402292b753bbe2 100644 (file)
--- a/src/mainboard/asus/m4a78-em/romstage.c
+++ b/src/mainboard/asus/m4a78-em/romstage.c
@@ -232,3 +232,37 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        post_cache_as_ram();    // BSP switch stack to ram, copy then execute LB.
        post_code(0x43);        // Should never see this post code.
 }
+
+/**
+ * BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, u8 **List)
+ * Description:
+ *     This routine is called every time a non-coherent chain is processed.
+ *     BUID assignment may be controlled explicitly on a non-coherent chain. Provide a
+ *     swap list. The first part of the list controls the BUID assignment and the
+ *     second part of the list provides the device to device linking.  Device orientation
+ *     can be detected automatically, or explicitly.  See documentation for more details.
+ *
+ *     Automatic non-coherent init assigns BUIDs starting at 1 and incrementing sequentially
+ *     based on each device's unit count.
+ *
+ * Parameters:
+ *     @param[in]  u8  node    = The node on which this chain is located
+ *     @param[in]  u8  link    = The link on the host for this chain
+ *     @param[out] u8** list   = supply a pointer to a list
+ *     @param[out] BOOL result = true to use a manual list
+ *                               false to initialize the link automatically
+ */
+BOOL AMD_CB_ManualBUIDSwapList (u8 node, u8 link, const u8 **List)
+{
+       static const u8 swaplist[] = { 0xFF, CONFIG_HT_CHAIN_UNITID_BASE, CONFIG_HT_CHAIN_END_UNITID_BASE, 0xFF };
+       /* If the BUID was adjusted in early_ht we need to do the manual override */
+       if ((CONFIG_HT_CHAIN_UNITID_BASE != 0) && (CONFIG_HT_CHAIN_END_UNITID_BASE != 0)) {
+               printk(BIOS_DEBUG, "AMD_CB_ManualBUIDSwapList()\n");
+               if ((node == 0) && (link == 0)) {       /* BSP SB link */
+                       *List = swaplist;
+                       return 1;
+               }
+       }
+
+       return 0;
+}

diff --git a/src/mainboard/asus/m4a785-m/romstage.c b/src/mainboard/asus/m4a785-m/romstage.c
index 99cd4050640db81b88d414bee64023ec7422814d..4c9543beb1e718fcb427f65556402292b753bbe2 100644 (file)
--- a/src/mainboard/asus/m4a785-m/romstage.c
+++ b/src/mainboard/asus/m4a785-m/romstage.c
@@ -232,3 +232,37 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        post_cache_as_ram();    // BSP switch stack to ram, copy then execute LB.
        post_code(0x43);        // Should never see this post code.
 }
+
+/**
+ * BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, u8 **List)
+ * Description:
+ *     This routine is called every time a non-coherent chain is processed.
+ *     BUID assignment may be controlled explicitly on a non-coherent chain. Provide a
+ *     swap list. The first part of the list controls the BUID assignment and the
+ *     second part of the list provides the device to device linking.  Device orientation
+ *     can be detected automatically, or explicitly.  See documentation for more details.
+ *
+ *     Automatic non-coherent init assigns BUIDs starting at 1 and incrementing sequentially
+ *     based on each device's unit count.
+ *
+ * Parameters:
+ *     @param[in]  u8  node    = The node on which this chain is located
+ *     @param[in]  u8  link    = The link on the host for this chain
+ *     @param[out] u8** list   = supply a pointer to a list
+ *     @param[out] BOOL result = true to use a manual list
+ *                               false to initialize the link automatically
+ */
+BOOL AMD_CB_ManualBUIDSwapList (u8 node, u8 link, const u8 **List)
+{
+       static const u8 swaplist[] = { 0xFF, CONFIG_HT_CHAIN_UNITID_BASE, CONFIG_HT_CHAIN_END_UNITID_BASE, 0xFF };
+       /* If the BUID was adjusted in early_ht we need to do the manual override */
+       if ((CONFIG_HT_CHAIN_UNITID_BASE != 0) && (CONFIG_HT_CHAIN_END_UNITID_BASE != 0)) {
+               printk(BIOS_DEBUG, "AMD_CB_ManualBUIDSwapList()\n");
+               if ((node == 0) && (link == 0)) {       /* BSP SB link */
+                       *List = swaplist;
+                       return 1;
+               }
+       }
+
+       return 0;
+}

diff --git a/src/mainboard/gigabyte/ma785gmt/romstage.c b/src/mainboard/gigabyte/ma785gmt/romstage.c
index 0be9bac1d99d7d46511e5fa3bb26b605bb27725c..78266610426afa2f32d942daef0ff78c63fbaedc 100644 (file)
--- a/src/mainboard/gigabyte/ma785gmt/romstage.c
+++ b/src/mainboard/gigabyte/ma785gmt/romstage.c
@@ -228,3 +228,37 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        post_cache_as_ram();    // BSP switch stack to ram, copy then execute LB.
        post_code(0x43);        // Should never see this post code.
 }
+
+/**
+ * BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, u8 **List)
+ * Description:
+ *     This routine is called every time a non-coherent chain is processed.
+ *     BUID assignment may be controlled explicitly on a non-coherent chain. Provide a
+ *     swap list. The first part of the list controls the BUID assignment and the
+ *     second part of the list provides the device to device linking.  Device orientation
+ *     can be detected automatically, or explicitly.  See documentation for more details.
+ *
+ *     Automatic non-coherent init assigns BUIDs starting at 1 and incrementing sequentially
+ *     based on each device's unit count.
+ *
+ * Parameters:
+ *     @param[in]  u8  node    = The node on which this chain is located
+ *     @param[in]  u8  link    = The link on the host for this chain
+ *     @param[out] u8** list   = supply a pointer to a list
+ *     @param[out] BOOL result = true to use a manual list
+ *                               false to initialize the link automatically
+ */
+BOOL AMD_CB_ManualBUIDSwapList (u8 node, u8 link, const u8 **List)
+{
+       static const u8 swaplist[] = { 0xFF, CONFIG_HT_CHAIN_UNITID_BASE, CONFIG_HT_CHAIN_END_UNITID_BASE, 0xFF };
+       /* If the BUID was adjusted in early_ht we need to do the manual override */
+       if ((CONFIG_HT_CHAIN_UNITID_BASE != 0) && (CONFIG_HT_CHAIN_END_UNITID_BASE != 0)) {
+               printk(BIOS_DEBUG, "AMD_CB_ManualBUIDSwapList()\n");
+               if ((node == 0) && (link == 0)) {       /* BSP SB link */
+                       *List = swaplist;
+                       return 1;
+               }
+       }
+
+       return 0;
+}

diff --git a/src/mainboard/gigabyte/ma78gm/romstage.c b/src/mainboard/gigabyte/ma78gm/romstage.c
index aa86a8e112ceabf08f2cf2860a7d9e6cdcc29c94..15ae9024c5bcc9203aae75bb6b879a608f1cef5d 100644 (file)
--- a/src/mainboard/gigabyte/ma78gm/romstage.c
+++ b/src/mainboard/gigabyte/ma78gm/romstage.c
@@ -230,3 +230,37 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        post_cache_as_ram();    // BSP switch stack to ram, copy then execute LB.
        post_code(0x43);        // Should never see this post code.
 }
+
+/**
+ * BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, u8 **List)
+ * Description:
+ *     This routine is called every time a non-coherent chain is processed.
+ *     BUID assignment may be controlled explicitly on a non-coherent chain. Provide a
+ *     swap list. The first part of the list controls the BUID assignment and the
+ *     second part of the list provides the device to device linking.  Device orientation
+ *     can be detected automatically, or explicitly.  See documentation for more details.
+ *
+ *     Automatic non-coherent init assigns BUIDs starting at 1 and incrementing sequentially
+ *     based on each device's unit count.
+ *
+ * Parameters:
+ *     @param[in]  u8  node    = The node on which this chain is located
+ *     @param[in]  u8  link    = The link on the host for this chain
+ *     @param[out] u8** list   = supply a pointer to a list
+ *     @param[out] BOOL result = true to use a manual list
+ *                               false to initialize the link automatically
+ */
+BOOL AMD_CB_ManualBUIDSwapList (u8 node, u8 link, const u8 **List)
+{
+       static const u8 swaplist[] = { 0xFF, CONFIG_HT_CHAIN_UNITID_BASE, CONFIG_HT_CHAIN_END_UNITID_BASE, 0xFF };
+       /* If the BUID was adjusted in early_ht we need to do the manual override */
+       if ((CONFIG_HT_CHAIN_UNITID_BASE != 0) && (CONFIG_HT_CHAIN_END_UNITID_BASE != 0)) {
+               printk(BIOS_DEBUG, "AMD_CB_ManualBUIDSwapList()\n");
+               if ((node == 0) && (link == 0)) {       /* BSP SB link */
+                       *List = swaplist;
+                       return 1;
+               }
+       }
+
+       return 0;
+}

diff --git a/src/mainboard/hp/dl165_g6_fam10/romstage.c b/src/mainboard/hp/dl165_g6_fam10/romstage.c
index b2b3f5197c1e316bb71a9db6f2c6015df4662ad6..99f05950daf81aeee3baf242771979c92533f6d3 100644 (file)
--- a/src/mainboard/hp/dl165_g6_fam10/romstage.c
+++ b/src/mainboard/hp/dl165_g6_fam10/romstage.c
@@ -222,3 +222,37 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
        post_cache_as_ram();
 }
+
+/**
+ * BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, u8 **List)
+ * Description:
+ *     This routine is called every time a non-coherent chain is processed.
+ *     BUID assignment may be controlled explicitly on a non-coherent chain. Provide a
+ *     swap list. The first part of the list controls the BUID assignment and the
+ *     second part of the list provides the device to device linking.  Device orientation
+ *     can be detected automatically, or explicitly.  See documentation for more details.
+ *
+ *     Automatic non-coherent init assigns BUIDs starting at 1 and incrementing sequentially
+ *     based on each device's unit count.
+ *
+ * Parameters:
+ *     @param[in]  u8  node    = The node on which this chain is located
+ *     @param[in]  u8  link    = The link on the host for this chain
+ *     @param[out] u8** list   = supply a pointer to a list
+ *     @param[out] BOOL result = true to use a manual list
+ *                               false to initialize the link automatically
+ */
+BOOL AMD_CB_ManualBUIDSwapList (u8 node, u8 link, const u8 **List)
+{
+       static const u8 swaplist[] = { 0xFF, CONFIG_HT_CHAIN_UNITID_BASE, CONFIG_HT_CHAIN_END_UNITID_BASE, 0xFF };
+       /* If the BUID was adjusted in early_ht we need to do the manual override */
+       if ((CONFIG_HT_CHAIN_UNITID_BASE != 0) && (CONFIG_HT_CHAIN_END_UNITID_BASE != 0)) {
+               printk(BIOS_DEBUG, "AMD_CB_ManualBUIDSwapList()\n");
+               if ((node == 0) && (link == 0)) {       /* BSP SB link */
+                       *List = swaplist;
+                       return 1;
+               }
+       }
+
+       return 0;
+}

diff --git a/src/mainboard/iei/kino-780am2-fam10/romstage.c b/src/mainboard/iei/kino-780am2-fam10/romstage.c
index 64df5b29e11a1a2b6e17b5bb3370a3068ef9afac..d4f2dc0a72ff2fbbc8a1d94c2330a8d6827440a5 100644 (file)
--- a/src/mainboard/iei/kino-780am2-fam10/romstage.c
+++ b/src/mainboard/iei/kino-780am2-fam10/romstage.c
@@ -233,3 +233,34 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        post_cache_as_ram();    // BSP switch stack to ram, copy then execute LB.
        post_code(0x43);        // Should never see this post code.
 }
+
+/**
+ * BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, u8 **List)
+ * Description:
+ *     This routine is called every time a non-coherent chain is processed.
+ *     BUID assignment may be controlled explicitly on a non-coherent chain. Provide a
+ *     swap list. The first part of the list controls the BUID assignment and the
+ *     second part of the list provides the device to device linking.  Device orientation
+ *     can be detected automatically, or explicitly.  See documentation for more details.
+ *
+ *     Automatic non-coherent init assigns BUIDs starting at 1 and incrementing sequentially
+ *     based on each device's unit count.
+ *
+ * Parameters:
+ *     @param[in]  u8  node    = The node on which this chain is located
+ *     @param[in]  u8  link    = The link on the host for this chain
+ *     @param[out] u8** list   = supply a pointer to a list
+ *     @param[out] BOOL result = true to use a manual list
+ *                               false to initialize the link automatically
+ */
+BOOL AMD_CB_ManualBUIDSwapList (u8 node, u8 link, const u8 **List)
+{
+       static const u8 swaplist[] = {0, 1, 0xFF, 0, 0xFF};
+       /* If the BUID was adjusted in early_ht we need to do the manual override */
+               if ((node == 0) && (link == 0)) {       /* BSP SB link */
+                       *List = swaplist;
+                       return 1;
+               }
+
+       return 0;
+}

diff --git a/src/mainboard/jetway/pa78vm5/romstage.c b/src/mainboard/jetway/pa78vm5/romstage.c
index d4d9a7a824a6d7e56aac2134d10ab0ef75749935..629b13a078d5419756094cf3324955423a122960 100644 (file)
--- a/src/mainboard/jetway/pa78vm5/romstage.c
+++ b/src/mainboard/jetway/pa78vm5/romstage.c
@@ -238,3 +238,37 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        post_cache_as_ram();    // BSP switch stack to ram, copy then execute LB.
        post_code(0x43);        // Should never see this post code.
 }
+
+/**
+ * BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, u8 **List)
+ * Description:
+ *     This routine is called every time a non-coherent chain is processed.
+ *     BUID assignment may be controlled explicitly on a non-coherent chain. Provide a
+ *     swap list. The first part of the list controls the BUID assignment and the
+ *     second part of the list provides the device to device linking.  Device orientation
+ *     can be detected automatically, or explicitly.  See documentation for more details.
+ *
+ *     Automatic non-coherent init assigns BUIDs starting at 1 and incrementing sequentially
+ *     based on each device's unit count.
+ *
+ * Parameters:
+ *     @param[in]  u8  node    = The node on which this chain is located
+ *     @param[in]  u8  link    = The link on the host for this chain
+ *     @param[out] u8** list   = supply a pointer to a list
+ *     @param[out] BOOL result = true to use a manual list
+ *                               false to initialize the link automatically
+ */
+BOOL AMD_CB_ManualBUIDSwapList (u8 node, u8 link, const u8 **List)
+{
+       static const u8 swaplist[] = { 0xFF, CONFIG_HT_CHAIN_UNITID_BASE, CONFIG_HT_CHAIN_END_UNITID_BASE, 0xFF };
+       /* If the BUID was adjusted in early_ht we need to do the manual override */
+       if ((CONFIG_HT_CHAIN_UNITID_BASE != 0) && (CONFIG_HT_CHAIN_END_UNITID_BASE != 0)) {
+               printk(BIOS_DEBUG, "AMD_CB_ManualBUIDSwapList()\n");
+               if ((node == 0) && (link == 0)) {       /* BSP SB link */
+                       *List = swaplist;
+                       return 1;
+               }
+       }
+
+       return 0;
+}

diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c
index 9567d2c7f316d9c07b3a4693d916e1ae724dfd04..16baac29a562be59e40fc32ed98325165be3803a 100644 (file)
--- a/src/mainboard/msi/ms9652_fam10/romstage.c
+++ b/src/mainboard/msi/ms9652_fam10/romstage.c
@@ -253,3 +253,37 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        post_cache_as_ram();    // BSP switch stack to ram, copy then execute LB.
        post_code(0x43);        // Should never see this post code.
 }
+
+/**
+ * BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, u8 **List)
+ * Description:
+ *     This routine is called every time a non-coherent chain is processed.
+ *     BUID assignment may be controlled explicitly on a non-coherent chain. Provide a
+ *     swap list. The first part of the list controls the BUID assignment and the
+ *     second part of the list provides the device to device linking.  Device orientation
+ *     can be detected automatically, or explicitly.  See documentation for more details.
+ *
+ *     Automatic non-coherent init assigns BUIDs starting at 1 and incrementing sequentially
+ *     based on each device's unit count.
+ *
+ * Parameters:
+ *     @param[in]  u8  node    = The node on which this chain is located
+ *     @param[in]  u8  link    = The link on the host for this chain
+ *     @param[out] u8** list   = supply a pointer to a list
+ *     @param[out] BOOL result = true to use a manual list
+ *                               false to initialize the link automatically
+ */
+BOOL AMD_CB_ManualBUIDSwapList (u8 node, u8 link, const u8 **List)
+{
+       static const u8 swaplist[] = { 0xFF, CONFIG_HT_CHAIN_UNITID_BASE, CONFIG_HT_CHAIN_END_UNITID_BASE, 0xFF };
+       /* If the BUID was adjusted in early_ht we need to do the manual override */
+       if ((CONFIG_HT_CHAIN_UNITID_BASE != 0) && (CONFIG_HT_CHAIN_END_UNITID_BASE != 0)) {
+               printk(BIOS_DEBUG, "AMD_CB_ManualBUIDSwapList()\n");
+               if ((node == 0) && (link == 0)) {       /* BSP SB link */
+                       *List = swaplist;
+                       return 1;
+               }
+       }
+
+       return 0;
+}

diff --git a/src/mainboard/supermicro/h8dmr_fam10/romstage.c b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
index c949f2653916eb85d20c63b2999cf0aebcb8d341..50ad6a0584ffbce57c563152d2aeecf2fea2e116 100644 (file)
--- a/src/mainboard/supermicro/h8dmr_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
@@ -246,3 +246,37 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        post_cache_as_ram(); // BSP switch stack to ram, copy + execute stage 2
        post_code(0x42);     // Should never see this post code.
 }
+
+/**
+ * BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, u8 **List)
+ * Description:
+ *     This routine is called every time a non-coherent chain is processed.
+ *     BUID assignment may be controlled explicitly on a non-coherent chain. Provide a
+ *     swap list. The first part of the list controls the BUID assignment and the
+ *     second part of the list provides the device to device linking.  Device orientation
+ *     can be detected automatically, or explicitly.  See documentation for more details.
+ *
+ *     Automatic non-coherent init assigns BUIDs starting at 1 and incrementing sequentially
+ *     based on each device's unit count.
+ *
+ * Parameters:
+ *     @param[in]  u8  node    = The node on which this chain is located
+ *     @param[in]  u8  link    = The link on the host for this chain
+ *     @param[out] u8** list   = supply a pointer to a list
+ *     @param[out] BOOL result = true to use a manual list
+ *                               false to initialize the link automatically
+ */
+BOOL AMD_CB_ManualBUIDSwapList (u8 node, u8 link, const u8 **List)
+{
+       static const u8 swaplist[] = { 0xFF, CONFIG_HT_CHAIN_UNITID_BASE, CONFIG_HT_CHAIN_END_UNITID_BASE, 0xFF };
+       /* If the BUID was adjusted in early_ht we need to do the manual override */
+       if ((CONFIG_HT_CHAIN_UNITID_BASE != 0) && (CONFIG_HT_CHAIN_END_UNITID_BASE != 0)) {
+               printk(BIOS_DEBUG, "AMD_CB_ManualBUIDSwapList()\n");
+               if ((node == 0) && (link == 0)) {       /* BSP SB link */
+                       *List = swaplist;
+                       return 1;
+               }
+       }
+
+       return 0;
+}

diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c
index f3f56c424174c12e72c1e6378ffaab068bbaffc8..dbef8e9e106ce037130fc03dc5b5fe74d9a64f44 100644 (file)
--- a/src/mainboard/supermicro/h8qme_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c
@@ -295,3 +295,37 @@ post_code(0x40);
  post_cache_as_ram();  // BSP switch stack to ram, copy then execute LB.
  post_code(0x42);  // Should never see this post code.
 }
+
+/**
+ * BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, u8 **List)
+ * Description:
+ *     This routine is called every time a non-coherent chain is processed.
+ *     BUID assignment may be controlled explicitly on a non-coherent chain. Provide a
+ *     swap list. The first part of the list controls the BUID assignment and the
+ *     second part of the list provides the device to device linking.  Device orientation
+ *     can be detected automatically, or explicitly.  See documentation for more details.
+ *
+ *     Automatic non-coherent init assigns BUIDs starting at 1 and incrementing sequentially
+ *     based on each device's unit count.
+ *
+ * Parameters:
+ *     @param[in]  u8  node    = The node on which this chain is located
+ *     @param[in]  u8  link    = The link on the host for this chain
+ *     @param[out] u8** list   = supply a pointer to a list
+ *     @param[out] BOOL result = true to use a manual list
+ *                               false to initialize the link automatically
+ */
+BOOL AMD_CB_ManualBUIDSwapList (u8 node, u8 link, const u8 **List)
+{
+       static const u8 swaplist[] = { 0xFF, CONFIG_HT_CHAIN_UNITID_BASE, CONFIG_HT_CHAIN_END_UNITID_BASE, 0xFF };
+       /* If the BUID was adjusted in early_ht we need to do the manual override */
+       if ((CONFIG_HT_CHAIN_UNITID_BASE != 0) && (CONFIG_HT_CHAIN_END_UNITID_BASE != 0)) {
+               printk(BIOS_DEBUG, "AMD_CB_ManualBUIDSwapList()\n");
+               if ((node == 0) && (link == 0)) {       /* BSP SB link */
+                       *List = swaplist;
+                       return 1;
+               }
+       }
+
+       return 0;
+}

diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c
index d809ff26f7dadded18389c43d9dada8e99c1378b..ed3ee8b4b4185cd68f11cdc79a228509467144cd 100644 (file)
--- a/src/mainboard/tyan/s2912_fam10/romstage.c
+++ b/src/mainboard/tyan/s2912_fam10/romstage.c
@@ -250,3 +250,37 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        post_cache_as_ram();    // BSP switch stack to ram, copy then execute LB.
        post_code(0x43);        // Should never see this post code.
 }
+
+/**
+ * BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, u8 **List)
+ * Description:
+ *     This routine is called every time a non-coherent chain is processed.
+ *     BUID assignment may be controlled explicitly on a non-coherent chain. Provide a
+ *     swap list. The first part of the list controls the BUID assignment and the
+ *     second part of the list provides the device to device linking.  Device orientation
+ *     can be detected automatically, or explicitly.  See documentation for more details.
+ *
+ *     Automatic non-coherent init assigns BUIDs starting at 1 and incrementing sequentially
+ *     based on each device's unit count.
+ *
+ * Parameters:
+ *     @param[in]  u8  node    = The node on which this chain is located
+ *     @param[in]  u8  link    = The link on the host for this chain
+ *     @param[out] u8** list   = supply a pointer to a list
+ *     @param[out] BOOL result = true to use a manual list
+ *                               false to initialize the link automatically
+ */
+BOOL AMD_CB_ManualBUIDSwapList (u8 node, u8 link, const u8 **List)
+{
+       static const u8 swaplist[] = { 0xFF, CONFIG_HT_CHAIN_UNITID_BASE, CONFIG_HT_CHAIN_END_UNITID_BASE, 0xFF };
+       /* If the BUID was adjusted in early_ht we need to do the manual override */
+       if ((CONFIG_HT_CHAIN_UNITID_BASE != 0) && (CONFIG_HT_CHAIN_END_UNITID_BASE != 0)) {
+               printk(BIOS_DEBUG, "AMD_CB_ManualBUIDSwapList()\n");
+               if ((node == 0) && (link == 0)) {       /* BSP SB link */
+                       *List = swaplist;
+                       return 1;
+               }
+       }
+
+       return 0;
+}

diff --git a/src/northbridge/amd/amdfam10/amdfam10.h b/src/northbridge/amd/amdfam10/amdfam10.h
index 0f9295e8bb71ffab76fc8abb2c873a52c92e12d4..b410bb96d6fcaeec74619048070e3cb16e86c359 100644 (file)
--- a/src/northbridge/amd/amdfam10/amdfam10.h
+++ b/src/northbridge/amd/amdfam10/amdfam10.h
@@ -1199,4 +1199,7 @@ u32 get_sblk(void);
 u8 get_sbbusn(u8 sblk);
 #endif
 
+#include "northbridge/amd/amdht/porting.h"
+BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, const u8 **List);
+
 #endif /* AMDFAM10_H */

diff --git a/src/northbridge/amd/amdht/ht_wrapper.c b/src/northbridge/amd/amdht/ht_wrapper.c
index ed204a1617233185b70fc50e8c973f0353153685..32908c49364bc321e05df724e22d9657ede52292 100644 (file)
--- a/src/northbridge/amd/amdht/ht_wrapper.c
+++ b/src/northbridge/amd/amdht/ht_wrapper.c
@@ -97,42 +97,6 @@ static void AMD_CB_EventNotify (u8 evtClass, u16 event, const u8 *pEventData0)
 
 }
 
-
-/**
- * BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, u8 **List)
- * Description:
- *     This routine is called every time a non-coherent chain is processed.
- *     BUID assignment may be controlled explicitly on a non-coherent chain. Provide a
- *     swap list. The first part of the list controls the BUID assignment and the
- *     second part of the list provides the device to device linking.  Device orientation
- *     can be detected automatically, or explicitly.  See documentation for more details.
- *
- *     Automatic non-coherent init assigns BUIDs starting at 1 and incrementing sequentially
- *     based on each device's unit count.
- *
- * Parameters:
- *     @param[in]  u8  node    = The node on which this chain is located
- *     @param[in]  u8  link    = The link on the host for this chain
- *     @param[out] u8** list   = supply a pointer to a list
- *     @param[out] BOOL result = true to use a manual list
- *                               false to initialize the link automatically
- */
-static BOOL AMD_CB_ManualBUIDSwapList (u8 node, u8 link, const u8 **List)
-{
-       static const u8 swaplist[] = { 0xFF, CONFIG_HT_CHAIN_UNITID_BASE, CONFIG_HT_CHAIN_END_UNITID_BASE, 0xFF };
-       /* If the BUID was adjusted in early_ht we need to do the manual override */
-       if ((CONFIG_HT_CHAIN_UNITID_BASE != 0) && (CONFIG_HT_CHAIN_END_UNITID_BASE != 0)) {
-               printk(BIOS_DEBUG, "AMD_CB_ManualBUIDSwapList()\n");
-               if ((node == 0) && (link == 0)) {       /* BSP SB link */
-                       *List = swaplist;
-                       return 1;
-               }
-       }
-
-       return 0;
-}
-
-
 /**
  * void getAmdTopolist(u8 ***p)
  *