2003-02-14 Patrik Torstensson

	* x86.brg: Implemented CONV_OVF_[I|U]4 (freg), this fixes the issues
	with the "checked" keyword. Closes bugs #33421 and #35280 (JIT not mint)

svn path=/trunk/mono/; revision=11582

diff --git a/mono/jit/ChangeLog b/mono/jit/ChangeLog
index 7ca5f69f725ef7da013fd15485f7de32ba64e2dd..dec4f14ec8914b449cb65b18e2dfda765eda9b72 100644 (file)
--- a/mono/jit/ChangeLog
+++ b/mono/jit/ChangeLog
@@ -1,3 +1,8 @@
+2003-02-14  Patrik Torstensson
+
+       * x86.brg: Implemented CONV_OVF_[I|U]4 (freg), this fixes the issues 
+       with the "checked" keyword. Closes bugs #33421 and #35280 (JIT not mint)
+
 2003-02-14  Dietmar Maurer  <dietmar@ximian.com>
 
        * exception.c (mono_arch_find_jit_info): better way to handle

diff --git a/mono/jit/x86.brg b/mono/jit/x86.brg
index be5b73e1d96ee1766503b68337dea25beaf72d89..3f2b2e2267f7de18a1e6bc3181ce31a1185601ae 100644 (file)
--- a/mono/jit/x86.brg
+++ b/mono/jit/x86.brg
@@ -1079,6 +1079,27 @@ reg: CONV_OVF_I4 (reg) {
        PRINT_REG ("CONV_OVF_I4", tree->left->reg1);
 }
 
+reg: CONV_OVF_I4 (freg) {
+       x86_push_reg (s->code, X86_EAX);
+       x86_alu_reg_imm (s->code, X86_SUB, X86_ESP, 4);
+       x86_fnstcw_membase(s->code, X86_ESP, 0);
+       x86_mov_reg_membase (s->code, tree->left->reg1, X86_ESP, 0, 2);
+       x86_alu_reg_imm (s->code, X86_OR, tree->left->reg1, 0xc00);
+       x86_mov_membase_reg (s->code, X86_ESP, 2, tree->left->reg1, 2);
+       x86_fldcw_membase (s->code, X86_ESP, 2);
+       x86_push_reg (s->code, X86_EAX); // SP = SP - 4
+       x86_fist_pop_membase (s->code, X86_ESP, 0, FALSE);
+       x86_fstsw(s->code); // stores flags in ax
+       x86_alu_reg_imm (s->code, X86_AND, X86_EAX, 0x80000000);
+
+       EMIT_COND_SYSTEM_EXCEPTION (X86_CC_EQ, FALSE, "OverflowException");
+
+       x86_pop_reg (s->code, tree->reg1);
+       x86_fldcw_membase (s->code, X86_ESP, 0);
+       x86_alu_reg_imm (s->code, X86_ADD, X86_ESP, 4);
+       x86_pop_reg (s->code, X86_EAX);
+}
+
 reg: CONV_OVF_U4 (reg) {
        /* Keep in sync with CONV_OVF_I4_UN below, they are the same on 32-bit machines */
        x86_test_reg_imm (s->code, tree->left->reg1, 0x8000000);
@@ -1095,6 +1116,30 @@ reg: CONV_OVF_I4_UN (reg) {
                x86_mov_reg_reg (s->code, tree->reg1, tree->left->reg1, 4);
 }
 
+reg: CONV_OVF_U4 (freg) {
+       x86_push_reg (s->code, X86_EAX);
+       x86_alu_reg_imm (s->code, X86_SUB, X86_ESP, 4);
+       x86_fnstcw_membase(s->code, X86_ESP, 0);
+       x86_mov_reg_membase (s->code, tree->left->reg1, X86_ESP, 0, 2);
+       x86_alu_reg_imm (s->code, X86_OR, tree->left->reg1, 0xc00);
+       x86_mov_membase_reg (s->code, X86_ESP, 2, tree->left->reg1, 2);
+       x86_fldcw_membase (s->code, X86_ESP, 2);
+       x86_push_reg (s->code, X86_EAX); // SP = SP - 4
+       x86_fist_pop_membase (s->code, X86_ESP, 0, FALSE);
+       x86_fstsw(s->code); // stores flags in ax
+       x86_alu_reg_imm (s->code, X86_AND, X86_EAX, 0x80000000);
+
+       EMIT_COND_SYSTEM_EXCEPTION (X86_CC_EQ, FALSE, "OverflowException");
+
+       x86_pop_reg (s->code, tree->reg1);
+       x86_fldcw_membase (s->code, X86_ESP, 0);
+       x86_alu_reg_imm (s->code, X86_ADD, X86_ESP, 4);
+       x86_pop_reg (s->code, X86_EAX);
+
+       x86_test_reg_imm (s->code, tree->reg1, 0x8000000);
+       EMIT_COND_SYSTEM_EXCEPTION (X86_CC_EQ, FALSE, "OverflowException");
+}
+
 reg: CONV_OVF_I1 (reg) {
        /* probe value to be within -128 to 127 */
        x86_alu_reg_imm (s->code, X86_CMP, tree->left->reg1, 127);