This is what qemu pcbios does since commit
da5ff65dc9473e3f069736d38b9a189ea14a67eb.
Qemu implements PCI interrupts as active high, but OSes assume
that they are active low as per PCI spec. Qemu works without override
only because ioapic there doesn't implement polarity bit.
Signed-off-by: Gleb Natapov <gleb@redhat.com>
* lines start */
} PACKED;
* lines start */
} PACKED;
/* IRQs 5,9,10,11 */
#define PCI_ISA_IRQ_MASK 0x0e20
/* IRQs 5,9,10,11 */
#define PCI_ISA_IRQ_MASK 0x0e20
-#else
-#define PCI_ISA_IRQ_MASK 0x0000
-#endif
struct madt_intsrcovr {
APIC_HEADER_DEF
struct madt_intsrcovr {
APIC_HEADER_DEF