-#define P80_MEM_SETUP (0x070) /* docboot meminit*/
-#define POST_MEM_SETUP (0x070) /* memsize.asm*/
-#define ERROR_32BIT_DIMMS (0x071) /* memsize.asm*/
-#define POST_MEM_SETUP2 (0x072) /* memsize.asm*/
-#define POST_MEM_SETUP3 (0x073) /* memsize.asm*/
-#define POST_MEM_SETUP4 (0x074) /* memsize.asm*/
-#define POST_MEM_SETUP5 (0x075) /* memsize.asm*/
-#define POST_MEM_ENABLE (0x076) /* memsize.asm*/
-#define ERROR_NO_DIMMS (0x077) /* memsize.asm*/
-#define ERROR_DIFF_DIMMS (0x078) /* memsize.asm*/
-#define ERROR_BAD_LATENCY (0x079) /* memsize.asm*/
-#define ERROR_SET_PAGE (0x07a) /* memsize.asm*/
-#define ERROR_DENSITY_DIMM (0x07b) /* memsize.asm*/
-#define ERROR_UNSUPPORTED_DIMM (0x07c) /* memsize.asm*/
-#define ERROR_BANK_SET (0x07d) /* memsize.asm*/
-#define POST_MEM_SETUP_GOOD (0x07E) /* memsize.asm*/
-#define POST_MEM_SETUP_FAIL (0x07F) /* memsize.asm*/
-
-
-#define POST_UserPreInit (0x080) /* geode.asm*/
-#define POST_UserPostInit (0x081) /* geode.asm*/
-#define POST_Equipment_check (0x082) /* geode.asm*/
-#define POST_InitNVRAMBX (0x083) /* geode.asm*/
-#define POST_NoPIRTable (0x084) /* pci.asm*/
-#define POST_ChipsetFingerPrintPass (0x085) /* prechipsetinit*/
-#define POST_ChipsetFingerPrintFail (0x086) /* prechipsetinit*/
-#define POST_CPU_IM_TAG_BIST_FAILURE (0x087) /* gx2reg.asm*/
-#define POST_CPU_IM_DATA_BIST_FAILURE (0x088) /* gx2reg.asm*/
-#define POST_CPU_FPU_BIST_FAILURE (0x089) /* gx2reg.asm*/
-#define POST_CPU_BTB_BIST_FAILURE (0x08a) /* gx2reg.asm*/
-#define POST_CPU_EX_BIST_FAILURE (0x08b) /* gx2reg.asm*/
-#define POST_Chipset_PI_Test_Fail (0x08c) /* prechipsetinit*/
-#define POST_Chipset_SMBus_SDA_Test_Fail (0x08d) /* prechipsetinit*/
-#define POST_BIT_CLK_Fail (0x08e) /* Hawk geode.asm override*/
-
-
-#define POST_STACK_SETUP (0x090) /* memstack.asm*/
-#define POST_CPU_PF_BIST_FAILURE (0x091) /* gx2reg.asm*/
-#define POST_CPU_L2_BIST_FAILURE (0x092) /* gx2reg.asm*/
-#define POST_CPU_GLCP_BIST_FAILURE (0x093) /* gx2reg.asm*/
-#define POST_CPU_DF_BIST_FAILURE (0x094) /* gx2reg.asm*/
-#define POST_CPU_VG_BIST_FAILURE (0x095) /* gx2reg.asm*/
-#define POST_CPU_VIP_BIST_FAILURE (0x096) /* gx2reg.asm*/
-#define POST_STACK_SETUP_PASS (0x09E) /* memstack.asm*/
-#define POST_STACK_SETUP_FAIL (0x09F) /* memstack.asm*/
-
-
-#define POST_PLL_INIT (0x0A0) /* pllinit.asm*/
-#define POST_PLL_MANUAL (0x0A1) /* pllinit.asm*/
-#define POST_PLL_STRAP (0x0A2) /* pllinit.asm*/
-#define POST_PLL_RESET_FAIL (0x0A3) /* pllinit.asm*/
-#define POST_PLL_PCI_FAIL (0x0A4) /* pllinit.asm*/
-#define POST_PLL_MEM_FAIL (0x0A5) /* pllinit.asm*/
-#define POST_PLL_CPU_VER_FAIL (0x0A6) /* pllinit.asm*/
-
-
-#define POST_MEM_TESTMEM (0x0B0) /* memtest.asm*/
-#define POST_MEM_TESTMEM1 (0x0B1) /* memtest.asm*/
-#define POST_MEM_TESTMEM2 (0x0B2) /* memtest.asm*/
-#define POST_MEM_TESTMEM3 (0x0B3) /* memtest.asm*/
-#define POST_MEM_TESTMEM4 (0x0B4) /* memtest.asm*/
-#define POST_MEM_TESTMEM_PASS (0x0BE) /* memtest.asm*/
-#define POST_MEM_TESTMEM_FAIL (0x0BF) /* memtest.asm*/
-
-
-#define POST_SECUROM_SECBOOT_START (0x0C0) /* secstart.asm*/
-#define POST_SECUROM_BOOTSRCSETUP (0x0C1) /* secstart.asm*/
-#define POST_SECUROM_REMAP_FAIL (0x0C2) /* secstart.asm*/
-#define POST_SECUROM_BOOTSRCSETUP_FAIL (0x0C3) /* secstart.asm*/
-#define POST_SECUROM_DCACHESETUP (0x0C4) /* secstart.asm*/
-#define POST_SECUROM_DCACHESETUP_FAIL (0x0C5) /* secstart.asm*/
-#define POST_SECUROM_ICACHESETUP (0x0C6) /* secstart.asm*/
-#define POST_SECUROM_DESCRIPTORSETUP (0x0C7) /* secstart.asm*/
-#define POST_SECUROM_DCACHESETUPBIOS (0x0C8) /* secstart.asm*/
-#define POST_SECUROM_PLATFORMSETUP (0x0C9) /* secstart.asm*/
-#define POST_SECUROM_SIGCHECKBIOS (0x0CA) /* secstart.asm*/
-#define POST_SECUROM_ICACHESETUPBIOS (0x0CB) /* secstart.asm*/
-#define POST_SECUROM_PASS (0x0CC) /* secstart.asm*/
-#define POST_SECUROM_FAIL (0x0CD) /* secstart.asm*/
-
-#define POST_RCONFInitError (0x0CE) /* cache.asm*/
-#define POST_CacheInitError (0x0CF) /* cache.asm*/
-
-
-#define POST_ROM_PREUNCOMPRESS (0x0D0) /* rominit.asm*/
-#define POST_ROM_UNCOMPRESS (0x0D1) /* rominit.asm*/
-#define POST_ROM_SMM_INIT (0x0D2) /* rominit.asm*/
-#define POST_ROM_VID_BIOS (0x0D3) /* rominit.asm*/
-#define POST_ROM_LCDINIT (0x0D4) /* rominit.asm*/
-#define POST_ROM_SPLASH (0x0D5) /* rominit.asm*/
-#define POST_ROM_HDDINIT (0x0D6) /* rominit.asm*/
-#define POST_ROM_SYS_INIT (0x0D7) /* rominit.asm*/
-#define POST_ROM_DMM_INIT (0x0D8) /* rominit.asm*/
-#define POST_ROM_TVINIT (0x0D9) /* rominit.asm*/
+#define P80_MEM_SETUP (0x070)
+#define POST_MEM_SETUP (0x070)
+#define ERROR_32BIT_DIMMS (0x071)
+#define POST_MEM_SETUP2 (0x072)
+#define POST_MEM_SETUP3 (0x073)
+#define POST_MEM_SETUP4 (0x074)
+#define POST_MEM_SETUP5 (0x075)
+#define POST_MEM_ENABLE (0x076)
+#define ERROR_NO_DIMMS (0x077)
+#define ERROR_DIFF_DIMMS (0x078)
+#define ERROR_BAD_LATENCY (0x079)
+#define ERROR_SET_PAGE (0x07a)
+#define ERROR_DENSITY_DIMM (0x07b)
+#define ERROR_UNSUPPORTED_DIMM (0x07c)
+#define ERROR_BANK_SET (0x07d)
+#define POST_MEM_SETUP_GOOD (0x07E)
+#define POST_MEM_SETUP_FAIL (0x07F)
+
+
+#define POST_UserPreInit (0x080)
+#define POST_UserPostInit (0x081)
+#define POST_Equipment_check (0x082)
+#define POST_InitNVRAMBX (0x083)
+#define POST_NoPIRTable (0x084)
+#define POST_ChipsetFingerPrintPass (0x085)
+#define POST_ChipsetFingerPrintFail (0x086)
+#define POST_CPU_IM_TAG_BIST_FAILURE (0x087)
+#define POST_CPU_IM_DATA_BIST_FAILURE (0x088)
+#define POST_CPU_FPU_BIST_FAILURE (0x089)
+#define POST_CPU_BTB_BIST_FAILURE (0x08a)
+#define POST_CPU_EX_BIST_FAILURE (0x08b)
+#define POST_Chipset_PI_Test_Fail (0x08c)
+#define POST_Chipset_SMBus_SDA_Test_Fail (0x08d)
+#define POST_BIT_CLK_Fail (0x08e)
+
+
+#define POST_STACK_SETUP (0x090)
+#define POST_CPU_PF_BIST_FAILURE (0x091)
+#define POST_CPU_L2_BIST_FAILURE (0x092)
+#define POST_CPU_GLCP_BIST_FAILURE (0x093)
+#define POST_CPU_DF_BIST_FAILURE (0x094)
+#define POST_CPU_VG_BIST_FAILURE (0x095)
+#define POST_CPU_VIP_BIST_FAILURE (0x096)
+#define POST_STACK_SETUP_PASS (0x09E)
+#define POST_STACK_SETUP_FAIL (0x09F)
+
+
+#define POST_PLL_INIT (0x0A0)
+#define POST_PLL_MANUAL (0x0A1)
+#define POST_PLL_STRAP (0x0A2)
+#define POST_PLL_RESET_FAIL (0x0A3)
+#define POST_PLL_PCI_FAIL (0x0A4)
+#define POST_PLL_MEM_FAIL (0x0A5)
+#define POST_PLL_CPU_VER_FAIL (0x0A6)
+
+
+#define POST_MEM_TESTMEM (0x0B0)
+#define POST_MEM_TESTMEM1 (0x0B1)
+#define POST_MEM_TESTMEM2 (0x0B2)
+#define POST_MEM_TESTMEM3 (0x0B3)
+#define POST_MEM_TESTMEM4 (0x0B4)
+#define POST_MEM_TESTMEM_PASS (0x0BE)
+#define POST_MEM_TESTMEM_FAIL (0x0BF)
+
+
+#define POST_SECUROM_SECBOOT_START (0x0C0)
+#define POST_SECUROM_BOOTSRCSETUP (0x0C1)
+#define POST_SECUROM_REMAP_FAIL (0x0C2)
+#define POST_SECUROM_BOOTSRCSETUP_FAIL (0x0C3)
+#define POST_SECUROM_DCACHESETUP (0x0C4)
+#define POST_SECUROM_DCACHESETUP_FAIL (0x0C5)
+#define POST_SECUROM_ICACHESETUP (0x0C6)
+#define POST_SECUROM_DESCRIPTORSETUP (0x0C7)
+#define POST_SECUROM_DCACHESETUPBIOS (0x0C8)
+#define POST_SECUROM_PLATFORMSETUP (0x0C9)
+#define POST_SECUROM_SIGCHECKBIOS (0x0CA)
+#define POST_SECUROM_ICACHESETUPBIOS (0x0CB)
+#define POST_SECUROM_PASS (0x0CC)
+#define POST_SECUROM_FAIL (0x0CD)
+
+#define POST_RCONFInitError (0x0CE)
+#define POST_CacheInitError (0x0CF)
+
+
+#define POST_ROM_PREUNCOMPRESS (0x0D0)
+#define POST_ROM_UNCOMPRESS (0x0D1)
+#define POST_ROM_SMM_INIT (0x0D2)
+#define POST_ROM_VID_BIOS (0x0D3)
+#define POST_ROM_LCDINIT (0x0D4)
+#define POST_ROM_SPLASH (0x0D5)
+#define POST_ROM_HDDINIT (0x0D6)
+#define POST_ROM_SYS_INIT (0x0D7)
+#define POST_ROM_DMM_INIT (0x0D8)
+#define POST_ROM_TVINIT (0x0D9)