+static void pci_bios_check_device_in_bus(int bus)
+{
+ struct pci_device *pci;
+
+ dprintf(1, "PCI: check devices bus %d\n", bus);
+ foreachpci(pci) {
+ if (pci_bdf_to_bus(pci->bdf) != bus)
+ continue;
+ pci_bios_check_device(&busses[bus], pci);
+ }
+}
+
+#define ROOT_BASE(top, sum, max) ALIGN_DOWN((top)-(sum),(max) ?: 1)
+
+static int pci_bios_init_root_regions(u32 start, u32 end)
+{
+ struct pci_bus *bus = &busses[0];
+
+ bus->r[PCI_REGION_TYPE_IO].base = 0xc000;
+
+ if (bus->r[PCI_REGION_TYPE_MEM].sum < bus->r[PCI_REGION_TYPE_PREFMEM].sum) {
+ bus->r[PCI_REGION_TYPE_MEM].base =
+ ROOT_BASE(end,
+ bus->r[PCI_REGION_TYPE_MEM].sum,
+ bus->r[PCI_REGION_TYPE_MEM].max);
+ bus->r[PCI_REGION_TYPE_PREFMEM].base =
+ ROOT_BASE(bus->r[PCI_REGION_TYPE_MEM].base,
+ bus->r[PCI_REGION_TYPE_PREFMEM].sum,
+ bus->r[PCI_REGION_TYPE_PREFMEM].max);
+ if (bus->r[PCI_REGION_TYPE_PREFMEM].base >= start) {
+ return 0;
+ }
+ } else {
+ bus->r[PCI_REGION_TYPE_PREFMEM].base =
+ ROOT_BASE(end,
+ bus->r[PCI_REGION_TYPE_PREFMEM].sum,
+ bus->r[PCI_REGION_TYPE_PREFMEM].max);
+ bus->r[PCI_REGION_TYPE_MEM].base =
+ ROOT_BASE(bus->r[PCI_REGION_TYPE_PREFMEM].base,
+ bus->r[PCI_REGION_TYPE_MEM].sum,
+ bus->r[PCI_REGION_TYPE_MEM].max);
+ if (bus->r[PCI_REGION_TYPE_MEM].base >= start) {
+ return 0;
+ }
+ }
+ return -1;
+}
+
+
+/****************************************************************
+ * BAR assignment
+ ****************************************************************/
+
+static void pci_bios_init_bus_bases(struct pci_bus *bus)
+{
+ u32 base, newbase, size;
+ int type, i;
+
+ for (type = 0; type < PCI_REGION_TYPE_COUNT; type++) {
+ dprintf(1, " type %s max %x sum %x base %x\n", region_type_name[type],
+ bus->r[type].max, bus->r[type].sum, bus->r[type].base);
+ base = bus->r[type].base;
+ for (i = ARRAY_SIZE(bus->r[type].count)-1; i >= 0; i--) {
+ size = pci_index_to_size(i, type);
+ if (!bus->r[type].count[i])
+ continue;
+ newbase = base + size * bus->r[type].count[i];
+ dprintf(1, " size %8x: %d bar(s), %8x -> %8x\n",
+ size, bus->r[type].count[i], base, newbase - 1);
+ bus->r[type].bases[i] = base;
+ base = newbase;
+ }
+ }
+}
+
+static u32 pci_bios_bus_get_addr(struct pci_bus *bus, int type, u32 size)
+{
+ u32 index, addr;
+
+ index = pci_size_to_index(size, type);
+ addr = bus->r[type].bases[index];
+ bus->r[type].bases[index] += pci_index_to_size(index, type);
+ return addr;
+}
+
+#define PCI_IO_SHIFT 8
+#define PCI_MEMORY_SHIFT 16
+#define PCI_PREF_MEMORY_SHIFT 16
+
+static void pci_bios_map_device_in_bus(int bus);
+