#include "bootmii_ppc.h"
#include "string.h"
+#include "irq.h"
extern char exception_2200_start, exception_2200_end;
void exception_handler(int exception)
{
+ // check if the exception was actually an interrupt
+ if (exception == 0x500) {
+ u32 cookie;
+
+ _CPU_ISR_Disable(cookie);
+ printf("\nInterrupt occured ;-) Which one? -> ");
+ u32 enabled = read32(BW_PI_IRQMASK);
+ u32 flags = read32(BW_PI_IRQFLAG);
+ flags = flags & enabled;
+ if (flags & (1<<1)) { // RESET
+ write32(BW_PI_IRQFLAG, 1<<1);
+ printf("RESET :)\n");
+ }
+ if (flags & (1<<14)) { // Hollywood-PIC IRQ
+ write32(BW_PI_IRQFLAG, 1<<14);
+ write32(HW_PPCIRQFLAG, ~0); // dirty
+ printf("Hollywood-PIC :)\n");
+ }
+ _CPU_ISR_Restore(cookie);
+
+ return;
+ }
+
u32 *x;
u32 i;
--- /dev/null
+#ifndef __IRQ_H__
+#define __IRQ_H__
+
+/* hollywood-pic registers */
+#define HW_PPCIRQFLAG (0x0d800030)
+#define HW_PPCIRQMASK (0x0d800034)
+
+/* broadway processor interface registers */
+#define BW_PI_IRQFLAG (0x0c003000)
+#define BW_PI_IRQMASK (0x0c003004)
+
+/* stolen from libogc - gc/ogc/machine/processor.h */
+#define _CPU_ISR_Enable() \
+ { register u32 _val = 0; \
+ __asm__ __volatile__ ( \
+ "mfmsr %0\n" \
+ "ori %0,%0,0x8000\n" \
+ "mtmsr %0" \
+ : "=&r" ((_val)) : "0" ((_val)) \
+ ); \
+ }
+
+#define _CPU_ISR_Disable( _isr_cookie ) \
+ { register u32 _disable_mask = 0; \
+ _isr_cookie = 0; \
+ __asm__ __volatile__ ( \
+ "mfmsr %0\n" \
+ "rlwinm %1,%0,0,17,15\n" \
+ "mtmsr %1\n" \
+ "extrwi %0,%0,1,16" \
+ : "=&r" ((_isr_cookie)), "=&r" ((_disable_mask)) \
+ : "0" ((_isr_cookie)), "1" ((_disable_mask)) \
+ ); \
+ }
+
+#define _CPU_ISR_Restore( _isr_cookie ) \
+ { register u32 _enable_mask = 0; \
+ __asm__ __volatile__ ( \
+ " cmpwi %0,0\n" \
+ " beq 1f\n" \
+ " mfmsr %1\n" \
+ " ori %1,%1,0x8000\n" \
+ " mtmsr %1\n" \
+ "1:" \
+ : "=r"((_isr_cookie)),"=&r" ((_enable_mask)) \
+ : "0"((_isr_cookie)),"1" ((_enable_mask)) \
+ ); \
+ }
+
+#endif
#include "input.h"
#include "console.h"
#include "ohci.h"
+#include "irq.h"
#define MINIMUM_MINI_VERSION 0x00010001
dsp_reset();
// clear interrupt mask
- write32(0x0c003004, 0);
+ write32(BW_PI_IRQMASK, 0);
ipc_initialize();
ipc_slowping();
printf("bye, world!\n");
// enable OHCI0 interrupt on hollywood-pic
-#define HW_PPCIRQFLAG (0x0d800030)
-#define HW_PPCIRQMASK (0x0d800034)
write32(HW_PPCIRQFLAG, ~0);
write32(HW_PPCIRQMASK, 1<<5);
// enable RESET and PIC (#14) interrupts on processor interface
- write32(0x0c003004, (1<<1) | (1<<14));
-#define _CPU_ISR_Enable() \
- { register u32 _val = 0; \
- __asm__ __volatile__ ( \
- "mfmsr %0\n" \
- "ori %0,%0,0x8000\n" \
- "mtmsr %0" \
- : "=&r" ((_val)) : "0" ((_val)) \
- ); \
- }
+ write32(BW_PI_IRQFLAG, ~0);
+ write32(BW_PI_IRQMASK, (1<<1) | (1<<14));
_CPU_ISR_Enable()
- while(1) {}
+ while(1) {
+ // just to get sure we are still in this loop
+ _CPU_ISR_Enable() // don't know why this is needed...
+ udelay(100000);
+ printf("x");
+ }
return 0;
}
#include "bootmii_ppc.h"
#include "ohci.h"
+#include "irq.h"
#define gecko_printf printf
#define set32(address, flags) write32(address, read32(address) | flags)
#define dma_addr(address) (u32)address
-/* stolen from libogc - gc/ogc/machine/processor.h */
-#define _CPU_ISR_Disable( _isr_cookie ) \
- { register u32 _disable_mask = 0; \
- _isr_cookie = 0; \
- __asm__ __volatile__ ( \
- "mfmsr %0\n" \
- "rlwinm %1,%0,0,17,15\n" \
- "mtmsr %1\n" \
- "extrwi %0,%0,1,16" \
- : "=&r" ((_isr_cookie)), "=&r" ((_disable_mask)) \
- : "0" ((_isr_cookie)), "1" ((_disable_mask)) \
- ); \
- }
-
-#define _CPU_ISR_Restore( _isr_cookie ) \
- { register u32 _enable_mask = 0; \
- __asm__ __volatile__ ( \
- " cmpwi %0,0\n" \
- " beq 1f\n" \
- " mfmsr %1\n" \
- " ori %1,%1,0x8000\n" \
- " mtmsr %1\n" \
- "1:" \
- : "=r"((_isr_cookie)),"=&r" ((_enable_mask)) \
- : "0"((_isr_cookie)),"1" ((_enable_mask)) \
- ); \
- }
-
static struct ohci_hcca hcca_oh0;