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(parent: 4e83d70) | patch
Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-26
authorarch import user (historical) <svn@openbios.org>
Wed, 6 Jul 2005 17:06:46 +0000 (17:06 +0000)
committerarch import user (historical) <svn@openbios.org>
Wed, 6 Jul 2005 17:06:46 +0000 (17:06 +0000)
commitd24d6993b6d7bcf7977d74d081e718e1b076d1b0
treea699baad12aa9f044a10fac2658cd730c5891886tree | snapshot
parent4e83d70a4393674ac3b54d1343533fc1d2c489d0commit | diff
Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-26
Creator:  Hamish Guthrie <hamish@prodigi.ch>

Added AMD GX1 northbridge and cs5530 Southbridge

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1942 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
src/northbridge/amd/gx1/Config.lb [new file with mode: 0644] blob
src/northbridge/amd/gx1/chip.h [new file with mode: 0644] blob
src/northbridge/amd/gx1/northbridge.c [new file with mode: 0644] blob
src/northbridge/amd/gx1/northbridge.h [new file with mode: 0644] blob
src/northbridge/amd/gx1/raminit.c [new file with mode: 0644] blob
src/northbridge/amd/gx1/raminit.h [new file with mode: 0644] blob
src/southbridge/amd/cs5530/Config.lb [new file with mode: 0644] blob
src/southbridge/amd/cs5530/chip.h [new file with mode: 0644] blob
src/southbridge/amd/cs5530/cs5530.c [new file with mode: 0644] blob
src/southbridge/amd/cs5530/cs5530.h [new file with mode: 0644] blob
src/southbridge/amd/cs5530/cs5530_ide.c [new file with mode: 0644] blob
my coreboot WIP stuff (asus m5a99x-evo board)