Minor tweaks in the 440BX RAM init code (trivial).
authorUwe Hermann <uwe@hermann-uwe.de>
Thu, 7 Jun 2007 22:16:30 +0000 (22:16 +0000)
committerUwe Hermann <uwe@hermann-uwe.de>
Thu, 7 Jun 2007 22:16:30 +0000 (22:16 +0000)
commitbc359473e23e4873b5f30f27680242fc939aa23b
tree0fe3eb2ae3fbb731c90ea0b17a166fdddd139479
parent538b849695feccfd6a1419652de2608f0f5bdf1b
Minor tweaks in the 440BX RAM init code (trivial).
Still hardcoded for Tyan S1846.

This slightly increases performance, but it's still pretty horrible.
Some RAM settings are causing a dramatically slow system (confirmed
by comparing memtest performance results of the proprietary BIOS
and our code). Haven't found the problem, yet.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2717 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
src/northbridge/intel/i440bx/raminit.c