projects / coreboot.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: c931625) | patch
Add PCI IDs for most Intel southbridges of the 82801 series
authorUwe Hermann <uwe@hermann-uwe.de>
Wed, 7 Nov 2007 00:19:42 +0000 (00:19 +0000)
committerUwe Hermann <uwe@hermann-uwe.de>
Wed, 7 Nov 2007 00:19:42 +0000 (00:19 +0000)
commitb294582a0fb988767b02fc00087429e3b51b8de0
treeba23cf5e82158746de79770059b60bf455e2a295tree | snapshot
parentc931625babcfacda301598f4eb0cea37d6e0e08ccommit | diff
Add PCI IDs for most Intel southbridges of the 82801 series
(ICH/ICH0 up to the ICH9 family) in preparation for further
code improvements for the i82801xx southbridge code.

Small fixes in the 6300ESB PCI IDs.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2947 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
src/include/device/pci_ids.h diff | blob | history
src/mainboard/supermicro/x6dai_g/reset.c diff | blob | history
src/southbridge/intel/esb6300/esb6300.c diff | blob | history
src/southbridge/intel/esb6300/esb6300_bridge1c.c diff | blob | history
src/southbridge/intel/esb6300/esb6300_lpc.c diff | blob | history
src/southbridge/intel/esb6300/esb6300_pic.c diff | blob | history
src/southbridge/intel/esb6300/esb6300_sata.c diff | blob | history
src/southbridge/intel/esb6300/esb6300_uhci.c diff | blob | history
my coreboot WIP stuff (asus m5a99x-evo board)