wurms gitweb - coreboot.git/commit - src/cpu/x86/32bit/entry32.inc

author	Alexandru Gagniuc <mr.nuke.me@gmail.com>
	Mon, 11 Apr 2011 20:17:22 +0000 (20:17 +0000)
committer	Stefan Reinauer <stepan@openbios.org>
	Mon, 11 Apr 2011 20:17:22 +0000 (20:17 +0000)
commit	5005bb06c17461ef75cd1fef55c24dffaa05e580
tree	2c38986a89152225ad56cb44227f5bc6ddbecd06	tree \| snapshot
parent	1fa61ebb3344105ae633ed7eb1be05cc574b666c	commit \| diff

Unify use of post_code

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6487 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

40 files changed:

src/arch/x86/init/crt0_romcc_epilogue.inc		diff \| blob \| history
src/arch/x86/init/prologue.inc		diff \| blob \| history
src/arch/x86/lib/c_start.S		diff \| blob \| history
src/boot/hardwaremain.c		diff \| blob \| history
src/boot/selfboot.c		diff \| blob \| history
src/cpu/amd/model_gx2/cache_as_ram.inc		diff \| blob \| history
src/cpu/amd/model_lx/cache_as_ram.inc		diff \| blob \| history
src/cpu/amd/sc520/raminit.c		diff \| blob \| history
src/cpu/intel/car/cache_as_ram.inc		diff \| blob \| history
src/cpu/intel/model_106cx/cache_as_ram.inc		diff \| blob \| history
src/cpu/intel/model_6ex/cache_as_ram.inc		diff \| blob \| history
src/cpu/intel/model_6fx/cache_as_ram.inc		diff \| blob \| history
src/cpu/via/car/cache_as_ram.inc		diff \| blob \| history
src/cpu/x86/32bit/entry32.inc		diff \| blob \| history
src/include/console/console.h		diff \| blob \| history
src/include/console/post_codes.h	[new file with mode: 0644]	blob
src/include/cpu/amd/geode_post_code.h		diff \| blob \| history
src/include/cpu/x86/post_code.h		diff \| blob \| history
src/mainboard/amd/db800/romstage.c		diff \| blob \| history
src/mainboard/amd/norwich/romstage.c		diff \| blob \| history
src/mainboard/amd/rumba/romstage.c		diff \| blob \| history
src/mainboard/artecgroup/dbe61/romstage.c		diff \| blob \| history
src/mainboard/digitallogic/msm800sev/romstage.c		diff \| blob \| history
src/mainboard/iei/pcisa-lx-800-r10/romstage.c		diff \| blob \| history
src/mainboard/lippert/frontrunner/romstage.c		diff \| blob \| history
src/mainboard/lippert/hurricane-lx/romstage.c		diff \| blob \| history
src/mainboard/lippert/literunner-lx/romstage.c		diff \| blob \| history
src/mainboard/lippert/roadrunner-lx/romstage.c		diff \| blob \| history
src/mainboard/lippert/spacerunner-lx/romstage.c		diff \| blob \| history
src/mainboard/pcengines/alix1c/romstage.c		diff \| blob \| history
src/mainboard/pcengines/alix2d/romstage.c		diff \| blob \| history
src/mainboard/traverse/geos/romstage.c		diff \| blob \| history
src/mainboard/winent/pl6064/romstage.c		diff \| blob \| history
src/mainboard/wyse/s50/romstage.c		diff \| blob \| history
src/northbridge/amd/gx1/raminit.c		diff \| blob \| history
src/northbridge/via/cx700/early_serial.c		diff \| blob \| history
src/northbridge/via/vx800/early_serial.c		diff \| blob \| history
src/southbridge/amd/cs5535/chipsetinit.c		diff \| blob \| history
src/southbridge/amd/cs5536/cs5536.c		diff \| blob \| history
src/southbridge/via/vt8231/early_serial.c		diff \| blob \| history

my coreboot WIP stuff (asus m5a99x-evo board)

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