X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=vgasrc%2Fvgatables.c;h=e62b11ebd7dabe5b54c5bdfe97824f6a7a15b967;hb=10dff3db247d07df8fcc83806f8e660ba2b3b6c2;hp=47395f2bc1b139abab83dc00ca85d24637f57ec5;hpb=f3760375e093aca79b618f2098d20ba0c46181f4;p=seabios.git

diff --git a/vgasrc/vgatables.c b/vgasrc/vgatables.c
index 47395f2..e62b11e 100644
--- a/vgasrc/vgatables.c
+++ b/vgasrc/vgatables.c
@@ -5,9 +5,10 @@
 //
 // This file may be distributed under the terms of the GNU LGPLv3 license.
 
-#include "vgatables.h" // struct VideoParamTableEntry_s
+#include "vgabios.h" // struct VideoParamTableEntry_s
 #include "biosvar.h" // GET_GLOBAL
 #include "util.h" // memcpy_far
+#include "stdvga.h" // struct vgamode_s
 
 
 /****************************************************************
@@ -53,29 +54,41 @@ build_video_param(void)
 
     int i;
     for (i=0; i<ARRAY_SIZE(parammodes); i++) {
-        u8 mode = GET_GLOBAL(parammodes[i]);
+        int mode = GET_GLOBAL(parammodes[i]);
         if (! mode)
             continue;
         struct VideoParam_s *vparam_g = &video_param_table[i];
-        struct vgamode_s *vmode_g = find_vga_entry(mode);
+        struct vgamode_s *vmode_g = stdvga_find_mode(mode);
         if (!vmode_g)
             continue;
-        SET_VGA(vparam_g->twidth, GET_GLOBAL(vmode_g->twidth));
-        SET_VGA(vparam_g->theightm1, GET_GLOBAL(vmode_g->theight)-1);
-        SET_VGA(vparam_g->cheight, GET_GLOBAL(vmode_g->cheight));
-        SET_VGA(vparam_g->slength, GET_GLOBAL(vmode_g->slength));
+        int width = GET_GLOBAL(vmode_g->width);
+        int height = GET_GLOBAL(vmode_g->height);
+        u8 memmodel = GET_GLOBAL(vmode_g->memmodel);
+        int cheight = GET_GLOBAL(vmode_g->cheight);
+        if (memmodel == MM_TEXT) {
+            SET_VGA(vparam_g->twidth, width);
+            SET_VGA(vparam_g->theightm1, height-1);
+        } else {
+            int cwidth = GET_GLOBAL(vmode_g->cwidth);
+            SET_VGA(vparam_g->twidth, width / cwidth);
+            SET_VGA(vparam_g->theightm1, (height / cheight) - 1);
+        }
+        SET_VGA(vparam_g->cheight, cheight);
+        SET_VGA(vparam_g->slength, calc_page_size(memmodel, width, height));
+        struct stdvga_mode_s *stdmode_g = container_of(
+            vmode_g, struct stdvga_mode_s, info);
         memcpy_far(get_global_seg(), vparam_g->sequ_regs
-                   , get_global_seg(), GET_GLOBAL(vmode_g->sequ_regs)
+                   , get_global_seg(), GET_GLOBAL(stdmode_g->sequ_regs)
                    , ARRAY_SIZE(vparam_g->sequ_regs));
-        SET_VGA(vparam_g->miscreg, GET_GLOBAL(vmode_g->miscreg));
+        SET_VGA(vparam_g->miscreg, GET_GLOBAL(stdmode_g->miscreg));
         memcpy_far(get_global_seg(), vparam_g->crtc_regs
-                   , get_global_seg(), GET_GLOBAL(vmode_g->crtc_regs)
+                   , get_global_seg(), GET_GLOBAL(stdmode_g->crtc_regs)
                    , ARRAY_SIZE(vparam_g->crtc_regs));
         memcpy_far(get_global_seg(), vparam_g->actl_regs
-                   , get_global_seg(), GET_GLOBAL(vmode_g->actl_regs)
+                   , get_global_seg(), GET_GLOBAL(stdmode_g->actl_regs)
                    , ARRAY_SIZE(vparam_g->actl_regs));
         memcpy_far(get_global_seg(), vparam_g->grdc_regs
-                   , get_global_seg(), GET_GLOBAL(vmode_g->grdc_regs)
+                   , get_global_seg(), GET_GLOBAL(stdmode_g->grdc_regs)
                    , ARRAY_SIZE(vparam_g->grdc_regs));
     }
 
@@ -335,51 +348,51 @@ static u8 crtc_6A[] VAR16 = {
 #define PAL(x) x, sizeof(x)
 #define VPARAM(x) &video_param_table[x]
 
-static struct vgamode_s vga_modes[] VAR16 = {
-    //mode model     tx  ty  ch bits sstart    slength
+static struct stdvga_mode_s vga_modes[] VAR16 = {
+    //mode { model       tx   ty bpp cw ch  sstart    }
     // pelm  dac            sequ     misc  crtc     actl     grdc
-    {0x00, CTEXT,    40, 25, 16, 4, SEG_CTEXT, 0x0800
-     , 0xFF, PAL(palette2), sequ_01, 0x67, crtc_01, actl_01, grdc_01 },
-    {0x01, CTEXT,    40, 25, 16, 4, SEG_CTEXT, 0x0800
-     , 0xFF, PAL(palette2), sequ_01, 0x67, crtc_01, actl_01, grdc_01 },
-    {0x02, CTEXT,    80, 25, 16, 4, SEG_CTEXT, 0x1000
-     , 0xFF, PAL(palette2), sequ_03, 0x67, crtc_03, actl_01, grdc_01 },
-    {0x03, CTEXT,    80, 25, 16, 4, SEG_CTEXT, 0x1000
-     , 0xFF, PAL(palette2), sequ_03, 0x67, crtc_03, actl_01, grdc_01 },
-    {0x04, CGA,      40, 25,  8, 2, SEG_CTEXT, 0x0800
+    {0x00, { MM_TEXT,    40,  25, 4, 9, 16, SEG_CTEXT }
+     , 0xFF, PAL(palette2), sequ_01, 0x67, crtc_01, actl_01, grdc_01},
+    {0x01, { MM_TEXT,    40,  25, 4, 9, 16, SEG_CTEXT }
+     , 0xFF, PAL(palette2), sequ_01, 0x67, crtc_01, actl_01, grdc_01},
+    {0x02, { MM_TEXT,    80,  25, 4, 9, 16, SEG_CTEXT }
+     , 0xFF, PAL(palette2), sequ_03, 0x67, crtc_03, actl_01, grdc_01},
+    {0x03, { MM_TEXT,    80,  25, 4, 9, 16, SEG_CTEXT }
+     , 0xFF, PAL(palette2), sequ_03, 0x67, crtc_03, actl_01, grdc_01},
+    {0x04, { MM_CGA,    320, 200, 2, 8,  8, SEG_CTEXT }
      , 0xFF, PAL(palette1), sequ_04, 0x63, crtc_04, actl_04, grdc_04},
-    {0x05, CGA,      40, 25,  8, 2, SEG_CTEXT, 0x0800
+    {0x05, { MM_CGA,    320, 200, 2, 8,  8, SEG_CTEXT }
      , 0xFF, PAL(palette1), sequ_04, 0x63, crtc_04, actl_04, grdc_04},
-    {0x06, CGA,      80, 25,  8, 1, SEG_CTEXT, 0x1000
+    {0x06, { MM_CGA,    640, 200, 1, 8,  8, SEG_CTEXT }
      , 0xFF, PAL(palette1), sequ_06, 0x63, crtc_06, actl_06, grdc_06},
-    {0x07, MTEXT,    80, 25, 16, 4, SEG_MTEXT, 0x1000
+    {0x07, { MM_TEXT,    80,  25, 4, 9, 16, SEG_MTEXT }
      , 0xFF, PAL(palette0), sequ_03, 0x66, crtc_07, actl_07, grdc_07},
-    {0x0D, PLANAR4,  40, 25,  8, 4, SEG_GRAPH, 0x2000
+    {0x0D, { MM_PLANAR, 320, 200, 4, 8,  8, SEG_GRAPH }
      , 0xFF, PAL(palette1), sequ_0d, 0x63, crtc_0d, actl_0d, grdc_0d},
-    {0x0E, PLANAR4,  80, 25,  8, 4, SEG_GRAPH, 0x4000
+    {0x0E, { MM_PLANAR, 640, 200, 4, 8,  8, SEG_GRAPH }
      , 0xFF, PAL(palette1), sequ_0e, 0x63, crtc_0e, actl_0d, grdc_0d},
-    {0x0F, PLANAR1,  80, 25, 14, 1, SEG_GRAPH, 0x8000
+    {0x0F, { MM_PLANAR, 640, 350, 1, 8, 14, SEG_GRAPH }
      , 0xFF, PAL(palette0), sequ_0e, 0xa3, crtc_0f, actl_0f, grdc_0d},
-    {0x10, PLANAR4,  80, 25, 14, 4, SEG_GRAPH, 0x8000
+    {0x10, { MM_PLANAR, 640, 350, 4, 8, 14, SEG_GRAPH }
      , 0xFF, PAL(palette2), sequ_0e, 0xa3, crtc_0f, actl_10, grdc_0d},
-    {0x11, PLANAR1,  80, 30, 16, 1, SEG_GRAPH, 0x0000
+    {0x11, { MM_PLANAR, 640, 480, 1, 8, 16, SEG_GRAPH }
      , 0xFF, PAL(palette2), sequ_0e, 0xe3, crtc_11, actl_11, grdc_0d},
-    {0x12, PLANAR4,  80, 30, 16, 4, SEG_GRAPH, 0x0000
+    {0x12, { MM_PLANAR, 640, 480, 4, 8, 16, SEG_GRAPH }
      , 0xFF, PAL(palette2), sequ_0e, 0xe3, crtc_11, actl_10, grdc_0d},
-    {0x13, LINEAR8,  40, 25,  8, 8, SEG_GRAPH, 0x0000
+    {0x13, { MM_PACKED, 320, 200, 8, 8,  8, SEG_GRAPH }
      , 0xFF, PAL(palette3), sequ_13, 0x63, crtc_13, actl_13, grdc_13},
-    {0x6A, PLANAR4, 100, 37, 16, 4, SEG_GRAPH, 0x0000
+    {0x6A, { MM_PLANAR, 800, 600, 4, 8, 16, SEG_GRAPH }
      , 0xFF, PAL(palette2), sequ_0e, 0xe3, crtc_6A, actl_10, grdc_0d},
 };
 
 struct vgamode_s *
-find_vga_entry(u8 mode)
+stdvga_find_mode(int mode)
 {
     int i;
     for (i = 0; i < ARRAY_SIZE(vga_modes); i++) {
-        struct vgamode_s *vmode_g = &vga_modes[i];
-        if (GET_GLOBAL(vmode_g->svgamode) == mode)
-            return vmode_g;
+        struct stdvga_mode_s *stdmode_g = &vga_modes[i];
+        if (GET_GLOBAL(stdmode_g->mode) == mode)
+            return &stdmode_g->info;
     }
     return NULL;
 }