X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=vgasrc%2Fbochsvga.c;h=5ab1bc222b79ebbffc0e7799e3fa0a3844a701af;hb=34203cdf8a89c747e221005850a4558252235360;hp=4ba6611ca9ad9dc564fc433259d72f3fd0a608a9;hpb=821d6b410e02897f84c4b732f3678f64e396c9cf;p=seabios.git diff --git a/vgasrc/bochsvga.c b/vgasrc/bochsvga.c index 4ba6611..5ab1bc2 100644 --- a/vgasrc/bochsvga.c +++ b/vgasrc/bochsvga.c @@ -1,93 +1,89 @@ #include "vgabios.h" // struct vbe_modeinfo -#include "vbe.h" -#include "bochsvga.h" -#include "util.h" +#include "vbe.h" // VBE_MODE_VESA_DEFINED +#include "bochsvga.h" // bochsvga_set_mode +#include "util.h" // dprintf #include "config.h" // CONFIG_* #include "biosvar.h" // SET_BDA #include "stdvga.h" // VGAREG_SEQU_ADDRESS -static struct mode +static struct bochsvga_mode { u16 mode; - u16 width; - u16 height; - u8 depth; + struct vgamode_s info; } bochsvga_modes[] VAR16 = { /* standard modes */ - { 0x100, 640, 400, 8 }, - { 0x101, 640, 480, 8 }, - { 0x102, 800, 600, 4 }, - { 0x103, 800, 600, 8 }, - { 0x104, 1024, 768, 4 }, - { 0x105, 1024, 768, 8 }, - { 0x106, 1280, 1024, 4 }, - { 0x107, 1280, 1024, 8 }, - { 0x10D, 320, 200, 15 }, - { 0x10E, 320, 200, 16 }, - { 0x10F, 320, 200, 24 }, - { 0x110, 640, 480, 15 }, - { 0x111, 640, 480, 16 }, - { 0x112, 640, 480, 24 }, - { 0x113, 800, 600, 15 }, - { 0x114, 800, 600, 16 }, - { 0x115, 800, 600, 24 }, - { 0x116, 1024, 768, 15 }, - { 0x117, 1024, 768, 16 }, - { 0x118, 1024, 768, 24 }, - { 0x119, 1280, 1024, 15 }, - { 0x11A, 1280, 1024, 16 }, - { 0x11B, 1280, 1024, 24 }, - { 0x11C, 1600, 1200, 8 }, - { 0x11D, 1600, 1200, 15 }, - { 0x11E, 1600, 1200, 16 }, - { 0x11F, 1600, 1200, 24 }, + { 0x100, { MM_PACKED, 640, 400, 8 } }, + { 0x101, { MM_PACKED, 640, 480, 8 } }, + { 0x102, { MM_PLANAR, 800, 600, 4 } }, + { 0x103, { MM_PACKED, 800, 600, 8 } }, + { 0x104, { MM_PLANAR, 1024, 768, 4 } }, + { 0x105, { MM_PACKED, 1024, 768, 8 } }, + { 0x106, { MM_PLANAR, 1280, 1024, 4 } }, + { 0x107, { MM_PACKED, 1280, 1024, 8 } }, + { 0x10D, { MM_DIRECT, 320, 200, 15 } }, + { 0x10E, { MM_DIRECT, 320, 200, 16 } }, + { 0x10F, { MM_DIRECT, 320, 200, 24 } }, + { 0x110, { MM_DIRECT, 640, 480, 15 } }, + { 0x111, { MM_DIRECT, 640, 480, 16 } }, + { 0x112, { MM_DIRECT, 640, 480, 24 } }, + { 0x113, { MM_DIRECT, 800, 600, 15 } }, + { 0x114, { MM_DIRECT, 800, 600, 16 } }, + { 0x115, { MM_DIRECT, 800, 600, 24 } }, + { 0x116, { MM_DIRECT, 1024, 768, 15 } }, + { 0x117, { MM_DIRECT, 1024, 768, 16 } }, + { 0x118, { MM_DIRECT, 1024, 768, 24 } }, + { 0x119, { MM_DIRECT, 1280, 1024, 15 } }, + { 0x11A, { MM_DIRECT, 1280, 1024, 16 } }, + { 0x11B, { MM_DIRECT, 1280, 1024, 24 } }, + { 0x11C, { MM_PACKED, 1600, 1200, 8 } }, + { 0x11D, { MM_DIRECT, 1600, 1200, 15 } }, + { 0x11E, { MM_DIRECT, 1600, 1200, 16 } }, + { 0x11F, { MM_DIRECT, 1600, 1200, 24 } }, /* BOCHS modes */ - { 0x140, 320, 200, 32 }, - { 0x141, 640, 400, 32 }, - { 0x142, 640, 480, 32 }, - { 0x143, 800, 600, 32 }, - { 0x144, 1024, 768, 32 }, - { 0x145, 1280, 1024, 32 }, - { 0x146, 320, 200, 8 }, - { 0x147, 1600, 1200, 32 }, - { 0x148, 1152, 864, 8 }, - { 0x149, 1152, 864, 15 }, - { 0x14a, 1152, 864, 16 }, - { 0x14b, 1152, 864, 24 }, - { 0x14c, 1152, 864, 32 }, - { 0x178, 1280, 800, 16 }, - { 0x179, 1280, 800, 24 }, - { 0x17a, 1280, 800, 32 }, - { 0x17b, 1280, 960, 16 }, - { 0x17c, 1280, 960, 24 }, - { 0x17d, 1280, 960, 32 }, - { 0x17e, 1440, 900, 16 }, - { 0x17f, 1440, 900, 24 }, - { 0x180, 1440, 900, 32 }, - { 0x181, 1400, 1050, 16 }, - { 0x182, 1400, 1050, 24 }, - { 0x183, 1400, 1050, 32 }, - { 0x184, 1680, 1050, 16 }, - { 0x185, 1680, 1050, 24 }, - { 0x186, 1680, 1050, 32 }, - { 0x187, 1920, 1200, 16 }, - { 0x188, 1920, 1200, 24 }, - { 0x189, 1920, 1200, 32 }, - { 0x18a, 2560, 1600, 16 }, - { 0x18b, 2560, 1600, 24 }, - { 0x18c, 2560, 1600, 32 }, - { 0, }, + { 0x140, { MM_DIRECT, 320, 200, 32 } }, + { 0x141, { MM_DIRECT, 640, 400, 32 } }, + { 0x142, { MM_DIRECT, 640, 480, 32 } }, + { 0x143, { MM_DIRECT, 800, 600, 32 } }, + { 0x144, { MM_DIRECT, 1024, 768, 32 } }, + { 0x145, { MM_DIRECT, 1280, 1024, 32 } }, + { 0x146, { MM_PACKED, 320, 200, 8 } }, + { 0x147, { MM_DIRECT, 1600, 1200, 32 } }, + { 0x148, { MM_PACKED, 1152, 864, 8 } }, + { 0x149, { MM_DIRECT, 1152, 864, 15 } }, + { 0x14a, { MM_DIRECT, 1152, 864, 16 } }, + { 0x14b, { MM_DIRECT, 1152, 864, 24 } }, + { 0x14c, { MM_DIRECT, 1152, 864, 32 } }, + { 0x178, { MM_DIRECT, 1280, 800, 16 } }, + { 0x179, { MM_DIRECT, 1280, 800, 24 } }, + { 0x17a, { MM_DIRECT, 1280, 800, 32 } }, + { 0x17b, { MM_DIRECT, 1280, 960, 16 } }, + { 0x17c, { MM_DIRECT, 1280, 960, 24 } }, + { 0x17d, { MM_DIRECT, 1280, 960, 32 } }, + { 0x17e, { MM_DIRECT, 1440, 900, 16 } }, + { 0x17f, { MM_DIRECT, 1440, 900, 24 } }, + { 0x180, { MM_DIRECT, 1440, 900, 32 } }, + { 0x181, { MM_DIRECT, 1400, 1050, 16 } }, + { 0x182, { MM_DIRECT, 1400, 1050, 24 } }, + { 0x183, { MM_DIRECT, 1400, 1050, 32 } }, + { 0x184, { MM_DIRECT, 1680, 1050, 16 } }, + { 0x185, { MM_DIRECT, 1680, 1050, 24 } }, + { 0x186, { MM_DIRECT, 1680, 1050, 32 } }, + { 0x187, { MM_DIRECT, 1920, 1200, 16 } }, + { 0x188, { MM_DIRECT, 1920, 1200, 24 } }, + { 0x189, { MM_DIRECT, 1920, 1200, 32 } }, + { 0x18a, { MM_DIRECT, 2560, 1600, 16 } }, + { 0x18b, { MM_DIRECT, 2560, 1600, 24 } }, + { 0x18c, { MM_DIRECT, 2560, 1600, 32 } }, }; #define BYTES_PER_PIXEL(m) ((GET_GLOBAL((m)->depth) + 7) / 8) u32 pci_lfb_addr VAR16; -static inline u32 pci_config_readl(u8 bus, u8 devfn, u16 addr) +static inline u32 pci_config_readl(u16 bdf, u16 addr) { int status; u32 val; - u16 bdf = (bus << 16) | devfn; addr &= ~3; @@ -136,12 +132,11 @@ static u16 dispi_get_max_bpp(void) /* Called only during POST */ int -bochsvga_init(u8 bus, u8 devfn) +bochsvga_init(void) { - u32 lfb_addr; - - if (!CONFIG_VGA_BOCHS) - return -1; + int ret = stdvga_init(); + if (ret) + return ret; /* Sanity checks */ dispi_write(VBE_DISPI_INDEX_ID, VBE_DISPI_ID0); @@ -153,8 +148,9 @@ bochsvga_init(u8 bus, u8 devfn) SET_BDA(vbe_flag, 0x1); dispi_write(VBE_DISPI_INDEX_ID, VBE_DISPI_ID5); + u32 lfb_addr; if (CONFIG_VGA_PCI) - lfb_addr = pci_config_readl(bus, devfn, 0x10) & ~0xf; + lfb_addr = pci_config_readl(GET_GLOBAL(VgaBDF), 0x10) & ~0xf; else lfb_addr = VBE_DISPI_LFB_PHYSICAL_ADDRESS; @@ -177,69 +173,58 @@ bochsvga_total_mem(void) return dispi_read(VBE_DISPI_INDEX_VIDEO_MEMORY_64K); } -static struct mode *find_mode_entry(u16 mode) +struct vgamode_s *bochsvga_find_mode(int mode) { - struct mode *m; - - for (m = bochsvga_modes; GET_GLOBAL(m->mode); m++) { + struct bochsvga_mode *m = bochsvga_modes; + for (; m < &bochsvga_modes[ARRAY_SIZE(bochsvga_modes)]; m++) if (GET_GLOBAL(m->mode) == mode) - return m; - } - - return NULL; + return &m->info; + return stdvga_find_mode(mode); } -static int mode_valid(struct mode *m) +static int mode_valid(struct vgamode_s *vmode_g) { u16 max_xres = dispi_get_max_xres(); u16 max_bpp = dispi_get_max_bpp(); u32 max_mem = bochsvga_total_mem() * 64 * 1024; - u32 mem = GET_GLOBAL(m->width) * GET_GLOBAL(m->height) * - BYTES_PER_PIXEL(m); + u32 mem = GET_GLOBAL(vmode_g->width) * GET_GLOBAL(vmode_g->height) * + BYTES_PER_PIXEL(vmode_g); - if (GET_GLOBAL(m->width) > max_xres || - GET_GLOBAL(m->depth) > max_bpp || + if (GET_GLOBAL(vmode_g->width) > max_xres || + GET_GLOBAL(vmode_g->depth) > max_bpp || mem > max_mem) return 0; return 1; } -int -bochsvga_list_modes(u16 seg, u16 ptr) +void +bochsvga_list_modes(u16 seg, u16 *dest, u16 *last) { - int count = 0; - u16 *dest = (u16 *)(u32)ptr; - struct mode *m; - - for (m = bochsvga_modes; GET_GLOBAL(m->mode); m++) { - if (!mode_valid(m)) + struct bochsvga_mode *m = bochsvga_modes; + for (; m < &bochsvga_modes[ARRAY_SIZE(bochsvga_modes)] && destinfo)) continue; dprintf(1, "VBE found mode %x valid.\n", GET_GLOBAL(m->mode)); - SET_FARVAR(seg, dest[count], GET_GLOBAL(m->mode)); - - count++; + SET_FARVAR(seg, *dest, GET_GLOBAL(m->mode)); + dest++; } - SET_FARVAR(seg, dest[count], 0xffff); /* End of list */ - - return count; + stdvga_list_modes(seg, dest, last); } int bochsvga_mode_info(u16 mode, struct vbe_modeinfo *info) { - struct mode *m; - - m = find_mode_entry(mode); - if (!m || !mode_valid(m)) + struct vgamode_s *vmode_g = bochsvga_find_mode(mode); + if (!vmode_g || !mode_valid(vmode_g)) return -1; - info->width = GET_GLOBAL(m->width); - info->height = GET_GLOBAL(m->height); - info->depth = GET_GLOBAL(m->depth); + info->width = GET_GLOBAL(vmode_g->width); + info->height = GET_GLOBAL(vmode_g->height); + info->depth = GET_GLOBAL(vmode_g->depth); info->linesize = info->width * ((info->depth + 7) / 8); info->phys_base = GET_GLOBAL(pci_lfb_addr); @@ -259,9 +244,24 @@ bochsvga_hires_enable(int enable) dispi_write(VBE_DISPI_INDEX_ENABLE, flags); } -void -bochsvga_set_mode(u16 mode, struct vbe_modeinfo *info) +int +bochsvga_set_mode(int mode, int flags) { + if (!(mode & VBE_MODE_VESA_DEFINED)) { + dprintf(1, "set VGA mode %x\n", mode); + + bochsvga_hires_enable(0); + return stdvga_set_mode(mode, flags); + } + + struct vbe_modeinfo modeinfo, *info = &modeinfo; + int ret = bochsvga_mode_info(mode, &modeinfo); + if (ret) { + dprintf(1, "VBE mode %x not found\n", mode); + return VBE_RETURN_STATUS_FAILED; + } + bochsvga_hires_enable(1); + if (info->depth == 4) stdvga_set_mode(0x6a, 0); if (info->depth == 8) @@ -315,6 +315,16 @@ bochsvga_set_mode(u16 mode, struct vbe_modeinfo *info) } SET_BDA(vbe_mode, mode); + + if (flags & MF_LINEARFB) { + /* Linear frame buffer */ + /* XXX: ??? */ + } + if (!(mode & MF_NOCLEARMEM)) { + bochsvga_clear_scr(); + } + + return 0; } void