X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=vgasrc%2Fbochsvga.c;h=2a4b0d5bb27e48f3d242d6fb601f0c5d683db4bd;hb=3876b531222c53124b0eb154fb331c0c662f5e09;hp=70ac449e16706200c6a4ff658c6c2faba4ea2a80;hpb=161d201affa5dd23a39a0de9a0743b857448c4b6;p=seabios.git

diff --git a/vgasrc/bochsvga.c b/vgasrc/bochsvga.c
index 70ac449..2a4b0d5 100644
--- a/vgasrc/bochsvga.c
+++ b/vgasrc/bochsvga.c
@@ -1,110 +1,89 @@
 #include "vgabios.h" // struct vbe_modeinfo
-#include "vbe.h" // VBE_MODE_VESA_DEFINED
+#include "vbe.h" // VBE_CAPABILITY_8BIT_DAC
 #include "bochsvga.h" // bochsvga_set_mode
 #include "util.h" // dprintf
 #include "config.h" // CONFIG_*
-#include "biosvar.h" // SET_BDA
+#include "biosvar.h" // GET_GLOBAL
 #include "stdvga.h" // VGAREG_SEQU_ADDRESS
+#include "pci.h" // pci_config_readl
+#include "pci_regs.h" // PCI_BASE_ADDRESS_0
 
-static struct mode
+static struct bochsvga_mode
 {
     u16 mode;
-    u16 width;
-    u16 height;
-    u8 depth;
+    struct vgamode_s info;
 } bochsvga_modes[] VAR16 = {
     /* standard modes */
-    { 0x100, 640,  400,  8  },
-    { 0x101, 640,  480,  8  },
-    { 0x102, 800,  600,  4  },
-    { 0x103, 800,  600,  8  },
-    { 0x104, 1024, 768,  4  },
-    { 0x105, 1024, 768,  8  },
-    { 0x106, 1280, 1024, 4  },
-    { 0x107, 1280, 1024, 8  },
-    { 0x10D, 320,  200,  15 },
-    { 0x10E, 320,  200,  16 },
-    { 0x10F, 320,  200,  24 },
-    { 0x110, 640,  480,  15 },
-    { 0x111, 640,  480,  16 },
-    { 0x112, 640,  480,  24 },
-    { 0x113, 800,  600,  15 },
-    { 0x114, 800,  600,  16 },
-    { 0x115, 800,  600,  24 },
-    { 0x116, 1024, 768,  15 },
-    { 0x117, 1024, 768,  16 },
-    { 0x118, 1024, 768,  24 },
-    { 0x119, 1280, 1024, 15 },
-    { 0x11A, 1280, 1024, 16 },
-    { 0x11B, 1280, 1024, 24 },
-    { 0x11C, 1600, 1200, 8  },
-    { 0x11D, 1600, 1200, 15 },
-    { 0x11E, 1600, 1200, 16 },
-    { 0x11F, 1600, 1200, 24 },
+    { 0x100, { MM_PACKED, 640,  400,  8,  8, 16, SEG_GRAPH } },
+    { 0x101, { MM_PACKED, 640,  480,  8,  8, 16, SEG_GRAPH } },
+    { 0x102, { MM_PLANAR, 800,  600,  4,  8, 16, SEG_GRAPH } },
+    { 0x103, { MM_PACKED, 800,  600,  8,  8, 16, SEG_GRAPH } },
+    { 0x104, { MM_PLANAR, 1024, 768,  4,  8, 16, SEG_GRAPH } },
+    { 0x105, { MM_PACKED, 1024, 768,  8,  8, 16, SEG_GRAPH } },
+    { 0x106, { MM_PLANAR, 1280, 1024, 4,  8, 16, SEG_GRAPH } },
+    { 0x107, { MM_PACKED, 1280, 1024, 8,  8, 16, SEG_GRAPH } },
+    { 0x10D, { MM_DIRECT, 320,  200,  15, 8, 16, SEG_GRAPH } },
+    { 0x10E, { MM_DIRECT, 320,  200,  16, 8, 16, SEG_GRAPH } },
+    { 0x10F, { MM_DIRECT, 320,  200,  24, 8, 16, SEG_GRAPH } },
+    { 0x110, { MM_DIRECT, 640,  480,  15, 8, 16, SEG_GRAPH } },
+    { 0x111, { MM_DIRECT, 640,  480,  16, 8, 16, SEG_GRAPH } },
+    { 0x112, { MM_DIRECT, 640,  480,  24, 8, 16, SEG_GRAPH } },
+    { 0x113, { MM_DIRECT, 800,  600,  15, 8, 16, SEG_GRAPH } },
+    { 0x114, { MM_DIRECT, 800,  600,  16, 8, 16, SEG_GRAPH } },
+    { 0x115, { MM_DIRECT, 800,  600,  24, 8, 16, SEG_GRAPH } },
+    { 0x116, { MM_DIRECT, 1024, 768,  15, 8, 16, SEG_GRAPH } },
+    { 0x117, { MM_DIRECT, 1024, 768,  16, 8, 16, SEG_GRAPH } },
+    { 0x118, { MM_DIRECT, 1024, 768,  24, 8, 16, SEG_GRAPH } },
+    { 0x119, { MM_DIRECT, 1280, 1024, 15, 8, 16, SEG_GRAPH } },
+    { 0x11A, { MM_DIRECT, 1280, 1024, 16, 8, 16, SEG_GRAPH } },
+    { 0x11B, { MM_DIRECT, 1280, 1024, 24, 8, 16, SEG_GRAPH } },
+    { 0x11C, { MM_PACKED, 1600, 1200, 8,  8, 16, SEG_GRAPH } },
+    { 0x11D, { MM_DIRECT, 1600, 1200, 15, 8, 16, SEG_GRAPH } },
+    { 0x11E, { MM_DIRECT, 1600, 1200, 16, 8, 16, SEG_GRAPH } },
+    { 0x11F, { MM_DIRECT, 1600, 1200, 24, 8, 16, SEG_GRAPH } },
     /* BOCHS modes */
-    { 0x140, 320,  200,  32 },
-    { 0x141, 640,  400,  32 },
-    { 0x142, 640,  480,  32 },
-    { 0x143, 800,  600,  32 },
-    { 0x144, 1024, 768,  32 },
-    { 0x145, 1280, 1024, 32 },
-    { 0x146, 320,  200,  8  },
-    { 0x147, 1600, 1200, 32 },
-    { 0x148, 1152, 864,  8  },
-    { 0x149, 1152, 864,  15 },
-    { 0x14a, 1152, 864,  16 },
-    { 0x14b, 1152, 864,  24 },
-    { 0x14c, 1152, 864,  32 },
-    { 0x178, 1280, 800,  16 },
-    { 0x179, 1280, 800,  24 },
-    { 0x17a, 1280, 800,  32 },
-    { 0x17b, 1280, 960,  16 },
-    { 0x17c, 1280, 960,  24 },
-    { 0x17d, 1280, 960,  32 },
-    { 0x17e, 1440, 900,  16 },
-    { 0x17f, 1440, 900,  24 },
-    { 0x180, 1440, 900,  32 },
-    { 0x181, 1400, 1050, 16 },
-    { 0x182, 1400, 1050, 24 },
-    { 0x183, 1400, 1050, 32 },
-    { 0x184, 1680, 1050, 16 },
-    { 0x185, 1680, 1050, 24 },
-    { 0x186, 1680, 1050, 32 },
-    { 0x187, 1920, 1200, 16 },
-    { 0x188, 1920, 1200, 24 },
-    { 0x189, 1920, 1200, 32 },
-    { 0x18a, 2560, 1600, 16 },
-    { 0x18b, 2560, 1600, 24 },
-    { 0x18c, 2560, 1600, 32 },
-    { 0, },
+    { 0x140, { MM_DIRECT, 320,  200,  32, 8, 16, SEG_GRAPH } },
+    { 0x141, { MM_DIRECT, 640,  400,  32, 8, 16, SEG_GRAPH } },
+    { 0x142, { MM_DIRECT, 640,  480,  32, 8, 16, SEG_GRAPH } },
+    { 0x143, { MM_DIRECT, 800,  600,  32, 8, 16, SEG_GRAPH } },
+    { 0x144, { MM_DIRECT, 1024, 768,  32, 8, 16, SEG_GRAPH } },
+    { 0x145, { MM_DIRECT, 1280, 1024, 32, 8, 16, SEG_GRAPH } },
+    { 0x146, { MM_PACKED, 320,  200,  8,  8, 16, SEG_GRAPH } },
+    { 0x147, { MM_DIRECT, 1600, 1200, 32, 8, 16, SEG_GRAPH } },
+    { 0x148, { MM_PACKED, 1152, 864,  8,  8, 16, SEG_GRAPH } },
+    { 0x149, { MM_DIRECT, 1152, 864,  15, 8, 16, SEG_GRAPH } },
+    { 0x14a, { MM_DIRECT, 1152, 864,  16, 8, 16, SEG_GRAPH } },
+    { 0x14b, { MM_DIRECT, 1152, 864,  24, 8, 16, SEG_GRAPH } },
+    { 0x14c, { MM_DIRECT, 1152, 864,  32, 8, 16, SEG_GRAPH } },
+    { 0x178, { MM_DIRECT, 1280, 800,  16, 8, 16, SEG_GRAPH } },
+    { 0x179, { MM_DIRECT, 1280, 800,  24, 8, 16, SEG_GRAPH } },
+    { 0x17a, { MM_DIRECT, 1280, 800,  32, 8, 16, SEG_GRAPH } },
+    { 0x17b, { MM_DIRECT, 1280, 960,  16, 8, 16, SEG_GRAPH } },
+    { 0x17c, { MM_DIRECT, 1280, 960,  24, 8, 16, SEG_GRAPH } },
+    { 0x17d, { MM_DIRECT, 1280, 960,  32, 8, 16, SEG_GRAPH } },
+    { 0x17e, { MM_DIRECT, 1440, 900,  16, 8, 16, SEG_GRAPH } },
+    { 0x17f, { MM_DIRECT, 1440, 900,  24, 8, 16, SEG_GRAPH } },
+    { 0x180, { MM_DIRECT, 1440, 900,  32, 8, 16, SEG_GRAPH } },
+    { 0x181, { MM_DIRECT, 1400, 1050, 16, 8, 16, SEG_GRAPH } },
+    { 0x182, { MM_DIRECT, 1400, 1050, 24, 8, 16, SEG_GRAPH } },
+    { 0x183, { MM_DIRECT, 1400, 1050, 32, 8, 16, SEG_GRAPH } },
+    { 0x184, { MM_DIRECT, 1680, 1050, 16, 8, 16, SEG_GRAPH } },
+    { 0x185, { MM_DIRECT, 1680, 1050, 24, 8, 16, SEG_GRAPH } },
+    { 0x186, { MM_DIRECT, 1680, 1050, 32, 8, 16, SEG_GRAPH } },
+    { 0x187, { MM_DIRECT, 1920, 1200, 16, 8, 16, SEG_GRAPH } },
+    { 0x188, { MM_DIRECT, 1920, 1200, 24, 8, 16, SEG_GRAPH } },
+    { 0x189, { MM_DIRECT, 1920, 1200, 32, 8, 16, SEG_GRAPH } },
+    { 0x18a, { MM_DIRECT, 2560, 1600, 16, 8, 16, SEG_GRAPH } },
+    { 0x18b, { MM_DIRECT, 2560, 1600, 24, 8, 16, SEG_GRAPH } },
+    { 0x18c, { MM_DIRECT, 2560, 1600, 32, 8, 16, SEG_GRAPH } },
 };
 
-#define BYTES_PER_PIXEL(m) ((GET_GLOBAL((m)->depth) + 7) / 8)
-
-u32 pci_lfb_addr VAR16;
-
-static inline u32 pci_config_readl(u16 bdf, u16 addr)
+static int is_bochsvga_mode(struct vgamode_s *vmode_g)
 {
-    int status;
-    u32 val;
-
-    addr &= ~3;
-
-    asm volatile(
-            "int $0x1a\n"
-            "cli\n"
-            "cld"
-            : "=a"(status), "=c"(val)
-            : "a"(0xb10a), "b"(bdf), "D"(addr)
-            : "cc", "memory");
-
-    if ((status >> 16))
-        return (u32)-1;
-
-    return val;
+    return (vmode_g >= &bochsvga_modes[0].info
+            && vmode_g <= &bochsvga_modes[ARRAY_SIZE(bochsvga_modes)-1].info);
 }
 
-
 static u16 dispi_get_max_xres(void)
 {
     u16 en;
@@ -148,217 +127,178 @@ bochsvga_init(void)
         return -1;
     }
 
-    SET_BDA(vbe_flag, 0x1);
     dispi_write(VBE_DISPI_INDEX_ID, VBE_DISPI_ID5);
 
-    u32 lfb_addr;
-    if (CONFIG_VGA_PCI)
-        lfb_addr = pci_config_readl(GET_GLOBAL(VgaBDF), 0x10) & ~0xf;
-    else
-        lfb_addr = VBE_DISPI_LFB_PHYSICAL_ADDRESS;
+    u32 lfb_addr = VBE_DISPI_LFB_PHYSICAL_ADDRESS;
+    int bdf = GET_GLOBAL(VgaBDF);
+    if (CONFIG_VGA_PCI && bdf >= 0)
+        lfb_addr = (pci_config_readl(bdf, PCI_BASE_ADDRESS_0)
+                    & PCI_BASE_ADDRESS_MEM_MASK);
 
-    SET_FARVAR(get_global_seg(), pci_lfb_addr, lfb_addr);
+    SET_VGA(VBE_framebuffer, lfb_addr);
+    u16 totalmem = dispi_read(VBE_DISPI_INDEX_VIDEO_MEMORY_64K);
+    SET_VGA(VBE_total_memory, totalmem * 64 * 1024);
+    SET_VGA(VBE_capabilities, VBE_CAPABILITY_8BIT_DAC);
 
-    dprintf(1, "VBE DISPI detected. lfb_addr=%x\n", GET_GLOBAL(pci_lfb_addr));
+    dprintf(1, "VBE DISPI detected. lfb_addr=%x\n", lfb_addr);
 
     return 0;
 }
 
-int
-bochsvga_enabled(void)
+static int mode_valid(struct vgamode_s *vmode_g)
 {
-    return GET_BDA(vbe_flag);
+    u16 max_xres = dispi_get_max_xres();
+    u16 max_bpp = dispi_get_max_bpp();
+    u32 max_mem = GET_GLOBAL(VBE_total_memory);
+
+    u16 width = GET_GLOBAL(vmode_g->width);
+    u16 height = GET_GLOBAL(vmode_g->height);
+    u8 depth = GET_GLOBAL(vmode_g->depth);
+    u32 mem = width * height * DIV_ROUND_UP(depth, 8);
+
+    return width <= max_xres && depth <= max_bpp && mem <= max_mem;
 }
 
-u16
-bochsvga_total_mem(void)
+struct vgamode_s *bochsvga_find_mode(int mode)
 {
-    return dispi_read(VBE_DISPI_INDEX_VIDEO_MEMORY_64K);
+    struct bochsvga_mode *m = bochsvga_modes;
+    for (; m < &bochsvga_modes[ARRAY_SIZE(bochsvga_modes)]; m++)
+        if (GET_GLOBAL(m->mode) == mode) {
+            if (! mode_valid(&m->info))
+                return NULL;
+            return &m->info;
+        }
+    return stdvga_find_mode(mode);
 }
 
-static struct mode *find_mode_entry(u16 mode)
+void
+bochsvga_list_modes(u16 seg, u16 *dest, u16 *last)
 {
-    struct mode *m;
+    struct bochsvga_mode *m = bochsvga_modes;
+    for (; m < &bochsvga_modes[ARRAY_SIZE(bochsvga_modes)] && dest<last; m++) {
+        if (!mode_valid(&m->info))
+            continue;
 
-    for (m = bochsvga_modes; GET_GLOBAL(m->mode); m++) {
-        if (GET_GLOBAL(m->mode) == mode)
-            return m;
+        dprintf(1, "VBE found mode %x valid.\n", GET_GLOBAL(m->mode));
+        SET_FARVAR(seg, *dest, GET_GLOBAL(m->mode));
+        dest++;
     }
 
-    return NULL;
+    stdvga_list_modes(seg, dest, last);
 }
 
-static int mode_valid(struct mode *m)
+static void
+bochsvga_hires_enable(int enable)
 {
-    u16 max_xres = dispi_get_max_xres();
-    u16 max_bpp = dispi_get_max_bpp();
-    u32 max_mem = bochsvga_total_mem() * 64 * 1024;
-
-    u32 mem = GET_GLOBAL(m->width) * GET_GLOBAL(m->height) *
-              BYTES_PER_PIXEL(m);
-
-    if (GET_GLOBAL(m->width) > max_xres ||
-        GET_GLOBAL(m->depth) > max_bpp ||
-        mem > max_mem)
-        return 0;
+    u16 flags = enable ?
+        VBE_DISPI_ENABLED |
+        VBE_DISPI_LFB_ENABLED |
+        VBE_DISPI_NOCLEARMEM : 0;
 
-    return 1;
+    dispi_write(VBE_DISPI_INDEX_ENABLE, flags);
 }
 
 int
-bochsvga_list_modes(u16 seg, u16 ptr)
+bochsvga_get_window(struct vgamode_s *vmode_g, int window)
 {
-    int count = 0;
-    u16 *dest = (u16 *)(u32)ptr;
-    struct mode *m;
-
-    for (m = bochsvga_modes; GET_GLOBAL(m->mode); m++) {
-        if (!mode_valid(m))
-            continue;
-
-        dprintf(1, "VBE found mode %x valid.\n", GET_GLOBAL(m->mode));
-        SET_FARVAR(seg, dest[count], GET_GLOBAL(m->mode));
-
-        count++;
-    }
-
-    SET_FARVAR(seg, dest[count], 0xffff); /* End of list */
-
-    return count;
+    if (window != 0)
+        return -1;
+    return dispi_read(VBE_DISPI_INDEX_BANK);
 }
 
 int
-bochsvga_mode_info(u16 mode, struct vbe_modeinfo *info)
+bochsvga_set_window(struct vgamode_s *vmode_g, int window, int val)
 {
-    struct mode *m;
-
-    m = find_mode_entry(mode);
-    if (!m || !mode_valid(m))
+    if (window != 0)
         return -1;
+    dispi_write(VBE_DISPI_INDEX_BANK, val);
+    if (dispi_read(VBE_DISPI_INDEX_BANK) != val)
+        return -1;
+    return 0;
+}
 
-    info->width = GET_GLOBAL(m->width);
-    info->height = GET_GLOBAL(m->height);
-    info->depth = GET_GLOBAL(m->depth);
-
-    info->linesize = info->width * ((info->depth + 7) / 8);
-    info->phys_base = GET_GLOBAL(pci_lfb_addr);
-    info->vram_size = bochsvga_total_mem() * 64 * 1024;
+int
+bochsvga_get_linelength(struct vgamode_s *vmode_g)
+{
+    return dispi_read(VBE_DISPI_INDEX_VIRT_WIDTH) * vga_bpp(vmode_g) / 8;
+}
 
+int
+bochsvga_set_linelength(struct vgamode_s *vmode_g, int val)
+{
+    stdvga_set_linelength(vmode_g, val);
+    int pixels = (val * 8) / vga_bpp(vmode_g);
+    dispi_write(VBE_DISPI_INDEX_VIRT_WIDTH, pixels);
     return 0;
 }
 
-void
-bochsvga_hires_enable(int enable)
+static void
+bochsvga_clear_scr(void)
 {
-    u16 flags = enable ?
-        VBE_DISPI_ENABLED |
-        VBE_DISPI_LFB_ENABLED |
-        VBE_DISPI_NOCLEARMEM : 0;
+    u16 en;
 
-    dispi_write(VBE_DISPI_INDEX_ENABLE, flags);
+    en = dispi_read(VBE_DISPI_INDEX_ENABLE);
+    en &= ~VBE_DISPI_NOCLEARMEM;
+    dispi_write(VBE_DISPI_INDEX_ENABLE, en);
 }
 
 int
-bochsvga_set_mode(int mode, int flags)
+bochsvga_set_mode(struct vgamode_s *vmode_g, int flags)
 {
-    if (!(mode & VBE_MODE_VESA_DEFINED)) {
-        dprintf(1, "set VGA mode %x\n", mode);
-
+    if (! is_bochsvga_mode(vmode_g)) {
         bochsvga_hires_enable(0);
-        return stdvga_set_mode(mode, flags);
+        return stdvga_set_mode(vmode_g, flags);
     }
 
-    struct vbe_modeinfo modeinfo, *info = &modeinfo;
-    int ret = bochsvga_mode_info(mode, &modeinfo);
-    if (ret) {
-        dprintf(1, "VBE mode %x not found\n", mode);
-        return VBE_RETURN_STATUS_FAILED;
-    }
     bochsvga_hires_enable(1);
 
-    if (info->depth == 4)
-        stdvga_set_mode(0x6a, 0);
-    if (info->depth == 8)
+    u8 depth = GET_GLOBAL(vmode_g->depth);
+    if (depth == 4)
+        stdvga_set_mode(stdvga_find_mode(0x6a), 0);
+    if (depth == 8)
         // XXX load_dac_palette(3);
         ;
 
-    dispi_write(VBE_DISPI_INDEX_BPP, info->depth);
-    dispi_write(VBE_DISPI_INDEX_XRES, info->width);
-    dispi_write(VBE_DISPI_INDEX_YRES, info->height);
+    dispi_write(VBE_DISPI_INDEX_BPP, depth);
+    u16 width = GET_GLOBAL(vmode_g->width);
+    u16 height = GET_GLOBAL(vmode_g->height);
+    dispi_write(VBE_DISPI_INDEX_XRES, width);
+    dispi_write(VBE_DISPI_INDEX_YRES, height);
     dispi_write(VBE_DISPI_INDEX_BANK, 0);
 
     /* VGA compat setup */
     //XXX: This probably needs some reverse engineering
-    u8 v;
-    outw(0x0011, VGAREG_VGA_CRTC_ADDRESS);
-    outw(((info->width * 4 - 1) << 8) | 0x1, VGAREG_VGA_CRTC_ADDRESS);
-    dispi_write(VBE_DISPI_INDEX_VIRT_WIDTH, info->width);
-    outw(((info->height - 1) << 8) | 0x12, VGAREG_VGA_CRTC_ADDRESS);
-    outw(((info->height - 1) & 0xff00) | 0x7, VGAREG_VGA_CRTC_ADDRESS);
-    v = inb(VGAREG_VGA_CRTC_DATA) & 0xbd;
-    if (v & 0x1)
-        v |= 0x2;
-    if (v & 0x2)
+    u16 crtc_addr = VGAREG_VGA_CRTC_ADDRESS;
+    stdvga_crtc_write(crtc_addr, 0x11, 0x00);
+    stdvga_crtc_write(crtc_addr, 0x01, width / 8 - 1);
+    dispi_write(VBE_DISPI_INDEX_VIRT_WIDTH, width);
+    stdvga_crtc_write(crtc_addr, 0x12, height - 1);
+    u8 v = 0;
+    if ((height - 1) & 0x0100)
+        v |= 0x02;
+    if ((height - 1) & 0x0200)
         v |= 0x40;
-    outb(v, VGAREG_VGA_CRTC_DATA);
-
-    outw(0x9, VGAREG_VGA_CRTC_ADDRESS);
-    outb(0x17, VGAREG_VGA_CRTC_ADDRESS);
-    outb(inb(VGAREG_VGA_CRTC_DATA) | 0x3, VGAREG_VGA_CRTC_DATA);
-    v = inb(VGAREG_ACTL_RESET);
-    outw(0x10, VGAREG_ACTL_ADDRESS);
-    v = inb(VGAREG_ACTL_READ_DATA) | 0x1;
-    outb(v, VGAREG_ACTL_ADDRESS);
-    outb(0x20, VGAREG_ACTL_ADDRESS);
-    outw(0x0506, VGAREG_GRDC_ADDRESS);
-    outw(0x0f02, VGAREG_SEQU_ADDRESS);
-    if (info->depth >= 8) {
-        outb(0x14, VGAREG_VGA_CRTC_ADDRESS);
-        outb(inb(VGAREG_VGA_CRTC_DATA) | 0x40, VGAREG_VGA_CRTC_DATA);
-        v = inb(VGAREG_ACTL_RESET);
-        outw(0x10, VGAREG_ACTL_ADDRESS);
-        v = inb(VGAREG_ACTL_READ_DATA) | 0x40;
-        outb(v, VGAREG_ACTL_ADDRESS);
-        outb(0x20, VGAREG_ACTL_ADDRESS);
-        outb(0x04, VGAREG_SEQU_ADDRESS);
-        v = inb(VGAREG_SEQU_DATA) | 0x08;
-        outb(v, VGAREG_SEQU_DATA);
-        outb(0x05, VGAREG_GRDC_ADDRESS);
-        v = inb(VGAREG_GRDC_DATA) & 0x9f;
-        outb(v | 0x40, VGAREG_GRDC_DATA);
+    stdvga_crtc_mask(crtc_addr, 0x07, 0x42, v);
+
+    stdvga_crtc_write(crtc_addr, 0x09, 0x00);
+    stdvga_crtc_mask(crtc_addr, 0x17, 0x00, 0x03);
+    stdvga_attr_mask(0x10, 0x00, 0x01);
+    stdvga_grdc_write(0x06, 0x05);
+    stdvga_sequ_write(0x02, 0x0f);
+    if (depth >= 8) {
+        stdvga_crtc_mask(crtc_addr, 0x14, 0x00, 0x40);
+        stdvga_attr_mask(0x10, 0x00, 0x40);
+        stdvga_sequ_mask(0x04, 0x00, 0x08);
+        stdvga_grdc_mask(0x05, 0x20, 0x40);
     }
 
-    SET_BDA(vbe_mode, mode);
-
     if (flags & MF_LINEARFB) {
         /* Linear frame buffer */
         /* XXX: ??? */
     }
-    if (!(mode & MF_NOCLEARMEM)) {
+    if (!(flags & MF_NOCLEARMEM)) {
         bochsvga_clear_scr();
     }
 
     return 0;
 }
-
-void
-bochsvga_clear_scr(void)
-{
-    u16 en;
-
-    en = dispi_read(VBE_DISPI_INDEX_ENABLE);
-    en &= ~VBE_DISPI_NOCLEARMEM;
-    dispi_write(VBE_DISPI_INDEX_ENABLE, en);
-}
-
-int
-bochsvga_hires_enabled(void)
-{
-    return dispi_read(VBE_DISPI_INDEX_ENABLE) & VBE_DISPI_ENABLED;
-}
-
-u16
-bochsvga_curr_mode(void)
-{
-    return GET_BDA(vbe_mode);
-}