X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=util%2Fsuperiotool%2Fsuperiotool.h;h=8a7d2aa479b4a0721bfa3730f762e994f1a5b855;hb=cff573d3a455c20d427e70db84fd2acfe59194d1;hp=8a97d7bf3c158dcfe6b9c97504d5863c3ce739d8;hpb=e7b7ae23e688fb883003aed42f614bcfa977894e;p=coreboot.git diff --git a/util/superiotool/superiotool.h b/util/superiotool/superiotool.h index 8a97d7bf3..8a7d2aa47 100644 --- a/util/superiotool/superiotool.h +++ b/util/superiotool/superiotool.h @@ -33,8 +33,8 @@ #include #endif #if (defined(__MACH__) && defined(__APPLE__)) -/* DirectIO is available here: http://www.coresystems.de/en/directio */ -#include +/* DirectHW is available here: http://www.coreboot.org/DirectHW */ +#include #endif #ifdef PCI_SUPPORT @@ -59,6 +59,55 @@ #define INL inl #endif +#if defined(__NetBSD__) && (defined(__i386__) || defined(__x86_64__)) +#include +#include +#if defined(__i386__) +#define iopl i386_iopl +#elif defined(__x86_64__) +#define iopl x86_64_iopl +#endif + +static __inline__ void +outb(uint8_t value, uint16_t port) +{ + __asm__ __volatile__ ("outb %b0,%w1": :"a" (value), "Nd" (port)); +} + +static __inline__ void +outw(uint16_t value, uint16_t port) +{ + __asm__ __volatile__ ("outw %w0,%w1": :"a" (value), "Nd" (port)); +} + +static __inline__ void +outl(uint32_t value, uint16_t port) +{ + __asm__ __volatile__ ("outl %0,%w1": :"a" (value), "Nd" (port)); +} + +static __inline__ uint8_t inb(uint16_t port) +{ + uint8_t value; + __asm__ __volatile__ ("inb %w1,%0":"=a" (value):"Nd" (port)); + return value; +} + +static __inline__ uint16_t inw(uint16_t port) +{ + uint16_t value; + __asm__ __volatile__ ("inw %w1,%0":"=a" (value):"Nd" (port)); + return value; +} + +static __inline__ uint32_t inl(uint16_t port) +{ + uint32_t value; + __asm__ __volatile__ ("inl %1,%0":"=a" (value):"Nd" (port)); + return value; +} +#endif + #define USAGE "Usage: superiotool [-d] [-e] [-l] [-V] [-v] [-h]\n\n\ -d | --dump Dump Super I/O register contents\n\ -e | --extra-dump Dump secondary registers too (e.g. EC registers)\n\ @@ -173,8 +222,8 @@ static const struct { {probe_idregs_fintek, {0x2e, 0x4e, EOT}}, {probe_idregs_fintek_alternative, {0x2e, 0x4e, EOT}}, /* Only use 0x370 for ITE, but 0x3f0 or 0x3bd would also be valid. */ - {probe_idregs_ite, {0x2e, 0x4e, 0x370, EOT}}, - {probe_idregs_nsc, {0x2e, 0x4e, 0x15c, EOT}}, + {probe_idregs_ite, {0x25e, 0x2e, 0x4e, 0x370, EOT}}, + {probe_idregs_nsc, {0x2e, 0x4e, 0x15c, 0x164e, EOT}}, /* I/O pairs on Nuvoton EC chips can be configured by firmware in * addition to the following hardware strapping options. */ {probe_idregs_nuvoton, {0x164e, 0x2e, EOT}},