X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=util%2Finteltool%2Fpcie.c;h=4913150943548f487a2701974d23a6101cd59bc2;hb=bb41f502444b2d0295809cc882b829d768962990;hp=86ccf69119f75147a5b81b6c5df64b2fa16a8c13;hpb=1162f25a49e8f39822123d664cda10fef466b351;p=coreboot.git diff --git a/util/inteltool/pcie.c b/util/inteltool/pcie.c index 86ccf6911..491315094 100644 --- a/util/inteltool/pcie.c +++ b/util/inteltool/pcie.c @@ -1,8 +1,8 @@ /* * inteltool - dump all registers on an Intel CPU + chipset based system. * - * Copyright (C) 2008 by coresystems GmbH - * + * Copyright (C) 2008-2010 by coresystems GmbH + * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; version 2 of the License. @@ -33,17 +33,32 @@ int print_epbar(struct pci_dev *nb) printf("\n============= EPBAR =============\n\n"); switch (nb->device_id) { + case PCI_DEVICE_ID_INTEL_82915: case PCI_DEVICE_ID_INTEL_82945GM: + case PCI_DEVICE_ID_INTEL_82945GSE: case PCI_DEVICE_ID_INTEL_82945P: case PCI_DEVICE_ID_INTEL_82975X: epbar_phys = pci_read_long(nb, 0x40) & 0xfffffffe; break; case PCI_DEVICE_ID_INTEL_PM965: + case PCI_DEVICE_ID_INTEL_Q965: + case PCI_DEVICE_ID_INTEL_82Q35: + case PCI_DEVICE_ID_INTEL_82G33: + case PCI_DEVICE_ID_INTEL_82Q33: + case PCI_DEVICE_ID_INTEL_X44: + case PCI_DEVICE_ID_INTEL_32X0: + case PCI_DEVICE_ID_INTEL_GS45: + case PCI_DEVICE_ID_INTEL_ATOM_DXXX: + case PCI_DEVICE_ID_INTEL_ATOM_NXXX: epbar_phys = pci_read_long(nb, 0x40) & 0xfffffffe; epbar_phys |= ((uint64_t)pci_read_long(nb, 0x44)) << 32; break; - case 0x1234: // Dummy for non-existent functionality - printf("This northbrigde does not have EPBAR.\n"); + case PCI_DEVICE_ID_INTEL_82810: + case PCI_DEVICE_ID_INTEL_82810DC: + case PCI_DEVICE_ID_INTEL_82810E_MC: + case PCI_DEVICE_ID_INTEL_82830M: + case PCI_DEVICE_ID_INTEL_82865: + printf("This northbridge does not have EPBAR.\n"); return 1; default: printf("Error: Dumping EPBAR on this northbridge is not (yet) supported.\n"); @@ -51,7 +66,7 @@ int print_epbar(struct pci_dev *nb) } epbar = map_physical(epbar_phys, size); - + if (epbar == NULL) { perror("Error mapping EPBAR"); exit(1); @@ -79,25 +94,42 @@ int print_dmibar(struct pci_dev *nb) printf("\n============= DMIBAR ============\n\n"); switch (nb->device_id) { + case PCI_DEVICE_ID_INTEL_82915: case PCI_DEVICE_ID_INTEL_82945GM: + case PCI_DEVICE_ID_INTEL_82945GSE: case PCI_DEVICE_ID_INTEL_82945P: case PCI_DEVICE_ID_INTEL_82975X: dmibar_phys = pci_read_long(nb, 0x4c) & 0xfffffffe; break; - case PCI_DEVICE_ID_INTEL_PM965: - dmibar_phys = pci_read_long(nb, 0x68) & 0xfffffffe; - dmibar_phys |= ((uint64_t)pci_read_long(nb, 0x6c)) << 32; - break; - case 0x1234: // Dummy for non-existent functionality - printf("This northbrigde does not have DMIBAR.\n"); + case PCI_DEVICE_ID_INTEL_PM965: + case PCI_DEVICE_ID_INTEL_Q965: + case PCI_DEVICE_ID_INTEL_82Q35: + case PCI_DEVICE_ID_INTEL_82G33: + case PCI_DEVICE_ID_INTEL_82Q33: + case PCI_DEVICE_ID_INTEL_X44: + case PCI_DEVICE_ID_INTEL_32X0: + case PCI_DEVICE_ID_INTEL_GS45: + case PCI_DEVICE_ID_INTEL_ATOM_DXXX: + case PCI_DEVICE_ID_INTEL_ATOM_NXXX: + dmibar_phys = pci_read_long(nb, 0x68) & 0xfffffffe; + dmibar_phys |= ((uint64_t)pci_read_long(nb, 0x6c)) << 32; + break; + case PCI_DEVICE_ID_INTEL_82810: + case PCI_DEVICE_ID_INTEL_82810DC: + case PCI_DEVICE_ID_INTEL_82810E_MC: + case PCI_DEVICE_ID_INTEL_82865: + printf("This northbridge does not have DMIBAR.\n"); return 1; + case PCI_DEVICE_ID_INTEL_X58: + dmibar_phys = pci_read_long(nb, 0x50) & 0xfffff000; + break; default: printf("Error: Dumping DMIBAR on this northbridge is not (yet) supported.\n"); return 1; } dmibar = map_physical(dmibar_phys, size); - + if (dmibar == NULL) { perror("Error mapping DMIBAR"); exit(1); @@ -127,17 +159,31 @@ int print_pciexbar(struct pci_dev *nb) printf("========= PCIEXBAR ========\n\n"); switch (nb->device_id) { + case PCI_DEVICE_ID_INTEL_82915: case PCI_DEVICE_ID_INTEL_82945GM: + case PCI_DEVICE_ID_INTEL_82945GSE: case PCI_DEVICE_ID_INTEL_82945P: case PCI_DEVICE_ID_INTEL_82975X: pciexbar_reg = pci_read_long(nb, 0x48); break; case PCI_DEVICE_ID_INTEL_PM965: + case PCI_DEVICE_ID_INTEL_Q965: + case PCI_DEVICE_ID_INTEL_82Q35: + case PCI_DEVICE_ID_INTEL_82G33: + case PCI_DEVICE_ID_INTEL_82Q33: + case PCI_DEVICE_ID_INTEL_X44: + case PCI_DEVICE_ID_INTEL_32X0: + case PCI_DEVICE_ID_INTEL_GS45: + case PCI_DEVICE_ID_INTEL_ATOM_DXXX: + case PCI_DEVICE_ID_INTEL_ATOM_NXXX: pciexbar_reg = pci_read_long(nb, 0x60); pciexbar_reg |= ((uint64_t)pci_read_long(nb, 0x64)) << 32; break; - case 0x1234: // Dummy for non-existent functionality - printf("Error: This northbrigde does not have PCIEXBAR.\n"); + case PCI_DEVICE_ID_INTEL_82810: + case PCI_DEVICE_ID_INTEL_82810DC: + case PCI_DEVICE_ID_INTEL_82810E_MC: + case PCI_DEVICE_ID_INTEL_82865: + printf("Error: This northbridge does not have PCIEXBAR.\n"); return 1; default: printf("Error: Dumping PCIEXBAR on this northbridge is not (yet) supported.\n"); @@ -165,17 +211,17 @@ int print_pciexbar(struct pci_dev *nb) default: // RSVD printf("Undefined address base. Bailing out.\n"); return 1; - } + } printf("PCIEXBAR: 0x%08llx\n", pciexbar_phys); pciexbar = map_physical(pciexbar_phys, (max_busses * 1024 * 1024)); - + if (pciexbar == NULL) { perror("Error mapping PCIEXBAR"); exit(1); } - + for (bus = 0; bus < max_busses; bus++) { for (dev = 0; dev < 32; dev++) { for (fn = 0; fn < 8; fn++) { @@ -183,7 +229,7 @@ int print_pciexbar(struct pci_dev *nb) if (*(uint16_t *)(pciexbar + devbase) == 0xffff) continue; - + /* This is a heuristics. Anyone got a better check? */ if( (*(uint32_t *)(pciexbar + devbase + 256) == 0xffffffff) && (*(uint32_t *)(pciexbar + devbase + 512) == 0xffffffff) ) { @@ -208,5 +254,3 @@ int print_pciexbar(struct pci_dev *nb) return 0; } - -