X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=util%2Finteltool%2Finteltool.c;h=488d9f54858353d1a34c0def9081a628d8ca7192;hb=54a5aedec69bac62bf9bb5f65e431130507235fb;hp=64f55e87bfa32da08b84d8e63a1a4f6fa9d051e6;hpb=8429de75a6cd6c6fbc13e0b85cbe9fba49dad211;p=coreboot.git diff --git a/util/inteltool/inteltool.c b/util/inteltool/inteltool.c index 64f55e87b..488d9f548 100644 --- a/util/inteltool/inteltool.c +++ b/util/inteltool/inteltool.c @@ -1,9 +1,10 @@ /* * inteltool - dump all registers on an Intel CPU + chipset based system. * - * Copyright (C) 2008 by coresystems GmbH - * written by Stefan Reinauer - * + * Copyright (C) 2008-2010 by coresystems GmbH + * written by Stefan Reinauer + * Copyright (C) 2009 Carl-Daniel Hailfinger + * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; version 2 of the License. @@ -24,6 +25,9 @@ #include #include #include "inteltool.h" +#if defined(__FreeBSD__) +#include +#endif static const struct { uint16_t vendor_id, device_id; @@ -34,41 +38,65 @@ static const struct { { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443BX_NO_AGP, "82443BX without AGP" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810, "i810" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810DC, "i810-DC100" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810E_MC, "i810E DC-133" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82830M, "i830M" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82845, "i845" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82865, "i865" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82915, "82915G/P/GV/GL/PL/910GL" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82945P, "i945P" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82945GM, "i945GM" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82945GSE, "i945GSE" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PM965, "PM965" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_Q965, "Q963/965" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82975X, "i975X" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82Q35, "Q35" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82G33, "P35/G33/G31/P31" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82Q33, "Q33" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_X58, "X58" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_GS45, "GS45ME" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ATOM_DXXX, "Atom D400/500 Series" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ATOM_NXXX, "Atom N400 Series" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SCH_POULSBO, "SCH Poulsbo" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SCH_POULSBO_LPC, "SCH Poulsbo" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10R, "ICH10R" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9DH, "ICH9DH" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9DO, "ICH9DO" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9R, "ICH9R" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9, "ICH9" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9M, "ICH9M" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9ME, "ICH9M-E" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8M, "ICH8-M" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8, "ICH8" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_NM10, "NM10" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7MDH, "ICH7-M DH" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7M, "ICH7-M" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7, "ICH7" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7DH, "ICH7DH" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6, "ICH6" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH5, "ICH5" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH4M, "ICH4-M" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH4, "ICH4" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH2, "ICH2" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH0, "ICH0" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH, "ICH" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371XX, "82371AB/EB/MB" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_X44, "82X38/X48" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_32X0, "3200/3210" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_I63XX, "Intel 63xx I/O Controller Hub" }, }; #ifndef __DARWIN__ static int fd_mem; -void *map_physical(unsigned long phys_addr, size_t len) +void *map_physical(uint64_t phys_addr, size_t len) { void *virt_addr; virt_addr = mmap(0, len, PROT_WRITE | PROT_READ, MAP_SHARED, fd_mem, (off_t) phys_addr); - + if (virt_addr == MAP_FAILED) { - printf("Error mapping physical memory 0x%08lx[0x%x]\n", phys_addr, len); + printf("Error mapping physical memory 0x%08lx[0x%zx]\n", phys_addr, len); return NULL; } @@ -194,7 +222,17 @@ int main(int argc, char *argv[]) } } +#if defined(__FreeBSD__) + int io_fd; +#endif + +#if defined(__FreeBSD__) + if ((io_fd = open("/dev/io", O_RDWR)) < 0) { + perror("/dev/io"); +#else if (iopl(3)) { + perror("iopl"); +#endif printf("You need to be root.\n"); exit(1); } @@ -211,11 +249,11 @@ int main(int argc, char *argv[]) pci_scan_bus(pacc); /* Find the required devices */ - for (dev = pacc->devices; dev; dev = dev->next) { + for (dev = pacc->devices; dev; dev = dev->next) { pci_fill_info(dev, PCI_FILL_CLASS); /* The ISA/LPC bridge can be 0x1f, 0x07, or 0x04 so we probe. */ if (dev->device_class == 0x0601) { /* ISA/LPC bridge */ - if (sb == NULL) + if (sb == NULL) sb = dev; else fprintf(stderr, "Multiple devices with class ID" @@ -251,8 +289,16 @@ int main(int argc, char *argv[]) } id = cpuid(1); - printf("Intel CPU: Family %x, Model %x\n", - (id >> 8) & 0xf, (id >> 4) & 0xf); + + /* Intel has suggested applications to display the family of a CPU as + * the sum of the "Family" and the "Extended Family" fields shown + * above, and the model as the sum of the "Model" and the 4-bit + * left-shifted "Extended Model" fields. + * http://download.intel.com/design/processor/applnots/24161832.pdf + */ + printf("Intel CPU: Processor Type: %x, Family %x, Model %x, Stepping %x\n", + (id >> 12) & 0x3, ((id >> 8) & 0xf) + ((id >> 20) & 0xff), + ((id >> 12) & 0xf0) + ((id >> 4) & 0xf), (id & 0xf)); /* Determine names */ for (i = 0; i < ARRAY_SIZE(supported_chips_list); i++) @@ -262,10 +308,10 @@ int main(int argc, char *argv[]) if (sb->device_id == supported_chips_list[i].device_id) sbname = supported_chips_list[i].name; - printf("Intel Northbridge: %04x:%04x (%s)\n", + printf("Intel Northbridge: %04x:%04x (%s)\n", nb->vendor_id, nb->device_id, nbname); - printf("Intel Southbridge: %04x:%04x (%s)\n", + printf("Intel Southbridge: %04x:%04x (%s)\n", sb->vendor_id, sb->device_id, sbname); /* Now do the deed */ @@ -281,12 +327,12 @@ int main(int argc, char *argv[]) } if (dump_pmbase) { - print_pmbase(sb); + print_pmbase(sb, pacc); printf("\n\n"); } if (dump_mchbar) { - print_mchbar(nb); + print_mchbar(nb, pacc); printf("\n\n"); }