X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=usb%2Fhost%2Fohci.c;h=b4c794bca6bc6d012eb693d52924f91ece3214fe;hb=222a1922613a41117821a0707b5bf5c1da8d7d98;hp=a33bd427860b5eadde9fe009182c1d908059a3a4;hpb=de9eb2ee1bed75d9ea49e4430c173af8f1fa5dbb;p=ppcskel.git

diff --git a/usb/host/ohci.c b/usb/host/ohci.c
index a33bd42..b4c794b 100644
--- a/usb/host/ohci.c
+++ b/usb/host/ohci.c
@@ -26,13 +26,21 @@ Copyright (C) 2009     Sebastian Falbesoner <sebastian.falbesoner@gmail.com>
 			   (((dword) & 0x0000FF00) << 8)  | \
 			   (((dword) & 0x000000FF) << 24) )
 
+static struct endpoint_descriptor *allocate_endpoint();
+static struct general_td *allocate_general_td(size_t);
+static void control_quirk();
+static void dbg_op_state();
+static void dbg_td_flag(u32 flag);
+static void configure_ports(u8 from_init);
+static void setup_port(u32 reg, u8 from_init);
+
 static struct ohci_hcca hcca_oh0;
 
+
 static struct endpoint_descriptor *allocate_endpoint()
 {
 	struct endpoint_descriptor *ep;
-	//memalign instead of calloc doesn't work here?! WTF
-	ep = (struct endpoint_descriptor *)memalign(sizeof(struct endpoint_descriptor), 16);
+	ep = (struct endpoint_descriptor *)memalign(16, sizeof(struct endpoint_descriptor));
 	ep->flags = ACCESS_LE(OHCI_ENDPOINT_GENERAL_FORMAT);
 	ep->headp = ep->tailp = ep->nexted = ACCESS_LE(0);
 	return ep;
@@ -41,14 +49,18 @@ static struct endpoint_descriptor *allocate_endpoint()
 static struct general_td *allocate_general_td(size_t bsize)
 {
 	struct general_td *td;
-	td = (struct general_td *)memalign(sizeof(struct general_td), 16);
+	td = (struct general_td *)memalign(16, sizeof(struct general_td));
 	td->flags = ACCESS_LE(0);
+	// TODO !! nexttd?
 	td->nexttd = ACCESS_LE(virt_to_phys(td));
+	//td->nexttd = ACCESS_LE(0);
 	if(bsize == 0) {
 		td->cbp = td->be = ACCESS_LE(0);
 	} else {
-		//td->cbp = ACCESS_LE(virt_to_phys(memalign(bsize, 16))); //memailgn required here?
-		td->cbp = ACCESS_LE(virt_to_phys(malloc(bsize))); //memailgn required here?
+		//align it to 4kb? :O
+		//td->cbp = ACCESS_LE(virt_to_phys(memalign(4096, bsize))); //memailgn required here?
+		td->cbp = ACCESS_LE(virt_to_phys(malloc(bsize)));
+		memset(phys_to_virt(ACCESS_LE(td->cbp)), 0, bsize);
 		td->be = ACCESS_LE(ACCESS_LE(td->cbp) + bsize - 1);
 	}
 	return td;
@@ -56,8 +68,8 @@ static struct general_td *allocate_general_td(size_t bsize)
 
 static void control_quirk()
 {
-	static struct endpoint_descriptor *ed; /* empty ED */
-	static struct general_td *td; /* dummy TD */
+	static struct endpoint_descriptor *ed = 0; /* empty ED */
+	static struct general_td *td = 0; /* dummy TD */
 	u32 head;
 	u32 current;
 	u32 status;
@@ -148,104 +160,194 @@ static void dbg_op_state()
 	}
 }
 
+static void dbg_td_flag(u32 flag)
+{
+	printf("**************** dbg_td_flag: 0x%08X ***************\n", flag);
+	printf("CC: %X\tshould be 0, see page 32 (ohci spec)\n", (flag>>28)&0xf);
+	printf("EC: %X\tsee page 20 (ohci spec)\n", (flag>>26)&3);
+	printf(" T: %X\n", (flag>>24)&3);
+	printf("DI: %X\n", (flag>>21)&7);
+	printf("DP: %X\n", (flag>>19)&3);
+	printf(" R: %X\n", (flag>>18)&1);
+	printf("********************************************************\n");
+}
 
-/**
- * Enqueue a transfer descriptor.
- */
-u8 first = 0;
-u8 hcdi_enqueue(usb_transfer_descriptor *td) {
-	control_quirk();
-
-	printf(	"===========================\n"
-			"===========================\n");
-	sync_before_read(&hcca_oh0, 256);
-	printf("done head (nach sync): 0x%08X\n", ACCESS_LE(hcca_oh0.done_head));
-	printf("HCCA->frame_no: %d\nhcca->hccapad1: %d\n", ((ACCESS_LE(hcca_oh0.frame_no) & 0xffff0000)>>16), ACCESS_LE(hcca_oh0.frame_no)&0xffff );
-	if(hcca_oh0.done_head) printf("WWWWWWWWOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOTTTTTTTTTTTT\n");
-
-	struct general_td *tmptd = allocate_general_td(td->actlen);
-	(void) memcpy((void*) (phys_to_virt(ACCESS_LE(tmptd->cbp))), td->buffer, td->actlen); 
-
-	tmptd->flags &= ACCESS_LE(~OHCI_TD_DIRECTION_PID_MASK);
-	switch(td->pid) {
+static void general_td_fill(struct general_td *dest, usb_transfer_descriptor *src)
+{
+	(void) memcpy((void*) (phys_to_virt(ACCESS_LE(dest->cbp))), src->buffer, src->actlen); 
+	dest->flags &= ACCESS_LE(~OHCI_TD_DIRECTION_PID_MASK);
+	switch(src->pid) {
 		case USB_PID_SETUP:
 			printf("pid_setup\n");
-			tmptd->flags |= ACCESS_LE(OHCI_TD_DIRECTION_PID_SETUP);
+			dest->flags |= ACCESS_LE(OHCI_TD_DIRECTION_PID_SETUP);
+			dest->flags |= ACCESS_LE(OHCI_TD_TOGGLE_0);
+			dest->flags |= ACCESS_LE(OHCI_TD_BUFFER_ROUNDING);
 			break;
 		case USB_PID_OUT:
 			printf("pid_out\n");
-			tmptd->flags |= ACCESS_LE(OHCI_TD_DIRECTION_PID_OUT);
+			dest->flags |= ACCESS_LE(OHCI_TD_DIRECTION_PID_OUT);
+			dest->flags |= ACCESS_LE(OHCI_TD_BUFFER_ROUNDING);
+
+			/*
+			 * TODO: just temporary solution!
+			 * there can be also regular PID_OUT pakets
+			 */
+			dest->flags |= ACCESS_LE(OHCI_TD_TOGGLE_1);
 			break;
 		case USB_PID_IN:
 			printf("pid_in\n");
-			tmptd->flags |= ACCESS_LE(OHCI_TD_DIRECTION_PID_IN);
+			dest->flags |= ACCESS_LE(OHCI_TD_DIRECTION_PID_IN);
+			dest->flags |= ACCESS_LE(OHCI_TD_BUFFER_ROUNDING);
+			/*
+			 * let the endpoint do the togglestuff!
+			 * TODO: just temporary solution!
+			 * there can be also inregular PID_IN pakets (@Status Stage)
+			 */
+			dest->flags |= ACCESS_LE(OHCI_TD_TOGGLE_CARRY);
+#if 0
+			/* should be done by HC!
+			 * first pid_in start with DATA0 */
+			 */
+			dummyconfig.headp = ACCESS_LE( src->togl ?
+					ACCESS_LE(dummyconfig.headp) | OHCI_ENDPOINT_TOGGLE_CARRY :
+					ACCESS_LE(dummyconfig.headp) & ~OHCI_ENDPOINT_TOGGLE_CARRY);
+#endif
 			break;
 	}
-	tmptd->flags |= ACCESS_LE((td->togl) ? OHCI_TD_TOGGLE_1 : OHCI_TD_TOGGLE_0);
+	dest->flags |= ACCESS_LE(OHCI_TD_SET_DELAY_INTERRUPT(7));
+	sync_after_write(dest, sizeof(struct general_td));
+	sync_after_write((void*) phys_to_virt(ACCESS_LE(dest->cbp)), src->actlen);
+}
 
-	printf("tmptd hexdump (before) 0x%08X:\n", tmptd);
-	hexdump(tmptd, sizeof(struct general_td));
-	printf("tmptd->cbp hexdump (before) 0x%08X:\n", tmptd->cbp);
-	hexdump((void*) phys_to_virt(ACCESS_LE(tmptd->cbp)), td->actlen);
+static void dump_address(void *addr, u32 size, const char* str)
+{
+	sync_before_read(addr, size);
+	printf("%s hexdump @ 0x%08X:\n", str, addr);
+	hexdump(addr, size);
+}
 
-	sync_after_write((void*) phys_to_virt(ACCESS_LE(tmptd->cbp)), td->actlen);
-	sync_after_write(tmptd, sizeof(struct general_td));
+/**
+ * Enqueue a transfer descriptor.
+ */
+u8 first = 0;
+u8 hcdi_enqueue(usb_transfer_descriptor *td) {
+	static struct general_td *tSetup,*tData;
+	static u32 tSetupbuffer, tDatabuffer, tStatusbuffer;
+	static u32 tSetupblen, tDatablen, tStatusblen;
+
+	if(first == 0) {
+		printf("step 0\n");
+		tSetup = allocate_general_td(td->actlen);
+		general_td_fill(tSetup, td);
+		tSetupbuffer = (u32) phys_to_virt(ACCESS_LE(tSetup->cbp)); 
+		tSetupblen = td->actlen;
+		first++;
+		return 0;
+	}
+	if(first == 1) {
+		printf("step 1\n");
+		tData = allocate_general_td(td->actlen);
+		general_td_fill(tData, td);
+		tDatabuffer = (u32) phys_to_virt(ACCESS_LE(tData->cbp)); 
+		tDatablen = td->actlen;
+		first++;
+		return 0;
+	}
+	struct general_td *tStatus = allocate_general_td(td->actlen);
+	general_td_fill(tStatus, td);
+	tStatusbuffer = (u32) phys_to_virt(ACCESS_LE(tStatus->cbp)); 
+	tStatusblen = td->actlen;
 
-	struct endpoint_descriptor *dummyconfig = allocate_endpoint();
+	printf(	"===========================\n"
+			"===========================\n");
+	control_quirk(); //required? YES! :O ... erm... or no? :/ ... in fact I have no idea
+
+	static struct endpoint_descriptor dummyconfig;
+	if(first) {
+		first = 0;
+		memset(&dummyconfig, 0, 16);
+		dummyconfig.flags = ACCESS_LE(OHCI_ENDPOINT_GENERAL_FORMAT);
+		dummyconfig.headp = dummyconfig.tailp = dummyconfig.nexted = ACCESS_LE(0);
+		dummyconfig.flags |= ACCESS_LE(OHCI_ENDPOINT_LOW_SPEED |
+				OHCI_ENDPOINT_SET_DEVICE_ADDRESS(td->devaddress) |
+				OHCI_ENDPOINT_SET_ENDPOINT_NUMBER(td->endpoint) |
+				OHCI_ENDPOINT_SET_MAX_PACKET_SIZE(td->maxp));
+		write32(OHCI0_HC_CTRL_HEAD_ED, virt_to_phys(&dummyconfig));
+	} else {
+		sync_before_read(&dummyconfig, 16);
+		printf("HALTED set?: %d\n", ACCESS_LE(dummyconfig.headp)&OHCI_ENDPOINT_HALTED);
+		dummyconfig.headp = ACCESS_LE(0);
+		sync_after_write(&dummyconfig, 16);
+	}
 
-#define ED_MASK2 ~0 /*((u32)~0x0f) */
 #define ED_MASK ((u32)~0x0f) 
-	dummyconfig->tailp = dummyconfig->headp = ACCESS_LE(virt_to_phys((void*) ((u32)tmptd & ED_MASK)));
+	dummyconfig.headp |= ACCESS_LE(virt_to_phys((void*) ((u32)tSetup & ED_MASK)));
+	tSetup->nexttd = ACCESS_LE(virt_to_phys((void*) ((u32)tData & ED_MASK)));
+	tData->nexttd = ACCESS_LE(virt_to_phys((void*) ((u32)tStatus & ED_MASK)));
+
+	dump_address(tSetup, sizeof(struct general_td), "tSetup(before)");
+	dump_address((void*) phys_to_virt(ACCESS_LE(tSetup->cbp)), tSetupblen, "tSetup->cbp(before)");
 
-	dummyconfig->flags |= ACCESS_LE(OHCI_ENDPOINT_LOW_SPEED | 
-		OHCI_ENDPOINT_SET_DEVICE_ADDRESS(td->devaddress) | 
-		OHCI_ENDPOINT_SET_ENDPOINT_NUMBER(td->endpoint) |
-		OHCI_ENDPOINT_SET_MAX_PACKET_SIZE(td->maxp));
+	dump_address(tData, sizeof(struct general_td), "tData(before)");
+	dump_address((void*) phys_to_virt(ACCESS_LE(tData->cbp)), tDatablen, "tData->cbp(before)");
 
-	printf("dummyconfig hexdump (before) 0x%08X:\n", dummyconfig);
-	hexdump((void*) dummyconfig, 16);
+	dump_address(tStatus, sizeof(struct general_td), "tStatus(before)");
+	dump_address((void*) phys_to_virt(ACCESS_LE(tStatus->cbp)), tStatusblen, "tStatus->cbp(before)");
 
-	sync_after_write(dummyconfig, 16);
-	write32(OHCI0_HC_CTRL_HEAD_ED, virt_to_phys(dummyconfig));
+	dump_address(&dummyconfig, sizeof(struct endpoint_descriptor), "dummyconfig(before)");
 
-	printf("OHCI_CTRL_CLE: 0x%08X || ", read32(OHCI0_HC_CONTROL)&OHCI_CTRL_CLE);
-	printf("OHCI_CLF: 0x%08X\n", read32(OHCI0_HC_COMMAND_STATUS)&OHCI_CLF);
+	sync_after_write(&dummyconfig, 16);
+	sync_after_write(tSetup, sizeof(struct general_td));
+	sync_after_write(tData, sizeof(struct general_td));
+	sync_after_write(tStatus, sizeof(struct general_td));
+
+	/* trigger control list */
 	set32(OHCI0_HC_CONTROL, OHCI_CTRL_CLE);
 	write32(OHCI0_HC_COMMAND_STATUS, OHCI_CLF);
 
-	printf("+++++++++++++++++++++++++++++\n");
-	/* spin until the controller is done with the control list */
-	u32 current = read32(OHCI0_HC_CTRL_CURRENT_ED);
-	printf("current: 0x%08X\n", current);
-	while(!current) {
-		udelay(10);
-		current = read32(OHCI0_HC_CTRL_CURRENT_ED);
+	//don't use this quirk stuff here!
+#if 1
+	while(!read32(OHCI0_HC_CTRL_CURRENT_ED)) {
 	}
+#endif
 
-	udelay(20000);
-	current = read32(OHCI0_HC_CTRL_CURRENT_ED);
+	udelay(1000000);
+	u32 current = read32(OHCI0_HC_CTRL_CURRENT_ED);
 	printf("current: 0x%08X\n", current);
 	printf("+++++++++++++++++++++++++++++\n");
-	udelay(20000);
+	udelay(10000000);
 
+	dump_address(tSetup, sizeof(struct general_td), "tSetup(after)");
+	dump_address((void*) phys_to_virt(ACCESS_LE(tSetup->cbp)), tSetupblen, "tSetup->cbp(after)");
+	dump_address((void*) tSetupbuffer, tSetupblen, "tSetupbuffer");
+	dbg_td_flag(ACCESS_LE(tSetup->flags));
 
-	sync_before_read(tmptd, sizeof(struct general_td));
-	printf("tmptd hexdump (after) 0x%08X:\n", tmptd);
-	hexdump(tmptd, sizeof(struct general_td));
+	dump_address(tData, sizeof(struct general_td), "tData(after)");
+	dump_address((void*) phys_to_virt(ACCESS_LE(tData->cbp)), tDatablen, "tData->cbp(after)");
+	dump_address((void*) tDatabuffer, tDatablen, "tDatabuffer");
+	dbg_td_flag(ACCESS_LE(tData->flags));
 
-	sync_before_read((void*) phys_to_virt(ACCESS_LE(tmptd->cbp)), td->actlen);
-	printf("tmptd->cbp hexdump (after) 0x%08X:\n", tmptd->cbp);
-	hexdump((void*) phys_to_virt(ACCESS_LE(tmptd->cbp)), td->actlen);
+	dump_address(tStatus, sizeof(struct general_td), "tStatus(after)");
+	//dump_address((void*) phys_to_virt(ACCESS_LE(tStatus->cbp)), tStatusblen, "tStatus->cbp(after)");
+	//dump_address((void*) tStatusbuffer, tStatusblen, "tStatusbuffer");
+	dbg_td_flag(ACCESS_LE(tStatus->flags));
 
-	sync_before_read(dummyconfig, 16);
-	printf("dummyconfig hexdump (after) 0x%08X:\n", dummyconfig);
-	hexdump((void*) dummyconfig, 16);
+	dump_address(&dummyconfig, sizeof(struct endpoint_descriptor), "dummyconfig(after)");
 
-	sync_before_read(&hcca_oh0, 256);
-	printf("done head (nach sync): 0x%08X\n", ACCESS_LE(hcca_oh0.done_head));
+	/* disable control list */
+	write32(OHCI0_HC_CONTROL, read32(OHCI0_HC_CONTROL)&~OHCI_CTRL_CLE);
 
-	//should be free'd after taking it from the done queue
-	//free(tmptd);
+	/* 
+	 * TD should be free'd after taking it from the done queue.
+	 * but we are very very dirty and do it anyway :p
+	 */
+
+	/* only when a buffer is allocated */
+#if 0
+	if(td->actlen)
+		free((void*)tStatusbuffer);
+	free(tStatus);
+#endif
 	return 0;
 }
 
@@ -320,17 +422,61 @@ void hcdi_init()
 	write32(OHCI0_HC_CONTROL, OHCI_CONTROL_INIT | OHCI_USB_OPER);
 
 	/* wake on ConnectStatusChange, matching external hubs */
-	set32(OHCI0_HC_RH_STATUS, RH_HS_DRWE);
+	write32(OHCI0_HC_RH_STATUS, /*RH_HS_DRWE |*/ RH_HS_LPSC);
 
 	/* Choose the interrupts we care about now, others later on demand */
 	write32(OHCI0_HC_INT_STATUS, ~0);
 	write32(OHCI0_HC_INT_ENABLE, OHCI_INTR_INIT);
 
+	//wtf?
+	wait_ms ((read32(OHCI0_HC_RH_DESCRIPTOR_A) >> 23) & 0x1fe);
+
+	configure_ports((u8)1);
 	irq_restore(cookie);
 
 	dbg_op_state();
 }
 
+static void configure_ports(u8 from_init)
+{
+	printf("OHCI0_HC_RH_DESCRIPTOR_A:\t0x%08X\n", read32(OHCI0_HC_RH_DESCRIPTOR_A));
+	printf("OHCI0_HC_RH_DESCRIPTOR_B:\t0x%08X\n", read32(OHCI0_HC_RH_DESCRIPTOR_B));
+	printf("OHCI0_HC_RH_STATUS:\t\t0x%08X\n", read32(OHCI0_HC_RH_STATUS));
+	printf("OHCI0_HC_RH_PORT_STATUS_1:\t0x%08X\n", read32(OHCI0_HC_RH_PORT_STATUS_1));
+	printf("OHCI0_HC_RH_PORT_STATUS_2:\t0x%08X\n", read32(OHCI0_HC_RH_PORT_STATUS_2));
+
+	setup_port(OHCI0_HC_RH_PORT_STATUS_1, from_init);
+	setup_port(OHCI0_HC_RH_PORT_STATUS_2, from_init);
+	printf("configure_ports done\n");
+}
+
+static void setup_port(u32 reg, u8 from_init)
+{
+	u32 port = read32(reg);
+	if((port & RH_PS_CCS) && ((port & RH_PS_CSC) || from_init)) {
+		write32(reg, RH_PS_CSC);
+
+		wait_ms(120);
+
+		/* clear CSC flag, set PES and start port reset (PRS) */
+		write32(reg, RH_PS_PES);
+		while(!(read32(reg) & RH_PS_PES)) {
+			printf("fu\n");
+			return;
+		}
+
+		write32(reg, RH_PS_PRS);
+
+		/* spin until port reset is complete */
+		while(!(read32(reg) & RH_PS_PRSC)); // hint: it may stuck here
+		printf("loop done\n");
+
+		wait_ms(20);
+
+		(void) usb_add_device();
+	}
+}
+
 void hcdi_irq()
 {
 	/* read interrupt status */
@@ -363,6 +509,7 @@ void hcdi_irq()
 	if (flags & OHCI_INTR_RHSC) {
 		printf("RootHubStatusChange\n");
 		/* TODO: set some next_statechange variable... */
+		configure_ports(0);
 		write32(OHCI0_HC_INT_STATUS, OHCI_INTR_RD | OHCI_INTR_RHSC);
 	}
 	/* ResumeDetected */
@@ -375,7 +522,17 @@ void hcdi_irq()
 	/* WritebackDoneHead */
 	if (flags & OHCI_INTR_WDH) {
 		printf("WritebackDoneHead\n");
-		/* TODO: figure out what the linux kernel does here... */
+		/* basically the linux irq handler reverse TDs to their urbs
+		 * and set done_head to null.
+		 * since we are polling atm, just should do the latter task.
+		 * however, this won't work for now (i don't know why...)
+		 * TODO!
+		 */
+#if 0
+		sync_before_read(&hcca_oh0, 256);
+		hcca_oh0.done_head = 0;
+		sync_after_write(&hcca_oh0, 256);
+#endif
 	}
 
 	/* TODO: handle any pending URB/ED unlinks... */
@@ -387,3 +544,8 @@ void hcdi_irq()
 	}
 }
 
+void show_frame_no()
+{
+	sync_before_read(&hcca_oh0, 256);
+	printf("***** frame_no: %d *****\n", ACCESS_LE(hcca_oh0.frame_no));
+}