X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=usb%2Fhost%2Fohci.c;h=801720db5ed946c574fe662be36eb6965195ed3b;hb=3666a86b4f779f93a780c76a926b4eb46951da00;hp=5f964295e71cbc67ab9c4aef2952da713fcfec5f;hpb=5ac60423e2b9c338fd52c14ac9ee1660a57ca1cb;p=ppcskel.git diff --git a/usb/host/ohci.c b/usb/host/ohci.c index 5f96429..801720d 100644 --- a/usb/host/ohci.c +++ b/usb/host/ohci.c @@ -18,36 +18,48 @@ Copyright (C) 2009 Sebastian Falbesoner #include "host.h" #include "../usbspec/usb11spec.h" +// macro for accessing u32 variables that need to be in little endian byte order; +// whenever you read or write from an u32 field that the ohci host controller +// will read or write from too, use this macro for access! +#define ACCESS_LE(dword) (u32)( (((dword) & 0xFF000000) >> 24) | \ + (((dword) & 0x00FF0000) >> 8) | \ + (((dword) & 0x0000FF00) << 8) | \ + (((dword) & 0x000000FF) << 24) ) + static struct ohci_hcca hcca_oh0; static struct endpoint_descriptor *allocate_endpoint() { struct endpoint_descriptor *ep; - ep = (struct endpoint_descriptor *)calloc(sizeof(struct endpoint_descriptor), 16); - ep->flags = OHCI_ENDPOINT_GENERAL_FORMAT; - ep->headp = ep->tailp = ep->nexted = 0; + //memalign instead of calloc doesn't work here?! WTF + ep = (struct endpoint_descriptor *)memalign(sizeof(struct endpoint_descriptor), 16); + ep->flags = ACCESS_LE(OHCI_ENDPOINT_GENERAL_FORMAT); + ep->headp = ep->tailp = ep->nexted = ACCESS_LE(0); return ep; } static struct general_td *allocate_general_td(size_t bsize) { struct general_td *td; - td = (struct general_td *)calloc(sizeof(struct general_td), 16); - td->flags = 0; - td->nexttd = virt_to_phys(td); + td = (struct general_td *)memalign(sizeof(struct general_td), 16); + td->flags = ACCESS_LE(0); + // TODO !! nexttd? + td->nexttd = ACCESS_LE(virt_to_phys(td)); + //td->nexttd = ACCESS_LE(0); if(bsize == 0) { - td->cbp = td->be = 0; + td->cbp = td->be = ACCESS_LE(0); } else { - td->cbp = virt_to_phys(malloc(bsize)); - td->be = td->cbp + bsize - 1; + //td->cbp = ACCESS_LE(virt_to_phys(memalign(bsize, 16))); //memailgn required here? + td->cbp = ACCESS_LE(virt_to_phys(malloc(bsize))); + td->be = ACCESS_LE(ACCESS_LE(td->cbp) + bsize - 1); } return td; } static void control_quirk() { - static struct endpoint_descriptor *ed; /* empty ED */ - static struct general_td *td; /* dummy TD */ + static struct endpoint_descriptor *ed = 0; /* empty ED */ + static struct general_td *td = 0; /* dummy TD */ u32 head; u32 current; u32 status; @@ -69,8 +81,8 @@ static void control_quirk() } #define ED_MASK ((u32)~0x0f) - ed->tailp = ed->headp = virt_to_phys((void*) ((u32)td & ED_MASK)); - ed->flags |= OHCI_ENDPOINT_DIRECTION_OUT; + ed->tailp = ed->headp = ACCESS_LE(virt_to_phys((void*) ((u32)td & ED_MASK))); + ed->flags |= ACCESS_LE(OHCI_ENDPOINT_DIRECTION_OUT); } /* @@ -94,8 +106,8 @@ static void control_quirk() * Load the special empty ED and tell the controller to * process the control list. */ - sync_after_write(ed, 64); - sync_after_write(td, 64); + sync_after_write(ed, 16); + sync_after_write(td, 16); write32(OHCI0_HC_CTRL_HEAD_ED, virt_to_phys(ed)); status = read32(OHCI0_HC_CONTROL); @@ -138,56 +150,83 @@ static void dbg_op_state() } } +static void dbg_td_flag(u32 flag) +{ + printf("**************** dbg_td_flag: 0x%08X ***************\n", flag); + printf("CC: %X\tshould be 0, see page 32 (ohci spec)\n", (flag>>28)&0xf); + printf("EC: %X\tsee page 20 (ohci spec)\n", (flag>>26)&3); + printf(" T: %X\n", (flag>>24)&3); + printf("DI: %X\n", (flag>>21)&7); + printf("DP: %X\n", (flag>>19)&3); + printf(" R: %X\n", (flag>>18)&1); + printf("********************************************************\n"); +} + + /** * Enqueue a transfer descriptor. */ u8 hcdi_enqueue(usb_transfer_descriptor *td) { - control_quirk(); + control_quirk(); //required? YES! :O + + static struct endpoint_descriptor dummyconfig; + dummyconfig.flags = ACCESS_LE(OHCI_ENDPOINT_GENERAL_FORMAT); + dummyconfig.headp = dummyconfig.tailp = dummyconfig.nexted = ACCESS_LE(0); printf( "===========================\n" - "===========================\n" - "done head (vor sync): 0x%08X\n", hcca_oh0.done_head); + "===========================\n"); sync_before_read(&hcca_oh0, 256); - printf("done head (nach sync): 0x%08X\n", hcca_oh0.done_head); + printf("done head (nach sync): 0x%08X\n", ACCESS_LE(hcca_oh0.done_head)); + printf("HCCA->frame_no: %d\nhcca->hccapad1: %d\n", + ((ACCESS_LE(hcca_oh0.frame_no) & 0xffff)>>16), + ACCESS_LE(hcca_oh0.frame_no)&0x0000ffff ); - struct general_td *tmptd = allocate_general_td(sizeof(td->actlen)); - (void) memcpy((void*) phys_to_virt(tmptd->cbp), td->buffer, sizeof(td->actlen)); /* throws dsi exception after some time :X */ + struct general_td *tmptd = allocate_general_td(td->actlen); + (void) memcpy((void*) (phys_to_virt(ACCESS_LE(tmptd->cbp))), td->buffer, td->actlen); - tmptd->flags &= ~OHCI_TD_DIRECTION_PID_MASK; + tmptd->flags &= ACCESS_LE(~OHCI_TD_DIRECTION_PID_MASK); switch(td->pid) { case USB_PID_SETUP: printf("pid_setup\n"); - tmptd->flags |= OHCI_TD_DIRECTION_PID_SETUP; + tmptd->flags |= ACCESS_LE(OHCI_TD_DIRECTION_PID_SETUP); break; case USB_PID_OUT: printf("pid_out\n"); - tmptd->flags |= OHCI_TD_DIRECTION_PID_OUT; + tmptd->flags |= ACCESS_LE(OHCI_TD_DIRECTION_PID_OUT); break; case USB_PID_IN: printf("pid_in\n"); - tmptd->flags |= OHCI_TD_DIRECTION_PID_IN; + tmptd->flags |= ACCESS_LE(OHCI_TD_DIRECTION_PID_IN); break; } + tmptd->flags |= ACCESS_LE((td->togl) ? OHCI_TD_TOGGLE_1 : OHCI_TD_TOGGLE_0); - printf("tmptd hexump (before):\n"); + printf("tmptd hexdump (before) 0x%08X:\n", tmptd); hexdump(tmptd, sizeof(struct general_td)); - printf("tmptd-cbp hexump (before):\n"); - hexdump((void*) phys_to_virt(tmptd->cbp), sizeof(td->actlen)); + printf("tmptd->cbp hexdump (before) 0x%08X:\n", phys_to_virt(ACCESS_LE(tmptd->cbp))); + hexdump((void*) phys_to_virt(ACCESS_LE(tmptd->cbp)), td->actlen); - sync_after_write((void*) (tmptd->cbp), sizeof(td->actlen)); sync_after_write(tmptd, sizeof(struct general_td)); + sync_after_write((void*) phys_to_virt(ACCESS_LE(tmptd->cbp)), td->actlen); - struct endpoint_descriptor *dummyconfig = allocate_endpoint(); - printf("tmpdt & ED_MASK: 0x%08X\n", virt_to_phys((void*) ((u32)tmptd & ED_MASK))); -#define ED_MASK ((u32)~0x0f) - dummyconfig->tailp = /* dummyconfig->headp = */ virt_to_phys((void*) ((u32)tmptd & ED_MASK)); -// dummyconfig->flags |= OHCI_ENDPOINT_DIRECTION_OUT; - sync_after_write(dummyconfig, 64); - write32(OHCI0_HC_CTRL_HEAD_ED, virt_to_phys(dummyconfig)); +#define ED_MASK2 ~0 /*((u32)~0x0f) */ +#define ED_MASK ((u32)~0x0f) + dummyconfig.headp = ACCESS_LE(virt_to_phys((void*) ((u32)tmptd & ED_MASK))); + + dummyconfig.flags |= ACCESS_LE(OHCI_ENDPOINT_LOW_SPEED | + OHCI_ENDPOINT_SET_DEVICE_ADDRESS(td->devaddress) | + OHCI_ENDPOINT_SET_ENDPOINT_NUMBER(td->endpoint) | + OHCI_ENDPOINT_SET_MAX_PACKET_SIZE(td->maxp)); + + printf("dummyconfig hexdump (before) 0x%08X:\n", &dummyconfig); + hexdump((void*) &dummyconfig, 16); - printf("OHCI_CTRL_CLE: 0x%08X\n", read32(OHCI0_HC_CONTROL)&OHCI_CTRL_CLE); + sync_after_write(&dummyconfig, 16); + write32(OHCI0_HC_CTRL_HEAD_ED, virt_to_phys(&dummyconfig)); + + printf("OHCI_CTRL_CLE: 0x%08X || ", read32(OHCI0_HC_CONTROL)&OHCI_CTRL_CLE); printf("OHCI_CLF: 0x%08X\n", read32(OHCI0_HC_COMMAND_STATUS)&OHCI_CLF); set32(OHCI0_HC_CONTROL, OHCI_CTRL_CLE); write32(OHCI0_HC_COMMAND_STATUS, OHCI_CLF); @@ -197,38 +236,46 @@ u8 hcdi_enqueue(usb_transfer_descriptor *td) { u32 current = read32(OHCI0_HC_CTRL_CURRENT_ED); printf("current: 0x%08X\n", current); while(!current) { - udelay(10); + udelay(2); current = read32(OHCI0_HC_CTRL_CURRENT_ED); } - udelay(2000); - udelay(2000); - udelay(2000); + udelay(20000); current = read32(OHCI0_HC_CTRL_CURRENT_ED); printf("current: 0x%08X\n", current); printf("+++++++++++++++++++++++++++++\n"); - udelay(2000); - udelay(2000); - udelay(2000); - udelay(2000); - udelay(2000); - udelay(2000); - udelay(2000); - udelay(2000); + udelay(20000); sync_before_read(tmptd, sizeof(struct general_td)); - printf("tmptd hexump (after):\n"); + printf("tmptd hexdump (after) 0x%08X:\n", tmptd); hexdump(tmptd, sizeof(struct general_td)); + dbg_td_flag(ACCESS_LE(tmptd->flags)); + + sync_before_read((void*) phys_to_virt(ACCESS_LE(tmptd->cbp)), td->actlen); + printf("tmptd->cbp hexdump (after) 0x%08X:\n", phys_to_virt(ACCESS_LE(tmptd->cbp))); + hexdump((void*) phys_to_virt(ACCESS_LE(tmptd->cbp)), td->actlen); - sync_before_read((void*) (tmptd->cbp), sizeof(td->actlen)); - printf("tmptd-cbp hexump (after):\n"); - hexdump((void*) (tmptd->cbp), sizeof(td->actlen)); + sync_before_read(&dummyconfig, 16); + printf("dummyconfig hexdump (after) 0x%08X:\n", &dummyconfig); + hexdump((void*) &dummyconfig, 16); - printf("done head (vor sync): 0x%08X\n", hcca_oh0.done_head); sync_before_read(&hcca_oh0, 256); - printf("done head (nach sync): 0x%08X\n", hcca_oh0.done_head); + printf("done head (nach sync): 0x%08X\n", ACCESS_LE(hcca_oh0.done_head)); + sync_before_read((void*) phys_to_virt(ACCESS_LE(tmptd->cbp)), td->actlen); + (void) memcpy((void*) (td->buffer), phys_to_virt(ACCESS_LE(tmptd->cbp)), td->actlen); + + write32(OHCI0_HC_CONTROL, read32(OHCI0_HC_CONTROL)&~OHCI_CTRL_CLE); + dummyconfig.headp = dummyconfig.tailp = dummyconfig.nexted = ACCESS_LE(0); + //should be free'd after taking it from the done queue + //however, it fails?! WTF +#if 0 + printf("WTF1\n"); free(tmptd); + printf("WTF0\n"); + free((void*) tmptd->cbp); + printf("WTF3\n"); +#endif return 0; } @@ -329,8 +376,10 @@ void hcdi_irq() flags &= read32(OHCI0_HC_INT_ENABLE); /* nothing to do? */ - if (flags == 0) + if (flags == 0) { + printf("OHCI Interrupt occured: but not for you! WTF?!\n"); return; + } printf("OHCI Interrupt occured: "); /* UnrecoverableError */ @@ -344,6 +393,45 @@ void hcdi_irq() if (flags & OHCI_INTR_RHSC) { printf("RootHubStatusChange\n"); /* TODO: set some next_statechange variable... */ + u32 port1 = read32(OHCI0_HC_RH_PORT_STATUS_1); + u32 port2 = read32(OHCI0_HC_RH_PORT_STATUS_2); + printf("OHCI0_HC_RH_DESCRIPTOR_A:\t0x%08X\n", read32(OHCI0_HC_RH_DESCRIPTOR_A)); + printf("OHCI0_HC_RH_DESCRIPTOR_B:\t0x%08X\n", read32(OHCI0_HC_RH_DESCRIPTOR_B)); + printf("OHCI0_HC_RH_STATUS:\t\t0x%08X\n", read32(OHCI0_HC_RH_STATUS)); + printf("OHCI0_HC_RH_PORT_STATUS_1:\t0x%08X\n", port1); + printf("OHCI0_HC_RH_PORT_STATUS_2:\t0x%08X\n", port2); + + if((port1 & RH_PS_CCS) && (port1 & RH_PS_CSC)) { + wait_ms(100); + + /* clear CSC flag, set PES and start port reset (PRS) */ + write32(OHCI0_HC_RH_PORT_STATUS_1, port1 | RH_PS_CSC | RH_PS_PES | RH_PS_PRS); + + /* spin until port reset is complete */ + port1 = read32(OHCI0_HC_RH_PORT_STATUS_1); + while(!(port1 & RH_PS_PRSC)) { + udelay(2); + port1 = read32(OHCI0_HC_RH_PORT_STATUS_1); + } + + (void) usb_add_device(); + } + if((port2 & RH_PS_CCS) && (port2 & RH_PS_CSC)) { + wait_ms(100); + + /* clear CSC flag, set PES and start port reset (PRS) */ + write32(OHCI0_HC_RH_PORT_STATUS_2, port2 | RH_PS_CSC | RH_PS_PES | RH_PS_PRS); + + /* spin until port reset is complete */ + port2 = read32(OHCI0_HC_RH_PORT_STATUS_2); + while(!(port2 & RH_PS_PRSC)) { + udelay(2); + port2 = read32(OHCI0_HC_RH_PORT_STATUS_2); + } + + (void) usb_add_device(); + } + write32(OHCI0_HC_INT_STATUS, OHCI_INTR_RD | OHCI_INTR_RHSC); } /* ResumeDetected */ @@ -356,7 +444,17 @@ void hcdi_irq() /* WritebackDoneHead */ if (flags & OHCI_INTR_WDH) { printf("WritebackDoneHead\n"); - /* TODO: figure out what the linux kernel does here... */ + /* basically the linux irq handler reverse TDs to their urbs + * and set done_head to null. + * since we are polling atm, just should do the latter task. + * however, this won't work for now (i don't know why...) + * TODO! + */ +#if 0 + sync_before_read(&hcca_oh0, 256); + hcca_oh0.done_head = 0; + sync_after_write(&hcca_oh0, 256); +#endif } /* TODO: handle any pending URB/ED unlinks... */