X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fvm%2Fjit%2Fx86_64%2Fcodegen.h;h=ceea690bb1999bd27dda1bae0d84beb2f76cca06;hb=d75b6037acf17c342166b9c9bd6e657dfdd12cd9;hp=a73319c7853a589dcfe959cdbe5b270e8abd5d00;hpb=f81fbe1249214b34489f05fe61847170caed8031;p=cacao.git diff --git a/src/vm/jit/x86_64/codegen.h b/src/vm/jit/x86_64/codegen.h index a73319c78..ceea690bb 100644 --- a/src/vm/jit/x86_64/codegen.h +++ b/src/vm/jit/x86_64/codegen.h @@ -1,9 +1,9 @@ -/* jit/x86_64/codegen.h - code generation macros and definitions for x86_64 +/* vm/jit/x86_64/codegen.h - code generation macros and definitions for x86_64 - Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 - R. Grafl, A. Krall, C. Kruegel, C. Oates, R. Obermaisser, - M. Probst, S. Ring, E. Steiner, C. Thalinger, D. Thuernbeck, - P. Tomsich, J. Wenninger + Copyright (C) 1996-2005 R. Grafl, A. Krall, C. Kruegel, C. Oates, + R. Obermaisser, M. Platter, M. Probst, S. Ring, E. Steiner, + C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich, J. Wenninger, + Institut f. Computersprachen - TU Wien This file is part of CACAO. @@ -27,7 +27,7 @@ Authors: Andreas Krall Christian Thalinger - $Id: codegen.h 1319 2004-07-16 13:45:50Z twisti $ + $Id: codegen.h 1735 2004-12-07 14:33:27Z twisti $ */ @@ -35,78 +35,9 @@ #ifndef _CODEGEN_H #define _CODEGEN_H -#include "jit/jit.h" +#include - -/* x86_64 register numbers */ -#define RIP -1 -#define RAX 0 -#define RCX 1 -#define RDX 2 -#define RBX 3 -#define RSP 4 -#define RBP 5 -#define RSI 6 -#define RDI 7 -#define R8 8 -#define R9 9 -#define R10 10 -#define R11 11 -#define R12 12 -#define R13 13 -#define R14 14 -#define R15 15 - - -#define XMM0 0 -#define XMM1 1 -#define XMM2 2 -#define XMM3 3 -#define XMM4 4 -#define XMM5 5 -#define XMM6 6 -#define XMM7 7 -#define XMM8 8 -#define XMM9 9 -#define XMM10 10 -#define XMM11 11 -#define XMM12 12 -#define XMM13 13 -#define XMM14 14 -#define XMM15 15 - - -/* preallocated registers *****************************************************/ - -/* integer registers */ - -#define REG_RESULT RAX /* to deliver method results */ - -#define REG_ITMP1 RAX /* temporary register */ -#define REG_ITMP2 R10 /* temporary register and method pointer */ -#define REG_ITMP3 R11 /* temporary register */ - -#define REG_NULL -1 /* used for reg_of_var where d is not needed */ - -#define REG_ITMP1_XPTR RAX /* exception pointer = temporary register 1 */ -#define REG_ITMP2_XPC R10 /* exception pc = temporary register 2 */ - -#define REG_SP RSP /* stack pointer */ - -/* floating point registers */ - -#define REG_FRESULT XMM0 /* to deliver floating point method results */ - -#define REG_FTMP1 XMM8 /* temporary floating point register */ -#define REG_FTMP2 XMM9 /* temporary floating point register */ -#define REG_FTMP3 XMM10 /* temporary floating point register */ - - -#define INT_ARG_CNT 6 /* number of int argument registers */ -#define INT_SAV_CNT 5 /* number of int callee saved registers */ - -#define FLT_ARG_CNT 4 /* number of flt argument registers */ -#define FLT_SAV_CNT 0 /* number of flt callee saved registers */ +#include "vm/jit/x86_64/types.h" /* macros to create code ******************************************************/ @@ -174,7 +105,7 @@ typedef enum { /* modrm and stuff */ #define x86_64_address_byte(mod,reg,rm) \ - *(mcodeptr++) = ((((mod) & 0x03) << 6) | (((reg) & 0x07) << 3) | ((rm) & 0x07)); + *(cd->mcodeptr++) = ((((mod) & 0x03) << 6) | (((reg) & 0x07) << 3) | ((rm) & 0x07)); #define x86_64_emit_reg(reg,rm) \ @@ -183,7 +114,7 @@ typedef enum { #define x86_64_emit_rex(size,reg,index,rm) \ if ((size) == 1 || (reg) > 7 || (index) > 7 || (rm) > 7) { \ - *(mcodeptr++) = (0x40 | (((size) & 0x01) << 3) | ((((reg) >> 3) & 0x01) << 2) | ((((index) >> 3) & 0x01) << 1) | (((rm) >> 3) & 0x01)); \ + *(cd->mcodeptr++) = (0x40 | (((size) & 0x01) << 3) | ((((reg) >> 3) & 0x01) << 2) | ((((index) >> 3) & 0x01) << 1) | (((rm) >> 3) & 0x01)); \ } @@ -265,15 +196,15 @@ typedef enum { #define x86_64_emit_imm8(imm) \ - *(mcodeptr++) = (u1) ((imm) & 0xff); + *(cd->mcodeptr++) = (u1) ((imm) & 0xff); #define x86_64_emit_imm16(imm) \ do { \ x86_64_imm_buf imb; \ imb.i = (s4) (imm); \ - *(mcodeptr++) = imb.b[0]; \ - *(mcodeptr++) = imb.b[1]; \ + *(cd->mcodeptr++) = imb.b[0]; \ + *(cd->mcodeptr++) = imb.b[1]; \ } while (0) @@ -281,10 +212,10 @@ typedef enum { do { \ x86_64_imm_buf imb; \ imb.i = (s4) (imm); \ - *(mcodeptr++) = imb.b[0]; \ - *(mcodeptr++) = imb.b[1]; \ - *(mcodeptr++) = imb.b[2]; \ - *(mcodeptr++) = imb.b[3]; \ + *(cd->mcodeptr++) = imb.b[0]; \ + *(cd->mcodeptr++) = imb.b[1]; \ + *(cd->mcodeptr++) = imb.b[2]; \ + *(cd->mcodeptr++) = imb.b[3]; \ } while (0) @@ -292,14 +223,14 @@ typedef enum { do { \ x86_64_imm_buf imb; \ imb.l = (s8) (imm); \ - *(mcodeptr++) = imb.b[0]; \ - *(mcodeptr++) = imb.b[1]; \ - *(mcodeptr++) = imb.b[2]; \ - *(mcodeptr++) = imb.b[3]; \ - *(mcodeptr++) = imb.b[4]; \ - *(mcodeptr++) = imb.b[5]; \ - *(mcodeptr++) = imb.b[6]; \ - *(mcodeptr++) = imb.b[7]; \ + *(cd->mcodeptr++) = imb.b[0]; \ + *(cd->mcodeptr++) = imb.b[1]; \ + *(cd->mcodeptr++) = imb.b[2]; \ + *(cd->mcodeptr++) = imb.b[3]; \ + *(cd->mcodeptr++) = imb.b[4]; \ + *(cd->mcodeptr++) = imb.b[5]; \ + *(cd->mcodeptr++) = imb.b[6]; \ + *(cd->mcodeptr++) = imb.b[7]; \ } while (0) @@ -330,37 +261,37 @@ typedef enum { #define gen_nullptr_check(objreg) \ if (checknull) { \ - x86_64_test_reg_reg((objreg), (objreg)); \ - x86_64_jcc(X86_64_CC_E, 0); \ - codegen_addxnullrefs(mcodeptr); \ + x86_64_test_reg_reg(cd, (objreg), (objreg)); \ + x86_64_jcc(cd, X86_64_CC_E, 0); \ + codegen_addxnullrefs(cd, cd->mcodeptr); \ } #define gen_bound_check \ if (checkbounds) { \ - x86_64_alul_membase_reg(X86_64_CMP, s1, OFFSET(java_arrayheader, size), s2); \ - x86_64_jcc(X86_64_CC_AE, 0); \ - codegen_addxboundrefs(mcodeptr, s2); \ + x86_64_alul_membase_reg(cd, X86_64_CMP, s1, OFFSET(java_arrayheader, size), s2); \ + x86_64_jcc(cd, X86_64_CC_AE, 0); \ + codegen_addxboundrefs(cd, cd->mcodeptr, s2); \ } #define gen_div_check(v) \ if (checknull) { \ if ((v)->flags & INMEMORY) { \ - x86_64_alu_imm_membase(X86_64_CMP, 0, REG_SP, src->regoff * 8); \ + x86_64_alu_imm_membase(cd, X86_64_CMP, 0, REG_SP, src->regoff * 8); \ } else { \ - x86_64_test_reg_reg(src->regoff, src->regoff); \ + x86_64_test_reg_reg(cd, src->regoff, src->regoff); \ } \ - x86_64_jcc(X86_64_CC_E, 0); \ - codegen_addxdivrefs(mcodeptr); \ + x86_64_jcc(cd, X86_64_CC_E, 0); \ + codegen_addxdivrefs(cd, cd->mcodeptr); \ } /* MCODECHECK(icnt) */ #define MCODECHECK(icnt) \ - if ((mcodeptr + (icnt)) > (u1 *) mcodeend) \ - mcodeptr = (u1 *) codegen_increase((u1 *) mcodeptr) + if ((cd->mcodeptr + (icnt)) > (u1 *) cd->mcodeend) \ + cd->mcodeptr = (u1 *) codegen_increase(cd, cd->mcodeptr) /* M_INTMOVE: generates an integer-move from register a to b. @@ -369,7 +300,7 @@ typedef enum { #define M_INTMOVE(reg,dreg) \ if ((reg) != (dreg)) { \ - x86_64_mov_reg_reg((reg),(dreg)); \ + x86_64_mov_reg_reg(cd, (reg),(dreg)); \ } @@ -380,7 +311,7 @@ typedef enum { #define M_FLTMOVE(reg,dreg) \ if ((reg) != (dreg)) { \ - x86_64_movq_reg_reg((reg),(dreg)); \ + x86_64_movq_reg_reg(cd, (reg),(dreg)); \ } @@ -403,9 +334,9 @@ typedef enum { if ((v)->flags & INMEMORY) { \ COUNT_SPILLS; \ if ((v)->type == TYPE_INT) { \ - x86_64_movl_membase_reg(REG_SP, (v)->regoff * 8, tempnr); \ + x86_64_movl_membase_reg(cd, REG_SP, (v)->regoff * 8, tempnr); \ } else { \ - x86_64_mov_membase_reg(REG_SP, (v)->regoff * 8, tempnr); \ + x86_64_mov_membase_reg(cd, REG_SP, (v)->regoff * 8, tempnr); \ } \ regnr = tempnr; \ } else { \ @@ -418,9 +349,9 @@ typedef enum { if ((v)->flags & INMEMORY) { \ COUNT_SPILLS; \ if ((v)->type == TYPE_FLT) { \ - x86_64_movlps_membase_reg(REG_SP, (v)->regoff * 8, tempnr); \ + x86_64_movlps_membase_reg(cd, REG_SP, (v)->regoff * 8, tempnr); \ } else { \ - x86_64_movlpd_membase_reg(REG_SP, (v)->regoff * 8, tempnr); \ + x86_64_movlpd_membase_reg(cd, REG_SP, (v)->regoff * 8, tempnr); \ } \ /* x86_64_movq_membase_reg(REG_SP, (v)->regoff * 8, tempnr);*/ \ regnr = tempnr; \ @@ -443,19 +374,19 @@ typedef enum { #define store_reg_to_var_int(sptr, tempregnum) \ if ((sptr)->flags & INMEMORY) { \ COUNT_SPILLS; \ - x86_64_mov_reg_membase(tempregnum, REG_SP, (sptr)->regoff * 8); \ + x86_64_mov_reg_membase(cd, tempregnum, REG_SP, (sptr)->regoff * 8); \ } #define store_reg_to_var_flt(sptr, tempregnum) \ if ((sptr)->flags & INMEMORY) { \ COUNT_SPILLS; \ - x86_64_movq_reg_membase(tempregnum, REG_SP, (sptr)->regoff * 8); \ + x86_64_movq_reg_membase(cd, tempregnum, REG_SP, (sptr)->regoff * 8); \ } #define M_COPY(from,to) \ - d = reg_of_var(m, to, REG_ITMP1); \ + d = reg_of_var(rd, to, REG_ITMP1); \ if ((from->regoff != to->regoff) || \ ((from->flags ^ to->flags) & INMEMORY)) { \ if (IS_FLT_DBL_TYPE(from->type)) { \ @@ -470,6 +401,10 @@ typedef enum { } +/* #define ALIGNCODENOP {if((int)((long)mcodeptr&7)){M_NOP;}} */ +#define ALIGNCODENOP + + /* function gen_resolvebranch ************************************************** backpatches a branch instruction @@ -486,13 +421,7 @@ typedef enum { /* function prototypes */ -void codegen_init(); -void init_exceptions(); -void codegen(); -void codegen_close(); -void dseg_display(s4 *s4ptr); - -void codegen_addreference(basicblock *target, void *branchptr); +void thread_restartcriticalsection(ucontext_t *uc); #endif /* _CODEGEN_H */